mirror of https://github.com/ARMmbed/mbed-os.git
				
				
				
			
		
			
				
	
	
		
			116 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
			
		
		
	
	
			116 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
/**
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******************************************************************************
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* @file rfAna_map.h
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* @brief rfAna hw module register map
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* @internal
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* @author  ON Semiconductor
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* $Rev: 2953 $
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* $Date: 2014-09-15 18:13:01 +0530 (Mon, 15 Sep 2014) $
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******************************************************************************
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 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
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 * All rights reserved.  This software and/or documentation is licensed by ON Semiconductor
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 * under limited terms and conditions.  The terms and conditions pertaining to the software
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 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
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 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
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 * if applicable the software license agreement.  Do not use this software and/or
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 * documentation unless you have carefully read and you agree to the limited terms and
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 * conditions.  By using this software and/or documentation, you agree to the limited
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 * terms and conditions.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
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* INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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* @endinternal
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*
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* @ingroup rfAna
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*
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* @details
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* <p>
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* Rf and Analog control and trimming hw module register map
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* </p>
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*/
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#ifndef RFANA_MAP_H_
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#define RFANA_MAP_H_
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/*************************************************************************************************
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*                                                                                                *
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*  Header files                                                                                  *
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*                                                                                                *
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*************************************************************************************************/
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#include "architecture.h"
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/**************************************************************************************************
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*                                                                                                 *
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*  Type definitions                                                                               *
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*                                                                                                 *
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**************************************************************************************************/
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/** rfAna register map (control part) */
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typedef struct {
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    union {
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        struct {
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            __IO uint32_t FRACT_WORD:24;
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            __IO uint32_t INT_WORD:8;
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        } BITS;
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        __IO uint32_t WORD;
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    } TX_LO_CONTROL;
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    union {
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        struct {
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            __IO uint32_t FRACT_WORD:24;
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            __IO uint32_t INT_WORD:8;
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        } BITS;
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        __IO uint32_t WORD;
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    } RX_LO_CONTROL;
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    union {
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        struct {
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            __IO uint32_t PLL_RESET_TIME:10;
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            __I uint32_t RESERVED:6;
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            __IO uint32_t PLL_LOCK_TIME:10;
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        } BITS;
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        __IO uint32_t WORD;
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    } PLL_TIMING;
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    union {
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        struct {
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            __IO uint32_t LNA_GAIN_MODE:1;
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            __IO uint32_t ADC_DITHER_MODE:1;
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        } BITS;
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        __IO uint32_t WORD;
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    } RX_CONTROL;
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    __IO uint32_t TX_POWER;
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    __I uint32_t RECEIVER_GAIN;
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} RfAnaReg_t, *RfAnaReg_pt;
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/** rfAna register map (trimming part) */
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typedef struct {
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    __IO uint32_t PMU_TRIM;
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    __IO uint32_t RESERVED;
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    __IO uint32_t RX_CHAIN_TRIM;
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    union {
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        struct {
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            __I uint32_t BIAS_VCO_TRIM:4;
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            __I uint32_t MODULATION_TRIM:4;
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            __IO uint32_t TX_VCO_TRIM:4;
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            __IO uint32_t RX_VCO_TRIM:4;
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            __I uint32_t DIV_TRIM:3;
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            __I uint32_t REG_TRIM:2;
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            __I uint32_t LFR_TRIM:3;
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            __I uint32_t PAD0:4;
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            __I uint32_t CHARGE_PUMP_RANGE:4;
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        } BITS;
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        __IO uint32_t WORD;
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    } PLL_TRIM;
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    __IO uint32_t PLL_VCO_TAP_LOCATION;
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    __IO uint32_t TX_CHAIN_TRIM;
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    __IO uint32_t RX_VCO_TRIM_LUT2;             /** 0x40019098 */
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    __IO uint32_t RX_VCO_TRIM_LUT1;             /** 0x4001909C */
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    __IO uint32_t TX_VCO_TRIM_LUT2;             /** 0x400190A0 */
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    __IO uint32_t TX_VCO_TRIM_LUT1;             /** 0x400190A4 */
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    __IO uint32_t ADC_OFFSET_BUF;               /** 0x400190A8 */
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} RfAnaTrimReg_t, *RfAnaTrimReg_pt;
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#endif /* RFANA_MAP_H_ */
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