mirror of https://github.com/ARMmbed/mbed-os.git
531 lines
22 KiB
C
531 lines
22 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2006-2019 ARM Limited
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/** \addtogroup hal */
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/** @{*/
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#ifndef MBED_I2C_API_H
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#define MBED_I2C_API_H
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#include "device.h"
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#include "pinmap.h"
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#include "hal/buffer.h"
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#if DEVICE_I2C_ASYNCH
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#include "hal/dma_api.h"
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#endif
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#include <stdbool.h>
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#if DEVICE_I2C
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/**
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* \defgroup hal_i2c I2C hal
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*
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* The I2C hal provides a low level interface to the I2C interface of a target.
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*
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* # Defined behavior
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* * The function ::i2c_init initializes the peripheral pins specified in the input parameters,
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* initializes the peripheral in master mode if `is_slave` is false,
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* initializes the peripheral in slave mode if `is_slave` is true and `supports_slave_mode` is true - Verified by test ::fpga_i2c_test_init_free.
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* * The function ::i2c_free resets the pins used to initialize the peripheral to their default state and
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* disables the peripheral clock - Verified by test ::fpga_i2c_test_init_free.
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* * The function ::i2c_get_capabilities fills the contents of the `i2c_capabilities_t` parameter - Verified by test ::fpga_i2c_test_get_capabilities.
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* * The function ::i2c_frequency sets the frequency to use for the transfer, returns the actual frequency used and
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* must leave all other configuration unchanged - Verified by test ::fpga_i2c_test_frequency.
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* * The function ::i2c_timeout sets the transmision timeout to use for the following blocking transfers.
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* If the timeout is not set, the default timeout is used.
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* The default timeout value is based on I2C frequency. It's computed as triple the amount of time it would take to send data over I2C - Verified by test ::fpga_i2c_test_blocking_transmission_timeout.
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* * The function ::i2c_write writes `length` number of symbols to the bus, returns the number of symbols sent to the bus,
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* returns an error code if the transfer fails, generates a stop condition on the bus at the end of the transfer if `stop` parameter is true,
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* and handles transfer collisions and loss of arbitration if the platform supports multimaster in hardware.
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* The transfer times out and returns `I2C_ERROR_TIMEOUT ` if the transfer takes longer than the configured timeout duration - Verified by test ::fpga_i2c_test_blocking_write_read.
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* * The function ::i2c_read reads `length` symbols from the bus, returns the number of symbols received from the bus,
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* returns an error code if the transfer fails, generates a stop condition on the bus at the end of the transfer if `stop` parameter is true
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* and handles transfer collisions and loss of arbitration if the platform supports multimaster in hardware.
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* The transfer times out and returns `I2C_ERROR_TIMEOUT ` if the transfer takes longer than the configured timeout duration - Verified by test ::fpga_i2c_test_blocking_write_read.
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* * The function ::i2c_start generates I2C START condition on the bus in master mode and does nothing if called when the peripheral is configured in slave mode.
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* * The function ::i2c_stop generates I2C STOP condition on the bus in master mode and does nothing if called when the peripheral is configured in slave mode
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* - Verified by test ::fpga_i2c_test_blocking_write_read ::fpga_i2c_test_async_write_read.
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* * The function ::i2c_slave_status indicates which mode the peripheral has been addressed in and returns not addressed when called in master mode.
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* * The function ::i2c_slave_address sets the address of the peripheral to the `address` parameter and does nothing if called in master mode.
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* * The function ::i2c_transfer_async returns immediately with a `bool` indicating whether the transfer was successfully scheduled.
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* The callback given to `i2c_transfer_async` is invoked when the transfer finishes or an error occurs and
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* must save the handler and context pointers inside the `obj` pointer. The context pointer is passed to the callback on transfer completion.
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* The callback must be invoked on completion unless the transfer is aborted and
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* may handle transfer collisions and loss of arbitration if the platform supports multimaster in hardware and enabled in API.
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* `i2c_async_event_t` must be filled with the number of symbols sent to the bus during transfer - Verified by test ::fpga_i2c_test_async_write_read.
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* * The function ::i2c_abort_async aborts any ongoing async transfers - Verified by test ::fpga_i2c_test_async_abort.
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*
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* # Undefined behaviors
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*
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* * Use of a `null` pointer as an argument to any function.
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* * Calling any `I2C` function before calling ::i2c_init or after calling ::i2c_free.
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* * Initializing the `I2C` peripheral with invalid `SDA` and `SCL` pins.
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* * Initializing the peripheral in slave mode if slave mode is not supported, indicated by ::i2c_get_capabilities.
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* * Operating the peripheral in slave mode without first specifying an address using ::i2c_slave_address.
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* * Setting an address using i2c_slave_address after initializing the peripheral in master mode.
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* * Setting an address to an `I2C` reserved value.
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* * Setting an address larger than the 7-bit supported maximum if 10-bit addressing is not supported.
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* * Setting an address larger than the 10-bit supported maximum.
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* * Setting a frequency outside the supported range given by ::i2c_get_capabilities.
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* * Using the device in a multimaster configuration when `supports_multimaster_mode` is false.
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* * Specifying an invalid address when calling any `read` or `write` functions.
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* * Setting the length of the transfer or receive buffers to larger than the buffers are.
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* * Passing an invalid pointer as `handler` to ::i2c_transfer_async.
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* * Calling ::i2c_abort_async when no transfer is in progress.
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*
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* @{
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*/
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/**
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* \defgroup hal_i2c_tests I2C hal tests
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* The I2C test validate proper implementation of the I2C hal.
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*
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* To run the I2C hal tests, use the command:
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*
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* mbed test -t <toolchain> -m <target> -n tests-mbed_hal_fpga_ci_test_shield-i2c
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*/
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/**
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* @defgroup hal_I2CEvents I2C Events Macros
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*
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* @{
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*/
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#define I2C_EVENT_ERROR (1 << 1)
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#define I2C_EVENT_ERROR_NO_SLAVE (1 << 2)
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#define I2C_EVENT_TRANSFER_COMPLETE (1 << 3)
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#define I2C_EVENT_TRANSFER_EARLY_NACK (1 << 4)
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#define I2C_EVENT_ARBITRATION_LOST (1 << 5)
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#define I2C_EVENT_ALL (I2C_EVENT_ERROR | \
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I2C_EVENT_TRANSFER_COMPLETE | \
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I2C_EVENT_ERROR_NO_SLAVE | \
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I2C_EVENT_TRANSFER_EARLY_NACK | \
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I2C_EVENT_ARBITRATION_LOST)
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/**@}*/
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typedef struct i2c i2c_t;
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#if DEVICE_I2C_ASYNCH
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/** Structure describing the status of async transfer */
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typedef struct i2c_async_event {
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uint32_t sent_bytes;
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uint32_t received_bytes;
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int32_t error_status; // error description I2C_ERROR_XXX
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bool error;
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} i2c_async_event_t;
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/** Asynchronous transfer callback.
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*
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* @param obj The I2C object
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* @param event Pointer to the event holding async transfer status
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* @param ctx The context pointer
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*
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* @note Callback is invoked when async transfer completes or when an error is detected.
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*/
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typedef void (*i2c_async_handler_f)(i2c_t *obj, i2c_async_event_t *event, void *ctx);
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#endif
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/** I2C HAL structure */
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struct i2c {
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struct i2c_s i2c; /**< Target specific I2C structure */
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#if DEVICE_I2C_ASYNCH
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struct buffer_s tx_buff; /**< Tx buffer */
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struct buffer_s rx_buff; /**< Rx buffer */
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i2c_async_handler_f handler;
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void *ctx;
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#endif
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};
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/** Transmission error codes */
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enum {
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I2C_ERROR_NO_SLAVE = -1,
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I2C_ERROR_BUS_BUSY = -2,
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I2C_ERROR_TIMEOUT = -3,
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I2C_ERROR_ARBITRATION_LOST = -4
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct {
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/**< Minimum frequency supported must be set by target device */
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uint32_t minimum_frequency;
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/**< Maximum frequency supported must be set by target device */
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uint32_t maximum_frequency;
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/**< If true, the device can handle I2C slave mode. */
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bool supports_slave_mode;
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/**< If true, supports 10-bit addressing. */
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bool supports_10bit_addressing;
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/**< If true, the device handle multimaster collisions and arbitration safely*/
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bool supports_multi_master;
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/**< If true, supports configuring clock stretching. */
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bool supports_clock_stretching;
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} i2c_capabilities_t;
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/**
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* \defgroup hal_GeneralI2C I2C Configuration Functions
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*
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* # Defined behavior
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* * ::i2c_init initializes i2c_t control structure
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* * ::i2c_init configures the pins used by I2C
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* * ::i2c_free returns the pins owned by the I2C object to their reset state
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* * ::i2c_frequency configure the I2C frequency
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* * ::i2c_start sends START command
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* * ::i2c_read reads `length` bytes from the I2C slave specified by `address` to the `data` buffer
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* * ::i2c_read reads generates a stop condition on the bus at the end of the transfer if `stop` parameter is non-zero
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* * ::i2c_read reads returns the number of symbols received from the bus
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* * ::i2c_write writes `length` bytes to the I2C slave specified by `address` from the `data` buffer
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* * ::i2c_write generates a stop condition on the bus at the end of the transfer if `stop` parameter is non-zero
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* * ::i2c_write returns zero on success, error code otherwise
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* * ::i2c_reset resets the I2C peripheral
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* * ::i2c_byte_read reads and return one byte from the specfied I2C slave
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* * ::i2c_byte_read uses `last` parameter to inform the slave that all bytes have been read
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* * ::i2c_byte_write writes one byte to the specified I2C slave
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* * ::i2c_byte_write returns 0 if NAK was received, 1 if ACK was received, 2 for timeout
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* * ::i2c_slave_mode enables/disables I2S slave mode
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* * ::i2c_slave_receive returns: 1 - read addresses, 2 - write to all slaves, 3 write addressed, 0 - the slave has not been addressed
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* * ::i2c_slave_read reads `length` bytes from the I2C master to the `data` buffer
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* * ::i2c_slave_read returns non-zero if a value is available, 0 otherwise
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* * ::i2c_slave_write writes `length` bytes to the I2C master from the `data` buffer
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* * ::i2c_slave_write returns non-zero if a value is available, 0 otherwise
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* * ::i2c_slave_address configures I2C slave address
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* * ::i2c_transfer_asynch starts I2C asynchronous transfer
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* * ::i2c_transfer_asynch writes `tx_length` bytes to the I2C slave specified by `address` from the `tx` buffer
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* * ::i2c_transfer_asynch reads `rx_length` bytes from the I2C slave specified by `address` to the `rx` buffer
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* * ::i2c_transfer_asynch generates a stop condition on the bus at the end of the transfer if `stop` parameter is non-zero
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* * The callback given to ::i2c_transfer_asynch is invoked when the transfer completes
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* * ::i2c_transfer_asynch specifies the logical OR of events to be registered
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* * The ::i2c_transfer_asynch function may use the `DMAUsage` hint to select the appropriate async algorithm
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* * ::i2c_irq_handler_asynch returns event flags if a transfer termination condition was met, otherwise returns 0.
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* * ::i2c_active returns non-zero if the I2C module is active or 0 if it is not
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* * ::i2c_abort_asynch aborts an on-going async transfer
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*
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* # Undefined behavior
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* * Calling ::i2c_init multiple times on the same `i2c_t`
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* * Calling any function other than ::i2c_init on a non-initialized `i2c_t`
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* * Initialising the `I2C` peripheral with invalid `SDA` and `SCL` pins.
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* * Passing pins that cannot be on the same peripheral
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* * Passing an invalid pointer as `obj` to any function
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* * Use of a `null` pointer as an argument to any function.
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* * Initialising the peripheral in slave mode if slave mode is not supported
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* * Operating the peripheral in slave mode without first specifying and address using ::i2c_slave_address
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* * Setting an address using i2c_slave_address after initialising the peripheral in master mode
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* * Setting an address to an `I2C` reserved value
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* * Specifying an invalid address when calling any `read` or `write` functions
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* * Setting the length of the transfer or receive buffers to larger than the buffers are
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* * Passing an invalid pointer as `handler`
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* * Calling ::i2c_abort_async when no transfer is currently in progress
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*
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*
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* @{
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*/
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/**
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* \defgroup hal_GeneralI2C_tests I2C hal tests
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* The I2C HAL tests ensure driver conformance to defined behaviour.
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*
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* To run the I2C hal tests use the command:
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*
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* mbed test -t <toolchain> -m <target> -n tests-mbed_hal_fpga_ci_test_shield-i2c
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*
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*/
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/** Fills structure indicating supported features and frequencies on the current
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* platform.
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*
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* @param[out] capabilities Capabilities structure filled with supported
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* configurations.
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*/
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void i2c_get_capabilities(i2c_capabilities_t *capabilities);
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/** Initialize the I2C peripheral. It sets the default parameters for the I2C
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* peripheral and configures its pins.
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*
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* @param obj The I2C object
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* @param sda The sda pin
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* @param scl The scl pin
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* @param is_slave Choose whether the peripheral is initialized as master or
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* slave.
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*/
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void i2c_init(i2c_t *obj, PinName sda, PinName scl, bool is_slave);
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/** Release the I2C object.
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*
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* @param obj The I2C object to deinitialize
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*/
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void i2c_free(i2c_t *obj);
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/** Configure the frequency in Hz at which the I2C peripheral should operate.
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*
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* @param obj The I2C object
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* @param frequency Frequency in Hz
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*
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* @returns The actual frequency that the peripheral generates to
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* allow a user to adjust its strategy in case the target cannot be
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* reached.
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*/
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uint32_t i2c_frequency(i2c_t *obj, uint32_t frequency);
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/** Enable or disable clock stretching for the I2C peripheral.
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*
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* @param obj The I2C object
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* @param enabled If 'true', enable clock stretching on the given I2C peripheral;
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* otherwise, disable it.
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*/
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void i2c_set_clock_stretching(i2c_t *obj, bool enabled);
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/** Configure the timeout duration in microseconds for blocking transmission
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*
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* @param obj The I2C object
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* @param timeout Transmission timeout in microseconds.
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*
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* @note If no timeout is set, the default timeout is used.
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* Default timeout value is based on I2C frequency.
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* Byte timeout is computed as triple amount of time it would take
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* to send 10 bit over I2C and is expressed by the formula:
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* byte_timeout = 3 * (1/frequency * 10 * 1000000)
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*/
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void i2c_timeout(i2c_t *obj, uint32_t timeout);
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/** Send START command
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*
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* @param obj The I2C object.
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*/
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void i2c_start(i2c_t *obj);
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/** Send STOP command
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*
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* @param obj The I2C object
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*/
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void i2c_stop(i2c_t *obj);
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/** Blocking sending data
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*
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* This function transmits data when the peripheral is configured as Master to
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* the selected slave and when configured as Slave transmits data to the
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* Master.
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*
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* This function is blocking; it returns when the transfer is complete or a
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* timeout event is triggered. The number of bytes transmitted is returned by
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* the function after the operation is completed. Transmit operation cannot be
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* canceled or aborted.
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*
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* The data buffer must stay allocated during the duration of the transfer, and
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* the contents must not be modified. The value of the specified `address` is
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* ignored when configured in slave mode. In master mode, it contains the
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* address of the target peripheral. This is a 7-bit value unless 10-bit
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* addressing is configured, and the target supports it.
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*
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* When in master mode, the operation consists of:
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* - Addressing the slave as a Master transmitter.
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* - Transmitting data to the addressed slave.
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* - Generating a STOP condition if the specified `stop` field is true.
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*
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* @param obj The I2C object
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* @param address 7/10-bit address (last bit is 0)
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* @param data The buffer for sending
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* @param length Number of bytes to write
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* @param stop If true, stop is generated after the transfer is done
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*
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* @note If the current platform supports multimaster operation, the peripheral
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* performs arbitration automatically when detecting collisions and
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* completes the transfer or returns I2C_ERROR_ARBITRATION_LOST
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* when it loses arbitration.
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*
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* Additional time for arbitration or clock stretching should by count
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* by setting appropriate timeout value.
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*
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* When no transmision timeout is set by the user, the default timeout value is
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* used. It counts one additional byte for addressing stage:
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* default_timeout = (length + 1) * byte_timeout.
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*
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* @return
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* zero or nonzero - Number of written bytes
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* negative - I2C_ERROR_XXX status
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*/
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int32_t i2c_write(i2c_t *obj, uint16_t address, const uint8_t *data,
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uint32_t length, bool stop);
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/** Blocking reading data
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*
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* This function receives data when the peripheral is configured as Master
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* from the selected slave and when configured as Slave from the Master.
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*
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* This function is blocking; it returns when the transfer is complete or a
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* timeout event is triggered. The number of bytes received is returned by
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* the function after the operation is completed. Receive operation cannot be
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* canceled or aborted.
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*
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* When in master mode, the operation consists of:
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* - Addressing the slave as a Master receiver.
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* - Receiving data from the addressed slave.
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* - Generating a STOP condition if the specified `stop` field is true.
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*
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* @param obj The I2C object
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* @param address 7/10-bit address (last bit is 1)
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* @param data The buffer for receiving
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* @param length Number of bytes to read
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* @param stop If true, stop is generated after the transfer is done
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*
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* @note If the current platform supports multimaster operation, the peripheral
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* performs arbitration automatically when detecting collisions and
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* completes the transfer or returns I2C_ERROR_ARBITRATION_LOST
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* when it loses arbitration.
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*
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* Additional time for arbitration or clock stretching should by count
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* by setting appropriate timeout value.
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*
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* When no transmision timeout is set by the user, the default timeout value is
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* used. It counts one additional byte for addressing stage:
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* default_timeout = (length + 1) * byte_timeout.
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*
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* @return
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* zero or nonzero - Number of written bytes
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* negative - I2C_ERROR_XXX status
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*/
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int32_t i2c_read(i2c_t *obj, uint16_t address, uint8_t *data, uint32_t length,
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bool stop);
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/** Get the pins that support I2C SDA
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*
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* Return a PinMap array of pins that support I2C SDA in
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* master mode. The array is terminated with {NC, NC, 0}.
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|
*
|
|
* @return PinMap array
|
|
*/
|
|
const PinMap *i2c_master_sda_pinmap(void);
|
|
|
|
/** Get the pins that support I2C SCL
|
|
*
|
|
* Return a PinMap array of pins that support I2C SCL in
|
|
* master mode. The array is terminated with {NC, NC, 0}.
|
|
*
|
|
* @return PinMap array
|
|
*/
|
|
const PinMap *i2c_master_scl_pinmap(void);
|
|
|
|
/** Get the pins that support I2C SDA
|
|
*
|
|
* Return a PinMap array of pins that support I2C SDA in
|
|
* slave mode. The array is terminated with {NC, NC, 0}.
|
|
*
|
|
* @return PinMap array
|
|
*/
|
|
const PinMap *i2c_slave_sda_pinmap(void);
|
|
|
|
/** Get the pins that support I2C SCL
|
|
*
|
|
* Return a PinMap array of pins that support I2C SCL in
|
|
* slave mode. The array is terminated with {NC, NC, 0}.
|
|
*
|
|
* @return PinMap array
|
|
*/
|
|
const PinMap *i2c_slave_scl_pinmap(void);
|
|
|
|
/**@}*/
|
|
|
|
#if DEVICE_I2CSLAVE
|
|
|
|
/**
|
|
* \defgroup SynchI2C Synchronous I2C Hardware Abstraction Layer for slave
|
|
* @{
|
|
*/
|
|
|
|
/** Slave status
|
|
*
|
|
* @note Default status is Idle.
|
|
*/
|
|
typedef enum {
|
|
Idle = 0, // Slave has not been addressed.
|
|
ReadAddressed = 1, // Master has requested a read from this slave.
|
|
WriteGeneral = 2, // Master is writing to all slaves.
|
|
WriteAddressed = 3 // Master is writing to this slave.
|
|
} i2c_slave_status_t;
|
|
|
|
/** Check to see if the I2C slave has been addressed.
|
|
*
|
|
* @param obj The I2C object
|
|
* @return The status - i2c_slave_status_t indicating what state the peripheral
|
|
* is configured in.
|
|
*/
|
|
i2c_slave_status_t i2c_slave_status(i2c_t *obj);
|
|
|
|
/** Configure I2C address.
|
|
*
|
|
* @note This function does nothing when configured in master mode.
|
|
*
|
|
* @param obj The I2C object
|
|
* @param address The address to be set - 7 bit or 10 bit
|
|
*/
|
|
void i2c_slave_address(i2c_t *obj, uint16_t address);
|
|
|
|
#endif
|
|
|
|
/**@}*/
|
|
|
|
#if DEVICE_I2C_ASYNCH
|
|
|
|
/**
|
|
* \defgroup hal_AsynchI2C Asynchronous I2C Hardware Abstraction Layer
|
|
* @{
|
|
*/
|
|
|
|
/** Start I2C asynchronous transfer
|
|
*
|
|
* @param obj The I2C object
|
|
* @param tx The transmit buffer
|
|
* @param tx_length The number of bytes to transmit
|
|
* @param rx The receive buffer
|
|
* @param rx_length The number of bytes to receive
|
|
* @param address The address to be set - 7 bit or 10 bit
|
|
* @param stop If true, stop is generated after the transfer is done
|
|
* @param handler The I2C IRQ handler to be set
|
|
* @param ctx The context pointer
|
|
* @return true if the transfer was successfully scheduled, false otherwise
|
|
*/
|
|
bool i2c_transfer_async(i2c_t *obj, const uint8_t *tx, uint32_t tx_length,
|
|
uint8_t *rx, uint32_t rx_length, uint16_t address,
|
|
bool stop, i2c_async_handler_f handler, void *ctx);
|
|
|
|
/** Abort asynchronous transfer
|
|
*
|
|
* This function does not perform any check - that should happen in upper
|
|
* layers.
|
|
*
|
|
* @param obj The I2C object
|
|
*/
|
|
void i2c_abort_async(i2c_t *obj);
|
|
|
|
#endif
|
|
|
|
/**@}*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
/** @}*/
|