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mbed-os/targets/TARGET_Cypress/TARGET_PSOC6/psoc6cm0p
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Volodymyr Medvid 9d983478d7 PSOC6: add psoc6cm0p asset with prebuilt CM0+ C arrays 2019-07-08 10:33:48 +01:00
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TARGET_CM0P_SLEEP PSOC6: add psoc6cm0p asset with prebuilt CM0+ C arrays 2019-07-08 10:33:48 +01:00
LICENSE PSOC6: add psoc6cm0p asset with prebuilt CM0+ C arrays 2019-07-08 10:33:48 +01:00
README.md PSOC6: add psoc6cm0p asset with prebuilt CM0+ C arrays 2019-07-08 10:33:48 +01:00

README.md

PSoC 6 Cortex M0+ prebuilt images

Overview

Precompiled application images executed on Cortex M0+ core of the PSoC 6 dual-core MCU. The images are provided as C arrays ready to be compiled as part of the Cortex M4 application. The Cortex M0+ application code is placed to internal flash by the Cortex M4 linker script.

Images

  • CM0P_SLEEP

    This image starts CM4 core at CY_CORTEX_M4_APPL_ADDR=0x10008000 and puts CM0+ core into a deep sleep.

More information

Use the following links for more information, as needed:

Copyright (c) Cypress Semiconductor Corporation, 2019.