mirror of https://github.com/ARMmbed/mbed-os.git
180 lines
6.4 KiB
C
180 lines
6.4 KiB
C
/******************************************************************************
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* @file dac.h
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* @version V1.00
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* $Revision: 4 $
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* $Date: 14/09/08 12:31p $
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* @brief NANO100 series DAC driver header file
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*
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* @note
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* Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#ifndef __DAC_H__
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#define __DAC_H__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/** @addtogroup NANO100_Device_Driver NANO100 Device Driver
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@{
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*/
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/** @addtogroup NANO100_DAC_Driver DAC Driver
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@{
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*/
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/** @addtogroup NANO100_DAC_EXPORTED_CONSTANTS DAC Exported Constants
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@{
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*/
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#define DAC_WRITE_DAT_TRIGGER (0UL << DAC_CTL_DACLSEL_Pos) ///< Write DACx_DAT trigger \hideinitializer
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#define DAC_PDMA_TRIGGER (1UL << DAC_CTL_DACLSEL_Pos) ///< PDMA trigger \hideinitializer
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#define DAC_TIMER0_TRIGGER (2UL << DAC_CTL_DACLSEL_Pos) ///< Timer 0 trigger \hideinitializer
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#define DAC_TIMER1_TRIGGER (3UL << DAC_CTL_DACLSEL_Pos) ///< Timer 1 trigger \hideinitializer
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#define DAC_TIMER2_TRIGGER (4UL << DAC_CTL_DACLSEL_Pos) ///< Timer 2 trigger \hideinitializer
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#define DAC_TIMER3_TRIGGER (5UL << DAC_CTL_DACLSEL_Pos) ///< Timer 3 trigger \hideinitializer
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#define DAC_REFSEL_POWER (0UL << DAC_COMCTL_REFSEL_Pos) ///< DAC reference voltage source selection set to power \hideinitializer
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#define DAC_REFSEL_INT_VREF (1UL << DAC_COMCTL_REFSEL_Pos) ///< DAC reference voltage source selection set to Int_VREF \hideinitializer
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#define DAC_REFSEL_VREF (2UL << DAC_COMCTL_REFSEL_Pos) ///< DAC reference voltage source selection set to VREF \hideinitializer
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/*@}*/ /* end of group NANO100_DAC_EXPORTED_CONSTANTS */
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/** @addtogroup NANO100_DAC_EXPORTED_FUNCTIONS DAC Exported Functions
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@{
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*/
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/**
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* @brief Write data for conversion.
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* @param[in] dac Base address of DAC module.
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* @param[in] u32Ch DAC channel number, could be 0 or 1
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* @param[in] u32Data Decides the data for conversion, valid range are between 0~0xFFF.
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* @return None
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* \hideinitializer
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*/
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#define DAC_WRITE_DATA(dac, u32Ch, u32Data) do {\
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if(u32Ch) {\
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DAC->DATA1 = u32Data;\
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} else {\
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DAC->DATA0 = u32Data;\
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}\
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}while(0)
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/**
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* @brief Enable DAC group mode
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* @param[in] dac Base address of DAC module.
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* @return None
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* \hideinitializer
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*/
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#define DAC_ENABLE_GROUP_MODE(dac) (DAC->COMCTL |= DAC_COMCTL_DAC01GRP_Msk)
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/**
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* @brief Disable DAC group mode
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* @param[in] dac Base address of DAC module.
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* @return None
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* \hideinitializer
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*/
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#define DAC_DISABLE_GROUP_MODE(dac) (DAC->COMCTL &= ~DAC_COMCTL_DAC01GRP_Msk)
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/**
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* @brief Get the busy state of DAC.
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* @param[in] dac Base address of DAC module.
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* @param[in] u32Ch DAC channel number, could be 0 or 1
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* @return If DAC is able to convert or not.
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* @retval 0 DAC is in idle state.
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* @retval 1 DAC is in busy state, or DAC is not in ready state.
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* @details If this macro returns 1, DAC is \b not in ready state. Ether DAC is busy or not in ready state.
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* \hideinitializer
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*/
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#define DAC_IS_BUSY(dac, u32Ch) (inp32(DAC_BASE + 0x8 + 0x10 * (u32Ch)) & DAC_STS_BUSY_Msk ? 1 : 0)
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/**
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* @brief Get the interrupt flag of specified channel.
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* @param[in] dac Base address of DAC module.
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* @param[in] u32Ch DAC channel number, could be 0 or 1
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* @return Returns the interrupt flag of selected channel.
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* @retval 0 DAC interrupt flag is not set.
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* @retval 1 DAC interrupt flag is set.
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* \hideinitializer
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*/
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#define DAC_GET_INT_FLAG(dac, u32Ch) (inp32(DAC_BASE + 0x8 + 0x10 * (u32Ch)) & DAC_STS_DACIFG_Msk ? 1 : 0)
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/**
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* @brief This macro clear the interrupt status bit of specified channel.
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* @param[in] dac Base address of DAC module.
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* @param[in] u32Ch DAC channel number, could be 0 or 1
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* @return None
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* \hideinitializer
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*/
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#define DAC_CLR_INT_FLAG(dac, u32Ch) do {\
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if(u32Ch)\
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DAC->STS1 = DAC_STS_DACIFG_Msk;\
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else\
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DAC->STS0 = DAC_STS_DACIFG_Msk;\
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}while(0)
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/**
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* @brief Set the DAC reference voltage. This setting affects both DAC channel
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* @param[in] dac Base address of DAC module
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* @param[in] u32Ref The reference voltage selection. Valid values are:
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* - \ref DAC_REFSEL_POWER
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* - \ref DAC_REFSEL_INT_VREF
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* - \ref DAC_REFSEL_VREF
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* @return None
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* \hideinitializer
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*/
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#define DAC_SET_REF_VOLTAGE(dac, u32Ref) (DAC->COMCTL = ((DAC->COMCTL) & ~DAC_COMCTL_REFSEL_Msk) | u32Ref)
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/**
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* @brief This macro enable the interrupt of specified channel.
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* @param[in] dac Base address of DAC module.
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* @param[in] u32Ch DAC channel number, could be 0 or 1
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* @return None
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* \hideinitializer
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*/
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#define DAC_ENABLE_INT(dac, u32Ch) do {\
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if(u32Ch)\
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DAC->CTL1 |= DAC_CTL_DACIE_Msk;\
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else\
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DAC->CTL0 |= DAC_CTL_DACIE_Msk;\
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}while(0)
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/**
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* @brief This macro disable the interrupt of specified channel.
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* @param[in] dac Base address of DAC module.
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* @param[in] u32Ch DAC channel number, could be 0 or 1
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* @return None
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* \hideinitializer
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*/
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#define DAC_DISABLE_INT(dac, u32Ch) do {\
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if(u32Ch)\
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DAC->CTL1 &= ~DAC_CTL_DACIE_Msk;\
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else\
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DAC->CTL0 &= ~DAC_CTL_DACIE_Msk;\
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}while(0)
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void DAC_Open(DAC_T *dac, uint32_t u32Ch, uint32_t u32TrgSrc);
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void DAC_Close(DAC_T *dac, uint32_t u32Ch);
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int DAC_SetDelayTime(DAC_T *dac, uint32_t u32Delay);
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/*@}*/ /* end of group NANO100_DAC_EXPORTED_FUNCTIONS */
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/*@}*/ /* end of group NANO100_DAC_Driver */
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/*@}*/ /* end of group NANO100_Device_Driver */
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#ifdef __cplusplus
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}
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#endif
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#endif //__DAC_H__
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/*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/
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