mirror of https://github.com/ARMmbed/mbed-os.git
181 lines
8.6 KiB
C
181 lines
8.6 KiB
C
/*******************************************************************************
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* Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*******************************************************************************
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*/
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#ifndef _MXC_DAC_REGS_H
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#define _MXC_DAC_REGS_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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/**
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* @file dac_regs.h
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* @addtogroup dac DAC
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* @{
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*/
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/**
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* @brief Defines the DAC Operational Modes.
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*/
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typedef enum {
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/** DAC OpMode FIFO */
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MXC_E_DAC_OP_MODE_FIFO = 0,
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/** DAC OpMode Sample Count */
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MXC_E_DAC_OP_MODE_DACSMPLCNT,
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/** DAC OpMode DAC_REG Control */
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MXC_E_DAC_OP_MODE_DAC_REG,
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/** DAC OpMode Continuous */
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MXC_E_DAC_OP_MODE_CONTINUOUS
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} mxc_dac_op_mode_t;
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/**
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* @brief Defines the DAC Interpolation Options.
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*/
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typedef enum {
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/** DAC Interpolation is Disabled */
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MXC_E_DAC_INTERP_MODE_DISABLED = 0,
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/** DAC Interpolation 2:1 */
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MXC_E_DAC_INTERP_MODE_2_TO_1,
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/** DAC Interpolation 4:1 */
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MXC_E_DAC_INTERP_MODE_4_TO_1,
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/** DAC Interpolation 8:1 */
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MXC_E_DAC_INTERP_MODE_8_TO_1
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} mxc_dac_interp_mode_t;
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/**
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* @brief Defines the DAC Start Modes.
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*/
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typedef enum {
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/** Start on FIFO Not Empty */
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MXC_E_DAC_START_MODE_FIFO_NOT_EMPTY = 0,
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/** Start on ADC generated Start Strobe */
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MXC_E_DAC_START_MODE_ADC_STROBE,
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/** Start on DAC generated Start Strobe */
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MXC_E_DAC_START_MODE_DAC_STROBE
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} mxc_dac_start_mode_t;
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/* Offset Register Description
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====== ================================================== */
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typedef struct {
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__IO uint32_t ctrl0; /* 0x0000 DAC Control Register 0 */
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__IO uint32_t rate; /* 0x0004 DAC Output Rate Control */
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__IO uint32_t ctrl1_int; /* 0x0008 DAC Control Register 1, Interrupt Flags and Enable */
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__IO uint32_t reg; /* 0x000C DAC Data Register */
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__IO uint32_t trm; /* 0x0010 DAC Trim Register */
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} mxc_dac_regs_t;
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/* Offset Register Description
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====== ================================================== */
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typedef struct {
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union {
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__IO uint8_t output_8; /* 0x0000 Write to push values to DAC output FIFO */
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__IO uint16_t output_16; /* 0x0000 Write to push values to DAC output FIFO */
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};
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} mxc_dac_fifo_regs_t;
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/*
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Register offsets for module DAC12.
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*/
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#define MXC_R_DAC_OFFS_CTRL0 ((uint32_t)0x00000000UL)
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#define MXC_R_DAC_OFFS_RATE ((uint32_t)0x00000004UL)
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#define MXC_R_DAC_OFFS_CTRL1_INT ((uint32_t)0x00000008UL)
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#define MXC_R_DAC_FIFO_OFFS_OUTPUT ((uint32_t)0x00000000UL)
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/*
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Field positions and masks for module DAC.
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*/
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#define MXC_F_DAC_CTRL0_FIFO_AE_CNT_POS 0
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#define MXC_F_DAC_CTRL0_FIFO_AE_CNT ((uint32_t)(0x0000000FUL << MXC_F_DAC_CTRL0_FIFO_AE_CNT_POS))
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#define MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL_POS 5
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#define MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL_POS))
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#define MXC_F_DAC_CTRL0_FIFO_EMPTY_POS 6
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#define MXC_F_DAC_CTRL0_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_EMPTY_POS))
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#define MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY_POS 7
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#define MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY_POS))
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#define MXC_F_DAC_CTRL0_INTERP_MODE_POS 8
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#define MXC_F_DAC_CTRL0_INTERP_MODE ((uint32_t)(0x00000007UL << MXC_F_DAC_CTRL0_INTERP_MODE_POS))
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#define MXC_F_DAC_CTRL0_FIFO_AF_CNT_POS 12
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#define MXC_F_DAC_CTRL0_FIFO_AF_CNT ((uint32_t)(0x0000000FUL << MXC_F_DAC_CTRL0_FIFO_AF_CNT_POS))
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#define MXC_F_DAC_CTRL0_START_MODE_POS 16
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#define MXC_F_DAC_CTRL0_START_MODE ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_START_MODE_POS))
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#define MXC_F_DAC_CTRL0_CPU_START_POS 20
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#define MXC_F_DAC_CTRL0_CPU_START ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_CPU_START_POS))
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#define MXC_F_DAC_CTRL0_OP_MODE_POS 24
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#define MXC_F_DAC_CTRL0_OP_MODE ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_OP_MODE_POS))
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#define MXC_F_DAC_CTRL0_POWER_MODE_1_0_POS 26
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#define MXC_F_DAC_CTRL0_POWER_MODE_1_0 ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_POWER_MODE_1_0_POS))
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#define MXC_F_DAC_CTRL0_POWER_ON_POS 28
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#define MXC_F_DAC_CTRL0_POWER_ON ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_POWER_ON_POS))
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#define MXC_F_DAC_CTRL0_CLOCK_GATE_EN_POS 29
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#define MXC_F_DAC_CTRL0_CLOCK_GATE_EN ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_CLOCK_GATE_EN_POS))
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#define MXC_F_DAC_CTRL0_POWER_MODE_2_POS 30
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#define MXC_F_DAC_CTRL0_POWER_MODE_2 ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_POWER_MODE_2_POS))
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#define MXC_F_DAC_CTRL0_RESET_POS 31
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#define MXC_F_DAC_CTRL0_RESET ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_RESET_POS))
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#define MXC_F_DAC_RATE_RATE_CNT_POS 0
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#define MXC_F_DAC_RATE_RATE_CNT ((uint32_t)(0x0000FFFFUL << MXC_F_DAC_RATE_RATE_CNT_POS))
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#define MXC_F_DAC_RATE_SAMPLE_CNT_POS 16
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#define MXC_F_DAC_RATE_SAMPLE_CNT ((uint32_t)(0x0000FFFFUL << MXC_F_DAC_RATE_SAMPLE_CNT_POS))
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#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IF_POS 0
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#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IF ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_OUT_DONE_IF_POS))
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#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF_POS 1
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#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF_POS))
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#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF_POS 2
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#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF_POS))
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#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_POS 3
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#define MXC_F_DAC_CTRL1_INT_UNDERFLOW ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_POS))
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#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IE_POS 16
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#define MXC_F_DAC_CTRL1_INT_OUT_DONE_IE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_OUT_DONE_IE_POS))
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#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE_POS 17
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#define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE_POS))
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#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE_POS 18
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#define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE_POS))
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#define MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE_POS 28
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#define MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE_POS))
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#define MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE_POS 29
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#define MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE_POS))
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#ifdef __cplusplus
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}
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#endif
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/**
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* @}
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*/
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#endif /* _DAC12_REGS_H */
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