mirror of https://github.com/ARMmbed/mbed-os.git
233 lines
7.4 KiB
C
233 lines
7.4 KiB
C
/*******************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*
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* $Date: 2016-05-18 16:27:43 -0500 (Wed, 18 May 2016) $
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* $Revision: 22908 $
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*
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******************************************************************************/
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/**
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* @file spis.s
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* @brief SPI Slave driver header file.
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*/
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#include "mxc_config.h"
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#include "mxc_sys.h"
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#include "spis_regs.h"
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#ifndef _SPIS_H_
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#define _SPIS_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***** Definitions *****/
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/// @brief Number of data lines to use.
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typedef enum {
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SPIS_WIDTH_1 = 0,
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SPIS_WIDTH_2 = 1,
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SPIS_WIDTH_4 = 2
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} spis_width_t;
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/// @brief SPIS Transaction request.
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typedef struct spis_req spis_req_t;
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struct spis_req {
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uint8_t deass; ///< End the transaction when SS is deasserted.
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const uint8_t *tx_data; ///< TX buffer.
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uint8_t *rx_data; ///< RX buffer.
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spis_width_t width; ///< Number of data lines to use.
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unsigned len; ///< Number of bytes to send.
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unsigned read_num; ///< Number of bytes transacted.
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unsigned write_num; ///< Number of bytes transacted.
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/**
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* @brief Callback for asynchronous request.
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* @param spis_req_t* Pointer to the transaction request.
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* @param int Error code.
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*/
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void (*callback)(spis_req_t*, int);
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};
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/***** Globals *****/
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/***** Function Prototypes *****/
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/**
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* @brief Initialize SPIS module.
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* @param spis Pointer to SPIS regs.
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* @param cfg Pointer to SPIS configuration.
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* @param mode SPI Mode to configure the slave.
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* @param sys_cfg Pointer to system configuration object.
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* @returns #E_NO_ERROR if everything is successful.
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*/
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int SPIS_Init(mxc_spis_regs_t *spis, uint8_t mode, const sys_cfg_spis_t *sys_cfg);
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/**
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* @brief Shutdown SPIS module.
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* @param spis Pointer to SPIS regs.
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* @returns #E_NO_ERROR if everything is successful
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*/
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int SPIS_Shutdown(mxc_spis_regs_t *spis);
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/**
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* @brief Read/write SPIS data. Will block until transaction is complete.
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* @param spis Pointer to SPIS regs.
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* @param req Request for a SPIS transaction.
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* @note Callback is ignored.
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* @returns Bytes transacted if everything is successful, error if unsuccessful.
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*/
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int SPIS_Trans(mxc_spis_regs_t *spis, spis_req_t *req);
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/**
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* @brief Asynchronously read/write SPIS data.
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* @param spis Pointer to SPIS regs.
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* @param req Request for a SPIS transaction.
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* @note Request struct must remain allocated until callback.
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* @returns #E_NO_ERROR if everything is successful, error if unsuccessful.
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*/
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int SPIS_TransAsync(mxc_spis_regs_t *spis, spis_req_t *req);
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/**
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* @brief Abort asynchronous request.
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* @param req Pointer to request for a SPIS transaction.
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* @returns #E_NO_ERROR if request aborted, error if unsuccessful.
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*/
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int SPIS_AbortAsync(spis_req_t *req);
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/**
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* @brief SPIS interrupt handler.
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* @details This function should be called by the application from the interrupt
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* handler if SPIS interrupts are enabled. Alternately, this function
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* can be periodically called by the application if SPIS interrupts are
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* disabled.
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* @param spis Base address of the SPIS module.
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*/
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void SPIS_Handler(mxc_spis_regs_t *spis);
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/**
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* @brief Check the SPIS to see if it's busy.
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* @param spis Pointer to SPIS regs.
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* @returns #E_NO_ERROR if idle, #E_BUSY if in use.
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*/
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int SPIS_Busy(mxc_spis_regs_t *spis);
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/**
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* @brief Attempt to prepare the SPIS for sleep.
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* @param spis Pointer to SPIS regs.
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* @details Checks for any ongoing transactions. Disables interrupts if the SPIS
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is idle.
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* @returns #E_NO_ERROR if ready to sleep, #E_BUSY if not ready for sleep.
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*/
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int SPIS_PrepForSleep(mxc_spis_regs_t *spis);
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/**
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* @brief Enables the SPIS without overwriting existing configuration.
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* @param spis Pointer to SPIS regs.
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*/
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__STATIC_INLINE void SPIS_Enable(mxc_spis_regs_t *spis)
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{
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spis->gen_ctrl |= (MXC_F_SPIS_GEN_CTRL_SPI_SLAVE_EN |
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MXC_F_SPIS_GEN_CTRL_TX_FIFO_EN | MXC_F_SPIS_GEN_CTRL_RX_FIFO_EN);
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}
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/**
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* @brief Drain all of the data in the RXFIFO.
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* @param spis Pointer to UART regs.
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*/
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__STATIC_INLINE void SPIS_DrainRX(mxc_spis_regs_t *spis)
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{
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uint32_t ctrl_save = spis->gen_ctrl;
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spis->gen_ctrl = (ctrl_save & ~MXC_F_SPIS_GEN_CTRL_RX_FIFO_EN);
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spis->gen_ctrl = ctrl_save;
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}
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/**
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* @brief Drain all of the data in the TXFIFO.
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* @param spis Pointer to UART regs.
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*/
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__STATIC_INLINE void SPIS_DrainTX(mxc_spis_regs_t *spis)
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{
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uint32_t ctrl_save = spis->gen_ctrl;
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spis->gen_ctrl = (ctrl_save & ~MXC_F_SPIS_GEN_CTRL_TX_FIFO_EN);
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spis->gen_ctrl = ctrl_save;
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}
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/**
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* @brief TX FIFO availability.
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* @param spis Pointer to UART regs.
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* @returns Number of empty bytes available in write FIFO.
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*/
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__STATIC_INLINE unsigned SPIS_NumWriteAvail(mxc_spis_regs_t *spis)
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{
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return (MXC_CFG_SPIS_FIFO_DEPTH - ((spis->fifo_stat &
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MXC_F_SPIS_FIFO_STAT_TX_FIFO_USED) >> MXC_F_SPIS_FIFO_STAT_TX_FIFO_USED_POS));
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}
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/**
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* @brief RX FIFO availability.
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* @param spis Pointer to UART regs.
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* @returns Number of bytes in read FIFO.
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*/
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__STATIC_INLINE unsigned SPIS_NumReadAvail(mxc_spis_regs_t *spis)
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{
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return ((spis->fifo_stat & MXC_F_SPIS_FIFO_STAT_RX_FIFO_USED) >>
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MXC_F_SPIS_FIFO_STAT_RX_FIFO_USED_POS);
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}
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/**
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* @brief Clear interrupt flags.
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* @param spis Pointer to SPIS regs.
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* @param mask Mask of interrupts to clear.
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*/
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__STATIC_INLINE void SPIS_ClearFlags(mxc_spis_regs_t *spis, uint32_t mask)
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{
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spis->intfl = mask;
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}
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/**
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* @brief Get interrupt flags.
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* @param spis Pointer to SPIS regs.
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* @returns Mask of active flags.
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*/
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__STATIC_INLINE unsigned SPIS_GetFlags(mxc_spis_regs_t *spis)
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{
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return (spis->intfl);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SPIS_H_ */
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