mirror of https://github.com/ARMmbed/mbed-os.git
592 lines
19 KiB
C
592 lines
19 KiB
C
/**
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* @file owm.c
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* @brief 1-Wire Master (OWM) API Function Implementations.
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*/
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/* *****************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*
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* $Date: 2016-03-14 10:08:53 -0500 (Mon, 14 Mar 2016) $
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* $Revision: 21855 $
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*
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**************************************************************************** */
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/* **** Includes **** */
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#include <string.h>
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#include "mxc_assert.h"
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#include "mxc_sys.h"
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#include "owm.h"
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/**
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* @ingroup owm
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* @{
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*/
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///@cond
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/* **** Definitions **** */
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#define OWM_CLK_FREQ 1000000 //1-Wire requires 1MHz clock
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/* **** Globals **** */
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int LastDiscrepancy;
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int LastDeviceFlag;
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/* **** Functions **** */
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static uint8_t CalculateCRC8(uint8_t* data, int len);
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static uint8_t update_crc8(uint8_t crc, uint8_t value);
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///@endcond
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/* ************************************************************************* */
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int OWM_Init(mxc_owm_regs_t *owm, const owm_cfg_t *cfg, const sys_cfg_owm_t *sys_cfg)
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{
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int err = 0;
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uint32_t owm_clk, clk_div = 0;
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uint32_t ext_pu_mode = 0;
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uint32_t ext_pu_polarity = 0;
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// Check the OWM register pointer is valid
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MXC_ASSERT(MXC_OWM_GET_IDX(owm) >= 0);
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if(cfg == NULL) {
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return E_NULL_PTR;
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}
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// Set system level configurations
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if ((err = SYS_OWM_Init(owm, sys_cfg)) != E_NO_ERROR) {
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return err;
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}
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// Configure clk divisor to get 1MHz OWM clk
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owm_clk = SYS_OWM_GetFreq(owm);
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if(owm_clk == 0) {
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return E_UNINITIALIZED;
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}
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// Return error if clk doesn't divide evenly to 1MHz
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if(owm_clk % OWM_CLK_FREQ) {
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return E_NOT_SUPPORTED;
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}
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clk_div = (owm_clk / (OWM_CLK_FREQ));
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// Can not support lower frequencies
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if(clk_div == 0) {
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return E_NOT_SUPPORTED;
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}
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// Select the PU mode and polarity based on cfg input
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switch(cfg->ext_pu_mode) {
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case OWM_EXT_PU_ACT_HIGH:
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ext_pu_mode = MXC_V_OWM_CFG_EXT_PULLUP_MODE_USED;
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ext_pu_polarity = MXC_V_OWM_CTRL_STAT_EXT_PULLUP_POL_ACT_HIGH;
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break;
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case OWM_EXT_PU_ACT_LOW:
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ext_pu_mode = MXC_V_OWM_CFG_EXT_PULLUP_MODE_USED;
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ext_pu_polarity = MXC_V_OWM_CTRL_STAT_EXT_PULLUP_POL_ACT_LOW;
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break;
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case OWM_EXT_PU_UNUSED:
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ext_pu_mode = MXC_V_OWM_CFG_EXT_PULLUP_MODE_UNUSED;
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ext_pu_polarity = MXC_V_OWM_CTRL_STAT_EXT_PULLUP_POL_ACT_HIGH;
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break;
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default:
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return E_BAD_PARAM;
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}
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// Set clk divisor
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owm->clk_div_1us = (clk_div << MXC_F_OWM_CLK_DIV_1US_DIVISOR_POS) & MXC_F_OWM_CLK_DIV_1US_DIVISOR;
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// Set configuration
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owm->cfg = (((cfg->int_pu_en << MXC_F_OWM_CFG_INT_PULLUP_ENABLE_POS) & MXC_F_OWM_CFG_INT_PULLUP_ENABLE) |
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((ext_pu_mode << MXC_F_OWM_CFG_EXT_PULLUP_MODE_POS) & MXC_F_OWM_CFG_EXT_PULLUP_MODE) |
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((cfg->long_line_mode << MXC_F_OWM_CFG_LONG_LINE_MODE) & MXC_F_OWM_CFG_LONG_LINE_MODE_POS));
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owm->ctrl_stat = (((ext_pu_polarity << MXC_F_OWM_CTRL_STAT_EXT_PULLUP_POL_POS) & MXC_F_OWM_CTRL_STAT_EXT_PULLUP_POL) |
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((cfg->overdrive_spec << MXC_F_OWM_CTRL_STAT_OD_SPEC_MODE_POS) & MXC_F_OWM_CTRL_STAT_OD_SPEC_MODE));
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// Clear all interrupt flags
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owm->intfl = owm->intfl;
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return E_NO_ERROR;
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}
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/* ************************************************************************* */
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int OWM_Shutdown(mxc_owm_regs_t *owm)
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{
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int err;
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// Disable and clear interrupts
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owm->inten = 0;
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owm->intfl = owm->intfl;
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// Release IO pins and disable clk
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if ((err = SYS_OWM_Shutdown(owm)) != E_NO_ERROR) {
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return err;
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}
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return E_NO_ERROR;
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}
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/* ************************************************************************* */
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int OWM_Reset(mxc_owm_regs_t *owm)
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{
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owm->intfl = MXC_F_OWM_INTFL_OW_RESET_DONE; // Clear the reset flag
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owm->ctrl_stat |= MXC_F_OWM_CTRL_STAT_START_OW_RESET; // Generate a reset pulse
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while((owm->intfl & MXC_F_OWM_INTFL_OW_RESET_DONE) == 0); // Wait for reset time slot to complete
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return (!!(owm->ctrl_stat & MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT)); // Return presence pulse detect status
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}
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/* ************************************************************************* */
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int OWM_TouchByte(mxc_owm_regs_t *owm, uint8_t data)
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{
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owm->cfg &= ~MXC_F_OWM_CFG_SINGLE_BIT_MODE; // Set to 8 bit mode
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owm->intfl = (MXC_F_OWM_INTFL_TX_DATA_EMPTY | MXC_F_OWM_INTFL_RX_DATA_READY); // Clear the flags
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owm->data = (data << MXC_F_OWM_DATA_TX_RX_POS) & MXC_F_OWM_DATA_TX_RX; // Write data
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while((owm->intfl & MXC_F_OWM_INTFL_TX_DATA_EMPTY) == 0); // Wait for data to be sent
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while((owm->intfl & MXC_F_OWM_INTFL_RX_DATA_READY) == 0); // Wait for data to be read
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return (owm->data >> MXC_F_OWM_DATA_TX_RX_POS) & 0xFF; // Return the data read
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}
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/* ************************************************************************* */
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int OWM_WriteByte(mxc_owm_regs_t *owm, uint8_t data)
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{
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// Send one byte of data and verify the data sent = data parameter
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return (OWM_TouchByte(owm, data) == data) ? E_NO_ERROR : E_COMM_ERR;
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}
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/* ************************************************************************* */
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int OWM_ReadByte(mxc_owm_regs_t *owm)
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{
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// Read one byte of data
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return OWM_TouchByte(owm, 0xFF);
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}
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/* ************************************************************************* */
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int OWM_TouchBit(mxc_owm_regs_t *owm, uint8_t bit)
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{
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MXC_OWM->cfg |= MXC_F_OWM_CFG_SINGLE_BIT_MODE; // Set to 1 bit mode
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owm->intfl = (MXC_F_OWM_INTFL_TX_DATA_EMPTY | MXC_F_OWM_INTFL_RX_DATA_READY); // Clear the flags
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owm->data = (bit << MXC_F_OWM_DATA_TX_RX_POS) & MXC_F_OWM_DATA_TX_RX; // Write data
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while((owm->intfl & MXC_F_OWM_INTFL_TX_DATA_EMPTY) == 0); // Wait for data to be sent
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while((owm->intfl & MXC_F_OWM_INTFL_RX_DATA_READY) == 0); // Wait for data to be read
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return (owm->data >> MXC_F_OWM_DATA_TX_RX_POS) & 0x1; // Return the bit read
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}
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/* ************************************************************************* */
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int OWM_WriteBit(mxc_owm_regs_t *owm, uint8_t bit)
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{
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// Send a bit and verify the bit sent = bit parameter
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return (OWM_TouchBit(owm, bit) == bit) ? E_NO_ERROR : E_COMM_ERR;
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}
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/* ************************************************************************* */
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int OWM_ReadBit(mxc_owm_regs_t *owm)
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{
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// Read a bit
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return OWM_TouchBit(owm, 1);
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}
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/* ************************************************************************* */
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int OWM_Write(mxc_owm_regs_t *owm, uint8_t* data, int len)
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{
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int num = 0;
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owm->cfg &= ~MXC_F_OWM_CFG_SINGLE_BIT_MODE; // Set to 8 bit mode
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while(num < len) { // Loop for number of bytes to write
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owm->intfl = (MXC_F_OWM_INTFL_TX_DATA_EMPTY | MXC_F_OWM_INTFL_RX_DATA_READY | MXC_F_OWM_INTEN_LINE_SHORT); // Clear the flags
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owm->data = (data[num] << MXC_F_OWM_DATA_TX_RX_POS) & MXC_F_OWM_DATA_TX_RX; // Write data
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while((owm->intfl & MXC_F_OWM_INTFL_TX_DATA_EMPTY) == 0); // Wait for data to be sent
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while((owm->intfl & MXC_F_OWM_INTFL_RX_DATA_READY) == 0); // Wait for data to be read
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// Verify data sent is correct
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if(owm->data != data[num]) {
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return E_COMM_ERR;
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}
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// Check error flag
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if(owm->intfl & MXC_F_OWM_INTEN_LINE_SHORT) {
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return E_COMM_ERR; // Wire was low before transaction
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}
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num++; // Keep track of how many bytes written
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}
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return num; // Return number of bytes written
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}
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/* ************************************************************************* */
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int OWM_Read(mxc_owm_regs_t *owm, uint8_t* data, int len)
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{
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int num = 0;
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owm->cfg &= ~MXC_F_OWM_CFG_SINGLE_BIT_MODE; // Set to 8 bit mode
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while(num < len) { // Loop for number of bytes to read
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owm->intfl = (MXC_F_OWM_INTFL_TX_DATA_EMPTY | MXC_F_OWM_INTFL_RX_DATA_READY | MXC_F_OWM_INTEN_LINE_SHORT); // Clear the flags
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owm->data = 0xFF; // Write 0xFF for a read
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while((owm->intfl & MXC_F_OWM_INTFL_TX_DATA_EMPTY) == 0); // Wait for data to be sent
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while((owm->intfl & MXC_F_OWM_INTFL_RX_DATA_READY) == 0); // Wait for data to be read
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// Check error flag
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if(owm->intfl & MXC_F_OWM_INTEN_LINE_SHORT) {
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return E_COMM_ERR; // Wire was low before transaction
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}
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// Store read data into buffer
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data[num] = (owm->data >> MXC_F_OWM_DATA_TX_RX_POS) & MXC_F_OWM_DATA_TX_RX;
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num++; // Keep track of how many bytes read
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}
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return num; // Return number of bytes read
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}
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/* ************************************************************************* */
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int OWM_ReadROM(mxc_owm_regs_t *owm, uint8_t* ROMCode)
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{
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int num_read = 0;
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// Send reset and wait for presence pulse
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if(OWM_Reset(owm)) {
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// Send Read ROM command code
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if(OWM_WriteByte(owm, READ_ROM_COMMAND) == E_NO_ERROR) {
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// Read 8 bytes and store in buffer
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num_read = OWM_Read(owm, ROMCode, 8);
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// Check the number of bytes read
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if(num_read != 8) {
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return E_COMM_ERR;
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}
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} else {
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// Write failed
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return E_COMM_ERR;
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}
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} else {
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// No presence pulse
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return E_COMM_ERR;
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}
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return E_NO_ERROR;
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}
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/* ************************************************************************* */
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int OWM_MatchROM(mxc_owm_regs_t *owm, uint8_t* ROMCode)
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{
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int num_wrote = 0;
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// Send reset and wait for presence pulse
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if(OWM_Reset(owm)) {
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// Send match ROM command code
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if(OWM_WriteByte(owm, MATCH_ROM_COMMAND) == E_NO_ERROR) {
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// Write 8 bytes in ROMCode buffer
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num_wrote = OWM_Write(owm, ROMCode, 8);
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// Check the number of bytes written
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if(num_wrote != 8) {
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return E_COMM_ERR;
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}
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} else {
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// Write failed
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return E_COMM_ERR;
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}
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} else {
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// No presence pulse
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return E_COMM_ERR;
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}
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return E_NO_ERROR;
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}
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/* ************************************************************************* */
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int OWM_ODMatchROM(mxc_owm_regs_t *owm, uint8_t* ROMCode)
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{
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int num_wrote = 0;
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// Set to standard speed
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owm->cfg &= ~(MXC_F_OWM_CFG_OVERDRIVE);
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// Send reset and wait for presence pulse
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if(OWM_Reset(owm)) {
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// Send Overdrive match ROM command code
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if(OWM_WriteByte(owm, OD_MATCH_ROM_COMMAND) == E_NO_ERROR) {
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// Set overdrive
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owm->cfg |= MXC_F_OWM_CFG_OVERDRIVE;
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// Write 8 bytes in ROMCode buffer
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num_wrote = OWM_Write(owm, ROMCode, 8);
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// Check the number of bytes written
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if(num_wrote != 8) {
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return E_COMM_ERR;
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}
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} else {
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// Write failed
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return E_COMM_ERR;
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}
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} else {
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// No presence pulse
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return E_COMM_ERR;
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}
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return E_NO_ERROR;
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}
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/* ************************************************************************* */
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int OWM_SkipROM(mxc_owm_regs_t *owm)
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{
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// Send reset and wait for presence pulse
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if(OWM_Reset(owm)) {
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// Send skip ROM command code
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return OWM_WriteByte(owm, SKIP_ROM_COMMAND);
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} else {
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// No presence pulse
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return E_COMM_ERR;
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}
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}
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/* ************************************************************************* */
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int OWM_ODSkipROM(mxc_owm_regs_t *owm)
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{
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// Set to standard speed
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owm->cfg &= ~(MXC_F_OWM_CFG_OVERDRIVE);
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// Send reset and wait for presence pulse
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if(OWM_Reset(owm)) {
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// Send Overdrive skip ROM command code
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if(OWM_WriteByte(owm, OD_SKIP_ROM_COMMAND) == E_NO_ERROR) {
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// Set overdrive speed
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owm->cfg |= MXC_F_OWM_CFG_OVERDRIVE;
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return E_NO_ERROR;
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} else {
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// Write failed
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return E_COMM_ERR;
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}
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} else {
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// No presence pulse
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return E_COMM_ERR;
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}
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}
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/* ************************************************************************* */
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int OWM_Resume(mxc_owm_regs_t *owm)
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{
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// Send reset and wait for presence pulse
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if(OWM_Reset(owm)) {
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// Send resume command code
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return OWM_WriteByte(owm, RESUME_COMMAND);
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} else {
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// No presence pulse
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return E_COMM_ERR;
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}
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}
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/* ************************************************************************* */
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int OWM_SearchROM(mxc_owm_regs_t *owm, int newSearch, uint8_t* ROMCode)
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{
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int nibble_start_bit = 1;
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int rom_byte_number = 0;
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uint8_t rom_nibble_mask = 0x0F;
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uint8_t search_direction = 0;
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int readValue = 0;
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int sentBits = 0;
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int discrepancy = 0;
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int bit_position = 0;
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int discrepancy_mask = 0;
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int last_zero = 0;
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uint8_t crc8 = 0;
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int search_result = 0;
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// Clear ROM array
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memset(ROMCode, 0x0, 8);
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if(newSearch) {
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// Reset all global variables to start search from begining
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LastDiscrepancy = 0;
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LastDeviceFlag = 0;
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}
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// Check if the last call was the last device
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if(LastDeviceFlag) {
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// Reset the search
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LastDiscrepancy = 0;
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LastDeviceFlag = 0;
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return 0;
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}
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// Send reset and wait for presence pulse
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if (OWM_Reset(owm)) {
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// Send the search command
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OWM_WriteByte(owm, SEARCH_ROM_COMMAND);
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// Set search ROM accelerator bit
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owm->ctrl_stat |= MXC_F_OWM_CTRL_STAT_SRA_MODE;
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// Loop until through all ROM bytes 0-7 (this loops 2 times per byte)
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while(rom_byte_number < 8) {
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// Each loop finds the discrepancy bits and finds 4 bits (nibble) of the ROM
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// Set the search direction the same as last time for the nibble masked
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search_direction = ROMCode[rom_byte_number] & rom_nibble_mask;
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// If the upper nibble is the mask then shift bits to lower nibble
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if(rom_nibble_mask > 0x0F) {
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search_direction = search_direction >> 4;
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}
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// Get the last discrepancy bit position relative to the nibble start bit
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bit_position = LastDiscrepancy - nibble_start_bit;
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// Check if last discrepancy is witin this nibble
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if( (bit_position >= 0) && (bit_position < 4) ) {
|
|
// Last discrepancy is within this nibble
|
|
// Set the bit of the last discrepancy bit
|
|
search_direction |= (1 << (bit_position));
|
|
}
|
|
|
|
// Performs two read bits and a write bit for 4 bits of the ROM
|
|
readValue = OWM_TouchByte(owm, search_direction);
|
|
// Get discrepancy flags
|
|
discrepancy = readValue & 0xF;
|
|
// Get the 4 bits sent to select the ROM
|
|
sentBits = (readValue >> 4) & 0xF;
|
|
|
|
// Store the bit location of the MSB discrepancy with sentbit = 0
|
|
if(discrepancy) {
|
|
// Initialize bit_position to MSB of nibble
|
|
bit_position = 3;
|
|
|
|
while(bit_position >= 0) {
|
|
// Get discrepancy flag of the current bit position
|
|
discrepancy_mask = discrepancy & (1 << bit_position);
|
|
|
|
// If there is a discrepancy and the sent bit is 0 save this bit position
|
|
if( (discrepancy_mask) && !(sentBits & discrepancy_mask)) {
|
|
last_zero = nibble_start_bit + bit_position;
|
|
break;
|
|
}
|
|
|
|
bit_position--;
|
|
}
|
|
}
|
|
|
|
// Clear the nibble
|
|
ROMCode[rom_byte_number] &= ~rom_nibble_mask;
|
|
|
|
// Store the sentBits in the ROMCode
|
|
if(rom_nibble_mask > 0x0F) {
|
|
ROMCode[rom_byte_number] |= (sentBits << 4);
|
|
} else {
|
|
ROMCode[rom_byte_number] |= sentBits;
|
|
}
|
|
|
|
// Increment the nibble start bit and shift mask
|
|
nibble_start_bit += 4;
|
|
rom_nibble_mask <<= 4;
|
|
|
|
// If the mask is 0 then go to new ROM byte rom_byte_number and reset mask
|
|
if (rom_nibble_mask == 0) {
|
|
rom_byte_number++;
|
|
rom_nibble_mask = 0x0F;
|
|
}
|
|
|
|
} // End while(rom_byte_number < 8)
|
|
|
|
// Clear search ROM accelerator
|
|
owm->ctrl_stat &= ~(MXC_F_OWM_CTRL_STAT_SRA_MODE);
|
|
|
|
// Calculate CRC to verify ROM code is correct
|
|
crc8 = CalculateCRC8(ROMCode, 7);
|
|
|
|
// If the search was successful then
|
|
if ((nibble_start_bit >= 65) && (crc8 == ROMCode[7])) {
|
|
// Search successful so set LastDiscrepancy,LastDeviceFlag,search_result
|
|
LastDiscrepancy = last_zero;
|
|
|
|
// Check for last device
|
|
if (LastDiscrepancy == 0) {
|
|
LastDeviceFlag = 1;
|
|
}
|
|
|
|
search_result = 1;
|
|
}
|
|
} // End if (OWM_Reset)
|
|
|
|
// If no device found then reset counters so next 'search' will be like a first
|
|
if (!search_result || !ROMCode[0]) {
|
|
LastDiscrepancy = 0;
|
|
LastDeviceFlag = 0;
|
|
search_result = 0;
|
|
}
|
|
|
|
return search_result;
|
|
}
|
|
|
|
/*
|
|
* Calcualate CRC8 of the buffer of data provided
|
|
*/
|
|
uint8_t CalculateCRC8(uint8_t* data, int len)
|
|
{
|
|
int i;
|
|
uint8_t crc = 0;
|
|
|
|
for(i = 0; i < len; i++) {
|
|
crc = update_crc8(crc, data[i]);
|
|
}
|
|
|
|
return crc;
|
|
}
|
|
|
|
/*
|
|
* Calculate the CRC8 of the byte value provided with the current crc value
|
|
* provided Returns updated crc value
|
|
*/
|
|
uint8_t update_crc8(uint8_t crc, uint8_t val)
|
|
{
|
|
uint8_t inc, tmp;
|
|
|
|
for (inc = 0; inc < 8; inc++) {
|
|
tmp = (uint8_t)(crc << 7); // Save X7 bit value
|
|
crc >>= 1; // Shift crc
|
|
if (((tmp >> 7) ^ (val & 0x01)) == 1) { // If X7 xor X8 (input data)
|
|
crc ^= 0x8c; // XOR crc with X4 and X5, X1 = X7^X8
|
|
crc |= 0x80; // Carry
|
|
}
|
|
val >>= 1;
|
|
}
|
|
|
|
return crc;
|
|
}
|
|
|
|
/**@} end of group owm */
|