mirror of https://github.com/ARMmbed/mbed-os.git
344 lines
8.7 KiB
C
344 lines
8.7 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "mbed_assert.h"
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#include <math.h>
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#include "spi_api.h"
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#include "cmsis.h"
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#include "pinmap.h"
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#include "mbed_error.h"
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#include "RZ_A1_Init.h"
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#ifdef MAX_PERI
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static const PinMap PinMap_SPI_SCLK[] = {
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{P2_12 , SPI_0, 2},
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{P7_15 , SPI_0, 2},
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{P4_4 , SPI_1, 2},
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{P6_4 , SPI_1, 7},
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{P8_3 , SPI_2, 3},
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{P8_14 , SPI_2, 5},
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{P3_0 , SPI_3, 8},
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{P5_0 , SPI_3, 8},
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{P2_8 , SPI_4, 8},
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{P4_0 , SPI_4, 7},
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{NC , NC , 0}
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};
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static const PinMap PinMap_SPI_SSEL[] = {
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{P2_13 , SPI_0, 2},
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{P8_0 , SPI_0, 2},
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{P4_5 , SPI_1, 2},
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{P6_5 , SPI_1, 7},
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{P8_4 , SPI_2, 3},
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{P8_15 , SPI_2, 5},
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{P3_1 , SPI_3, 8},
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{P5_1 , SPI_3, 8},
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{P2_9 , SPI_4, 8},
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{P4_1 , SPI_4, 7},
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{NC , NC , 0}
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};
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static const PinMap PinMap_SPI_MOSI[] = {
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{P2_14 , SPI_0, 2},
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{P8_1 , SPI_0, 2},
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{P4_6 , SPI_1, 2},
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{P6_6 , SPI_1, 7},
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{P8_5 , SPI_2, 3},
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{P9_0 , SPI_2, 5},
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{P3_2 , SPI_3, 8},
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{P5_2 , SPI_3, 8},
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{P2_10 , SPI_4, 8},
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{P4_2 , SPI_4, 7},
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{NC , NC , 0}
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};
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static const PinMap PinMap_SPI_MISO[] = {
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{P2_15 , SPI_0, 2},
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{P8_2 , SPI_0, 2},
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{P4_7 , SPI_1, 2},
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{P6_7 , SPI_1, 7},
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{P8_6 , SPI_2, 3},
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{P9_1 , SPI_2, 5},
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{P3_3 , SPI_3, 8},
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{P5_3 , SPI_3, 8},
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{P2_11 , SPI_4, 8},
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{P4_3 , SPI_4, 7},
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{NC , NC , 0}
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};
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#else
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static const PinMap PinMap_SPI_SCLK[] = {
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{P4_4 , SPI_1, 2},
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{P8_14 , SPI_2, 5},
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{P5_0 , SPI_3, 8},
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{P4_0 , SPI_4, 7},
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{NC , NC , 0}
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};
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static const PinMap PinMap_SPI_SSEL[] = {
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{P4_5 , SPI_1, 2},
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{P8_15 , SPI_2, 5},
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{P5_1 , SPI_3, 8},
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{P4_1 , SPI_4, 7},
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{NC , NC , 0}
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};
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static const PinMap PinMap_SPI_MOSI[] = {
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{P4_6 , SPI_1, 2},
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{P9_0 , SPI_2, 5},
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{P5_2 , SPI_3, 8},
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{P4_2 , SPI_4, 7},
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{NC , NC , 0}
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};
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static const PinMap PinMap_SPI_MISO[] = {
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{P4_7 , SPI_1, 2},
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{P9_1 , SPI_2, 5},
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{P5_3 , SPI_3, 8},
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{P4_3 , SPI_4, 7},
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{NC , NC , 0}
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};
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#endif
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static const struct st_rspi *RSPI[] = RSPI_ADDRESS_LIST;
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static inline void spi_disable(spi_t *obj);
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static inline void spi_enable(spi_t *obj);
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static inline int spi_readable(spi_t *obj);
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static inline void spi_write(spi_t *obj, int value);
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static inline int spi_read(spi_t *obj);
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
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// determine the SPI to use
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volatile uint8_t dummy;
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uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
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uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
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uint32_t spi_sclk = pinmap_peripheral(sclk, PinMap_SPI_SCLK);
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uint32_t spi_ssel = pinmap_peripheral(ssel, PinMap_SPI_SSEL);
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uint32_t spi_data = pinmap_merge(spi_mosi, spi_miso);
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uint32_t spi_cntl = pinmap_merge(spi_sclk, spi_ssel);
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uint32_t spi = pinmap_merge(spi_data, spi_cntl);
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MBED_ASSERT((int)spi != NC);
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obj->spi = (struct st_rspi *)RSPI[spi];
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// enable power and clocking
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switch (spi) {
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case SPI_1: CPGSTBCR10 &= ~(0x40); break;
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case SPI_2: CPGSTBCR10 &= ~(0x20); break;
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case SPI_3: CPGSTBCR10 &= ~(0x10); break;
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case SPI_4: CPGSTBCR10 &= ~(0x08); break;
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}
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dummy = CPGSTBCR10;
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obj->spi->SPCR = 0x00; // CTRL to 0
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obj->spi->SPSCR = 0x00; // no sequential operation
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obj->spi->SSLP = 0x00; // SSL 'L' active
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obj->spi->SPDCR = 0x20; // byte access
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obj->spi->SPCKD = 0x00; // SSL -> enable CLK delay : 1RSPCK
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obj->spi->SSLND = 0x00; // CLK end -> SSL neg delay : 1RSPCK
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obj->spi->SPND = 0x00; // delay between CMD : 1RSPCK + 2P1CLK
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obj->spi->SPPCR = 0x20; // MOSI Idle fixed value equals 0
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obj->spi->SPBFCR = 0xf0; // and set trigger count: read 1, write 1
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obj->spi->SPBFCR = 0x30; // and reset buffer
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// pin out the spi pins
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pinmap_pinout(mosi, PinMap_SPI_MOSI);
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pinmap_pinout(miso, PinMap_SPI_MISO);
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pinmap_pinout(sclk, PinMap_SPI_SCLK);
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if ((int)ssel != NC) {
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pinmap_pinout(ssel, PinMap_SPI_SSEL);
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}
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}
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void spi_free(spi_t *obj) {}
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void spi_format(spi_t *obj, int bits, int mode, int slave) {
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int DSS; // DSS (data select size)
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int polarity = (mode & 0x2) ? 1 : 0;
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int phase = (mode & 0x1) ? 1 : 0;
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uint16_t tmp = 0;
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uint16_t mask = 0xf03;
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uint16_t wk_spcmd0;
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uint8_t splw;
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switch (mode) {
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case 0:
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case 1:
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case 2:
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case 3:
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// Do Nothing
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break;
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default:
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error("SPI format error");
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return;
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}
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switch (bits) {
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case 8:
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DSS = 0x7;
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splw = 0x20;
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break;
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case 16:
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DSS = 0xf;
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splw = 0x40;
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break;
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case 32:
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DSS = 0x2;
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splw = 0x60;
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break;
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default:
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error("SPI module don't support other than 8/16/32bits");
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return;
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}
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tmp |= phase;
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tmp |= (polarity << 1);
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tmp |= (DSS << 8);
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obj->bits = bits;
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spi_disable(obj);
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wk_spcmd0 = obj->spi->SPCMD0;
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wk_spcmd0 &= ~mask;
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wk_spcmd0 |= (mask & tmp);
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obj->spi->SPCMD0 = wk_spcmd0;
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obj->spi->SPDCR = splw;
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if (slave) {
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obj->spi->SPCR &=~(1 << 3); // MSTR to 0
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} else {
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obj->spi->SPCR |= (1 << 3); // MSTR to 1
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}
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spi_enable(obj);
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}
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void spi_frequency(spi_t *obj, int hz) {
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uint32_t pclk_base;
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uint32_t div;
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uint32_t brdv = 0;
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uint32_t hz_max;
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uint32_t hz_min;
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uint16_t mask = 0x000c;
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uint16_t wk_spcmd0;
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/* set PCLK */
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if (RZ_A1_IsClockMode0() == false) {
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pclk_base = CM1_RENESAS_RZ_A1_P1_CLK;
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} else {
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pclk_base = CM0_RENESAS_RZ_A1_P1_CLK;
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}
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hz_min = pclk_base / 2 / 256 / 8;
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hz_max = pclk_base / 2;
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if ((hz < hz_min) || (hz > hz_max)) {
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error("Couldn't setup requested SPI frequency");
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return;
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}
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div = (pclk_base / hz / 2);
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while (div > 256) {
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div >>= 1;
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brdv++;
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}
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div -= 1;
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brdv = (brdv << 2);
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spi_disable(obj);
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obj->spi->SPBR = div;
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wk_spcmd0 = obj->spi->SPCMD0;
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wk_spcmd0 &= ~mask;
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wk_spcmd0 |= (mask & brdv);
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obj->spi->SPCMD0 = wk_spcmd0;
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spi_enable(obj);
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}
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static inline void spi_disable(spi_t *obj) {
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obj->spi->SPCR &= ~(1 << 6); // SPE to 0
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}
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static inline void spi_enable(spi_t *obj) {
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obj->spi->SPCR |= (1 << 6); // SPE to 1
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}
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static inline int spi_readable(spi_t *obj) {
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return obj->spi->SPSR & (1 << 7); // SPRF
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}
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static inline int spi_tend(spi_t *obj) {
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return obj->spi->SPSR & (1 << 6); // TEND
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}
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static inline void spi_write(spi_t *obj, int value) {
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if (obj->bits == 8) {
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obj->spi->SPDR.UINT8[0] = (uint8_t)value;
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} else if (obj->bits == 16) {
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obj->spi->SPDR.UINT16[0] = (uint16_t)value;
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} else {
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obj->spi->SPDR.UINT32 = (uint32_t)value;
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}
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}
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static inline int spi_read(spi_t *obj) {
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int read_data;
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if (obj->bits == 8) {
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read_data = obj->spi->SPDR.UINT8[0];
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} else if (obj->bits == 16) {
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read_data = obj->spi->SPDR.UINT16[0];
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} else {
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read_data = obj->spi->SPDR.UINT32;
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}
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return read_data;
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}
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int spi_master_write(spi_t *obj, int value) {
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spi_write(obj, value);
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while(!spi_tend(obj));
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return spi_read(obj);
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}
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int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
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char *rx_buffer, int rx_length, char write_fill) {
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int total = (tx_length > rx_length) ? tx_length : rx_length;
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for (int i = 0; i < total; i++) {
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char out = (i < tx_length) ? tx_buffer[i] : write_fill;
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char in = spi_master_write(obj, out);
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if (i < rx_length) {
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rx_buffer[i] = in;
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}
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}
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return total;
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}
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int spi_slave_receive(spi_t *obj) {
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return (spi_readable(obj) && !spi_busy(obj)) ? (1) : (0);
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}
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int spi_slave_read(spi_t *obj) {
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return spi_read(obj);
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}
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void spi_slave_write(spi_t *obj, int value) {
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spi_write(obj, value);
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}
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int spi_busy(spi_t *obj) {
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return 0;
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}
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