mirror of https://github.com/ARMmbed/mbed-os.git
128 lines
3.5 KiB
C
128 lines
3.5 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2017-2017 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <stdlib.h>
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#include <stdarg.h>
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#include "device.h"
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#include "platform/mbed_application.h"
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#if MBED_APPLICATION_SUPPORT
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static void powerdown_nvic(void);
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static void powerdown_scb(uint32_t vtor);
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static void start_new_application(void *sp, void *pc);
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void mbed_start_application(uintptr_t address)
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{
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void *sp;
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void *pc;
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// Interrupts are re-enabled in start_new_application
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__disable_irq();
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SysTick->CTRL = 0x00000000;
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powerdown_nvic();
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powerdown_scb(address);
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sp = *((void**)address + 0);
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pc = *((void**)address + 1);
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start_new_application(sp, pc);
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}
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static void powerdown_nvic()
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{
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int isr_groups_32;
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int i;
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int j;
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isr_groups_32 = ((SCnSCB->ICTR & SCnSCB_ICTR_INTLINESNUM_Msk) >> SCnSCB_ICTR_INTLINESNUM_Pos) + 1;
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for (i = 0; i < isr_groups_32; i++) {
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NVIC->ICER[i] = 0xFFFFFFFF;
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NVIC->ICPR[i] = 0xFFFFFFFF;
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for (j = 0; j < 8; j++) {
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NVIC->IP[i * 8 + j] = 0x00000000;
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}
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}
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}
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static void powerdown_scb(uint32_t vtor)
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{
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int i;
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// SCB->CPUID - Read only CPU ID register
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SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk | SCB_ICSR_PENDSTCLR_Msk;
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SCB->VTOR = vtor;
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SCB->AIRCR = 0x05FA | 0x0000;
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SCB->SCR = 0x00000000;
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// SCB->CCR - Implementation defined value
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for (i = 0; i < 12; i++) {
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#if defined(__CORTEX_M7)
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SCB->SHPR[i] = 0x00;
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#else
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SCB->SHP[i] = 0x00;
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#endif
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}
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SCB->SHCSR = 0x00000000;
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SCB->CFSR = 0xFFFFFFFF;
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SCB->HFSR = SCB_HFSR_DEBUGEVT_Msk | SCB_HFSR_FORCED_Msk | SCB_HFSR_VECTTBL_Msk;
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SCB->DFSR = SCB_DFSR_EXTERNAL_Msk | SCB_DFSR_VCATCH_Msk |
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SCB_DFSR_DWTTRAP_Msk | SCB_DFSR_BKPT_Msk | SCB_DFSR_HALTED_Msk;
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// SCB->MMFAR - Implementation defined value
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// SCB->BFAR - Implementation defined value
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// SCB->AFSR - Implementation defined value
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// SCB->PFR - Read only processor feature register
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// SCB->DFR - Read only debug feature registers
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// SCB->ADR - Read only auxiliary feature registers
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// SCB->MMFR - Read only memory model feature registers
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// SCB->ISAR - Read only instruction set attribute registers
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// SCB->CPACR - Implementation defined value
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}
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#if defined (__CC_ARM)
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__asm static void start_new_application(void *sp, void *pc)
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{
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MOV R2, #0
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MSR CONTROL, R2 // Switch to main stack
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MOV SP, R0
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MSR PRIMASK, R2 // Enable interrupts
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BX R1
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}
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#elif defined (__GNUC__) || defined (__ICCARM__)
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void start_new_application(void *sp, void *pc)
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{
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__asm volatile (
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"mov r2, #0 \n"
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"msr control, r2 \n" // Switch to main stack
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"mov sp, %0 \n"
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"msr primask, r2 \n" // Enable interrupts
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"bx %1 \n"
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:
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: "l" (sp), "l" (pc)
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: "r2", "cc", "memory"
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);
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}
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#else
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#error "Unsupported toolchain"
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#endif
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#endif /* MBED_APPLICATION_SUPPORT */
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