mirror of https://github.com/ARMmbed/mbed-os.git
164 lines
5.8 KiB
C
164 lines
5.8 KiB
C
/**
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******************************************************************************
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* @file i2c.h
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* @brief (API) Public header of i2c driver
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* @internal
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* @author ON Semiconductor
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* $Rev: $
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* $Date: 2016-04-20 $
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******************************************************************************
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* Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
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* All rights reserved. This software and/or documentation is licensed by ON Semiconductor
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* under limited terms and conditions. The terms and conditions pertaining to the software
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* and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
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* (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
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* if applicable the software license agreement. Do not use this software and/or
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* documentation unless you have carefully read and you agree to the limited terms and
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* conditions. By using this software and/or documentation, you agree to the limited
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* terms and conditions.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
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* INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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* @endinternal
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*
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* @ingroup i2c
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*/
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#include "mbed_assert.h"
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#include "i2c_api.h"
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#include "clock.h"
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#include "i2c_ipc7208_map.h"
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#include "memory_map.h"
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#include "PeripheralPins.h"
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#ifndef I2C_H_
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#define I2C_H_
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/* Miscellaneous I/O and control operations codes */
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#define I2C_IPC7208_IOCTL_NOT_ACK 0x03
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#define I2C_IPC7208_IOCTL_NULL_CMD 0x04
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#define I2C_IPC7208_IOCTL_ACK 0x05
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/* Definitions for the clock speed. */
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#define I2C_SPEED_100K_AT_8MHZ (uint8_t)0x12
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#define I2C_SPEED_100K_AT_16MHZ (uint8_t)0x26
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#define I2C_SPEED_400K_AT_8MHZ (uint8_t)0x03
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#define I2C_SPEED_400K_AT_16MHZ (uint8_t)0x08
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/* I2C commands */
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#define I2C_CMD_NULL 0x00
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#define I2C_CMD_WDAT0 0x10
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#define I2C_CMD_WDAT1 0x11
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#define I2C_CMD_WDAT8 0x12
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#define I2C_CMD_RDAT8 0x13
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#define I2C_CMD_STOP 0x14
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#define I2C_CMD_START 0x15
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#define I2C_CMD_VRFY_ACK 0x16
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#define I2C_CMD_VRFY_VACK 0x17
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/* Status register bits */
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#define I2C_STATUS_CMD_FIFO_MPTY_BIT 0x01
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#define I2C_STATUS_RD_DATA_RDY_BIT 0x02
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#define I2C_STATUS_BUS_ERR_BIT 0x04
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#define I2C_STATUS_RD_DATA_UFL_BIT 0x08
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#define I2C_STATUS_CMD_FIFO_OFL_BIT 0x10
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#define I2C_STATUS_CMD_FIFO_FULL_BIT 0x20
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/* I2C return status */
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#define I2C_STATUS_INVALID 0xFF
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#define I2C_STATUS_SUCCESS 0x00
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#define I2C_STATUS_FAIL 0x01
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#define I2C_STATUS_BUS_ERROR 0x02
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#define I2C_STATUS_RD_DATA_UFL 0x03
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#define I2C_STATUS_CMD_FIFO_OFL 0x04
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#define I2C_STATUS_INTERRUPT_ERROR 0x05
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#define I2C_STATUS_CMD_FIFO_EMPTY 0x06
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/* I2C clock divider position */
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#define I2C_CLOCKDIVEDER_VAL_MASK 0x1F
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#define I2C_APB_CLK_DIVIDER_VAL_MASK 0x1FE0
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/* Error check */
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#define I2C_UFL_CHECK (obj->membase->STATUS.WORD & 0x80)
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#define I2C_FIFO_FULL (obj->membase->STATUS.WORD & 0x20)
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#define FIFO_OFL_CHECK (obj->membase->STATUS.WORD & 0x10)
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#define I2C_BUS_ERR_CHECK (obj->membase->STATUS.WORD & 0x04)
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#define RD_DATA_READY (obj->membase->STATUS.WORD & 0x02)
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#define I2C_FIFO_EMPTY (obj->membase->STATUS.WORD & 0x01)
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#define I2C_API_STATUS_SUCCESS 0
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#define PAD_REG_ADRS_BYTE_SIZE 4
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// The wait_us(0) command is needed so the I2C state machines have enough
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// time for data to settle across all clock domain crossings in their
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// synchronizers, both directions.
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#define SEND_COMMAND(cmd) wait_us(0); obj->membase->CMD_REG = cmd; wait_us(0);
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/** Init I2C device.
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* @details
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* Sets the necessary registers. The baud rate is set default to 100K
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*
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* @param obj A I2C device instance.
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* @param sda GPIO number for SDA line
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* @param scl GPIO number for SCL line
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* @return None
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*/
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extern void fI2cInit(i2c_t *obj,PinName sda,PinName scl);
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/** Set baud rate or frequency
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* @details
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* Sets user baudrate
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*
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* @param obj A I2C device instance.
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* @param hz User desired baud rate/frequency
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* @return None
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*/
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extern void fI2cFrequency(i2c_t *obj, uint32_t hz);
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/** Sends start bit
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* @details
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* Sends start bit on i2c pins
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*
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* @param obj A I2C device instance.
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* @return status
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*/
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extern int32_t fI2cStart(i2c_t *obj);
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/** Sends stop bit
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* @details
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* Sends stop bit on i2c pins
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*
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* @param obj A I2C device instance.
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* @return status
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*/
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extern int32_t fI2cStop(i2c_t *obj);
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/** Reads data from a I2C device in blocking fashion.
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* @details
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* The data is read from the receive queue into the buffer. The receive queue is
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* filled by the interrupt handler. If not enough data is available,
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*
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* @param d The device to read from.
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* @param buf The buffer to read into (only the contents of the buffer may be modified, not the buffer itself).
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* @param len The maximum number of bytes to read, typically the buffer length.
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* @return On Success: The actual number of bytes read. On Failure: Failure code.
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*/
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extern int32_t fI2cReadB(i2c_t *d, char *buf, int len);
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/** Write data to an I2C device.
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* @details
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* The commands(I2C instructions) and data arrive at the I2C Engine via the Command FIFO.
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* The command to write the data & data to be written is sent to command FIFO by writing it into command register.
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*
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* @param d The device to write to.
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* @param buf The buffer to write from (the contents of the buffer may not be modified).
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* @param len The number of bytes to write.
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* @return On success: The actual number of bytes written. On Failure: Failure code
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*/
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extern int32_t fI2cWriteB(i2c_t *d, const char *buf, int len);
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#endif /* I2C_H_ */
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