mbed-os/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE
TomoYamanaka 36ad12c403 Modify RAM size definition of ARMCC for GR-LYCHEE
I modified RAM size of ARMCC compiler for GR-LYCHEE.
In case of GR-LYCHEE, RAM size is 3M Byte(including Non-Cache area), but there was a typo at MACRO definition.
2018-06-25 15:44:01 +09:00
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TARGET_MBED_MBRZA1LU Add license header on top in reserved_pins.h 2018-01-19 18:39:37 +09:00
device Modify RAM size definition of ARMCC for GR-LYCHEE 2018-06-25 15:44:01 +09:00
PeripheralNames.h Add startup processing having CMSIS5/RTX5 been available on GR-LYCHEE 2018-01-16 13:34:35 +09:00
PeripheralPins.c Add startup processing having CMSIS5/RTX5 been available on GR-LYCHEE 2018-01-16 13:34:35 +09:00
PinNames.h Add startup processing having CMSIS5/RTX5 been available on GR-LYCHEE 2018-01-16 13:34:35 +09:00
PortNames.h Add startup processing having CMSIS5/RTX5 been available on GR-LYCHEE 2018-01-16 13:34:35 +09:00
device.h Add startup processing having CMSIS5/RTX5 been available on GR-LYCHEE 2018-01-16 13:34:35 +09:00
mbed_drv_cfg.h Support Flash iAP for GR-PEACH and GR-LYCHEE 2018-06-22 10:40:45 +09:00
trng_api_esp32.cpp [RZ_A1LU] Fix TRNG function 2018-02-06 15:44:33 +09:00