mirror of https://github.com/ARMmbed/mbed-os.git
462 lines
11 KiB
C
462 lines
11 KiB
C
/***************************************************************************//**
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* @file PeripheralPins.c
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*******************************************************************************
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* @section License
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* <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
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*******************************************************************************
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************/
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#include "PeripheralPins.h"
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#include "mbed_toolchain.h"
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/************ADC***************/
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/* The third "function" value is used to select the correct ADC channel */
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MBED_WEAK const PinMap PinMap_ADC[] = {
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#ifdef ADC0_BASE
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{PA0, ADC_0, adcPosSelAPORT3XCH8},
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{PA1, ADC_0, adcPosSelAPORT4XCH9},
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{PA2, ADC_0, adcPosSelAPORT3XCH10},
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{PA3, ADC_0, adcPosSelAPORT4XCH11},
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{PA4, ADC_0, adcPosSelAPORT3XCH12},
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{PA5, ADC_0, adcPosSelAPORT4XCH13},
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{PB11, ADC_0, adcPosSelAPORT4XCH27},
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{PB12, ADC_0, adcPosSelAPORT3XCH28},
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{PB14, ADC_0, adcPosSelAPORT3XCH30},
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{PB15, ADC_0, adcPosSelAPORT4XCH31},
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{PC6, ADC_0, adcPosSelAPORT1XCH6},
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{PC7, ADC_0, adcPosSelAPORT2XCH7},
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{PC8, ADC_0, adcPosSelAPORT1XCH8},
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{PC9, ADC_0, adcPosSelAPORT2XCH9},
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{PC10, ADC_0, adcPosSelAPORT1XCH10},
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{PC11, ADC_0, adcPosSelAPORT2XCH11},
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{PD9, ADC_0, adcPosSelAPORT4XCH1},
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{PD10, ADC_0, adcPosSelAPORT3XCH2},
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{PD11, ADC_0, adcPosSelAPORT3YCH3},
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{PD12, ADC_0, adcPosSelAPORT3XCH4},
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{PD13, ADC_0, adcPosSelAPORT3YCH5},
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{PD14, ADC_0, adcPosSelAPORT3XCH6},
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{PD15, ADC_0, adcPosSelAPORT4XCH7},
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{PF0, ADC_0, adcPosSelAPORT1XCH16},
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{PF1, ADC_0, adcPosSelAPORT2XCH17},
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{PF2, ADC_0, adcPosSelAPORT1XCH18},
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{PF3, ADC_0, adcPosSelAPORT2XCH19},
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{PF4, ADC_0, adcPosSelAPORT1XCH20},
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{PF5, ADC_0, adcPosSelAPORT2XCH21},
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{PF6, ADC_0, adcPosSelAPORT1XCH22},
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{PF7, ADC_0, adcPosSelAPORT2XCH23},
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#endif
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{NC , NC , NC}
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};
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/************I2C SCL***********/
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MBED_WEAK const PinMap PinMap_I2C_SCL[] = {
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#ifdef I2C0_BASE
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/* I2C0 */
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{PA1, I2C_0, 0},
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{PA2, I2C_0, 1},
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{PA3, I2C_0, 2},
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{PA4, I2C_0, 3},
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{PA5, I2C_0, 4},
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{PB11, I2C_0, 5},
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{PB12, I2C_0, 6},
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{PB13, I2C_0, 7},
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{PB14, I2C_0, 8},
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{PB15, I2C_0, 9},
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{PC6, I2C_0, 10},
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{PC7, I2C_0, 11},
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{PC8, I2C_0, 12},
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{PC9, I2C_0, 13},
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{PC10, I2C_0, 14},
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{PC11, I2C_0, 15},
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{PD9, I2C_0, 16},
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{PD10, I2C_0, 17},
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{PD11, I2C_0, 18},
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{PD12, I2C_0, 19},
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{PD13, I2C_0, 20},
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{PD14, I2C_0, 21},
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{PD15, I2C_0, 22},
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{PF0, I2C_0, 23},
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{PF1, I2C_0, 24},
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{PF2, I2C_0, 25},
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{PF3, I2C_0, 26},
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{PF4, I2C_0, 27},
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{PF5, I2C_0, 28},
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{PF6, I2C_0, 29},
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{PF7, I2C_0, 30},
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{PA0, I2C_0, 31},
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#endif
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{NC , NC , NC}
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};
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/************I2C SDA***********/
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MBED_WEAK const PinMap PinMap_I2C_SDA[] = {
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#ifdef I2C0_BASE
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/* I2C0 */
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{PA0, I2C_0, 0},
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{PA1, I2C_0, 1},
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{PA2, I2C_0, 2},
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{PA3, I2C_0, 3},
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{PA4, I2C_0, 4},
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{PA5, I2C_0, 5},
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{PB11, I2C_0, 6},
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{PB12, I2C_0, 7},
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{PB13, I2C_0, 8},
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{PB14, I2C_0, 9},
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{PB15, I2C_0, 10},
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{PC6, I2C_0, 11},
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{PC7, I2C_0, 12},
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{PC8, I2C_0, 13},
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{PC9, I2C_0, 14},
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{PC10, I2C_0, 15},
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{PC11, I2C_0, 16},
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{PD9, I2C_0, 17},
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{PD10, I2C_0, 18},
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{PD11, I2C_0, 19},
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{PD12, I2C_0, 20},
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{PD13, I2C_0, 21},
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{PD14, I2C_0, 22},
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{PD15, I2C_0, 23},
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{PF0, I2C_0, 24},
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{PF1, I2C_0, 25},
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{PF2, I2C_0, 26},
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{PF3, I2C_0, 27},
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{PF4, I2C_0, 28},
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{PF5, I2C_0, 29},
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{PF6, I2C_0, 30},
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{PF7, I2C_0, 31},
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#endif
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/* Not connected */
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{NC , NC , NC}
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};
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/************PWM***************/
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MBED_WEAK const PinMap PinMap_PWM[] = {
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#if defined(TIMER_ROUTE_CC0PEN) || defined(TIMER_ROUTEPEN_CC0PEN)
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/* PWM0 */
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{PA0, PWM_CH0, 0},
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{PB14, PWM_CH0, 9},
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{PB15, PWM_CH0, 10},
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{PC6, PWM_CH0, 11},
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{PD10, PWM_CH0, 18},
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{PD14, PWM_CH0, 22},
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{PF0, PWM_CH0, 24},
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{PF4, PWM_CH0, 28},
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#endif
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#if defined(TIMER_ROUTE_CC1PEN) || defined(TIMER_ROUTEPEN_CC1PEN)
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/* PWM1 */
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{PA1, PWM_CH1, 0},
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{PB11, PWM_CH1, 5},
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{PC7, PWM_CH1, 11},
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{PD11, PWM_CH1, 18},
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{PD15, PWM_CH1, 22},
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{PF1, PWM_CH1, 24},
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{PF5, PWM_CH1, 28},
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#endif
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#if defined(TIMER_ROUTE_CC2PEN) || defined(TIMER_ROUTEPEN_CC2PEN)
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/* PWM2 */
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{PA2, PWM_CH2, 0},
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{PA4, PWM_CH2, 2},
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{PB12, PWM_CH2, 5},
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{PC8, PWM_CH2, 11},
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{PD12, PWM_CH2, 18},
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{PF2, PWM_CH2, 24},
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{PF6, PWM_CH2, 28},
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#endif
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#if defined(TIMER_ROUTE_CC3PEN) || defined(TIMER_ROUTEPEN_CC3PEN)
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/* PWM3 */
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{PA3, PWM_CH3, 0},
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{PA5, PWM_CH3, 2},
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{PB13, PWM_CH3, 5},
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{PC9, PWM_CH3, 11},
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{PC10, PWM_CH2, 13},
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{PC11, PWM_CH3, 13},
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{PD9, PWM_CH3, 14},
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{PD13, PWM_CH3, 18},
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{PF3, PWM_CH3, 24},
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{PF7, PWM_CH3, 28},
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#endif
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{NC , NC , NC}
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};
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/*************SPI**************/
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MBED_WEAK const PinMap PinMap_SPI_MOSI[] = {
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#ifdef USART0_BASE
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/* USART0 */
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{PA0, SPI_0, 0},
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{PA1, SPI_0, 1},
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{PA2, SPI_0, 2},
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{PA3, SPI_0, 3},
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{PA4, SPI_0, 4},
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{PA5, SPI_0, 5},
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{PB11, SPI_0, 6},
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{PB12, SPI_0, 7},
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{PB13, SPI_0, 8},
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{PB14, SPI_0, 9},
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{PB15, SPI_0, 10},
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{PD9, SPI_0, 17},
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{PD10, SPI_0, 18},
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{PD11, SPI_0, 19},
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{PD12, SPI_0, 20},
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{PD13, SPI_0, 21},
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{PD14, SPI_0, 22},
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{PD15, SPI_0, 23},
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#endif
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#ifdef USART1_BASE
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/* USART1 */
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{PC6, SPI_1, 11},
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{PC7, SPI_1, 12},
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{PC8, SPI_1, 13},
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{PC9, SPI_1, 14},
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{PC10, SPI_1, 15},
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{PC11, SPI_1, 16},
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{PF0, SPI_1, 24},
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{PF1, SPI_1, 25},
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{PF2, SPI_1, 26},
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{PF3, SPI_1, 27},
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{PF4, SPI_1, 28},
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{PF5, SPI_1, 29},
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{PF6, SPI_1, 30},
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{PF7, SPI_1, 31},
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#endif
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{NC , NC , NC}
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};
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MBED_WEAK const PinMap PinMap_SPI_MISO[] = {
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#ifdef USART0_BASE
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/* USART0 */
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{PA0, SPI_0, 31},
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{PA1, SPI_0, 0},
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{PA2, SPI_0, 1},
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{PA3, SPI_0, 2},
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{PA4, SPI_0, 3},
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{PA5, SPI_0, 4},
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{PB11, SPI_0, 5},
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{PB12, SPI_0, 6},
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{PB13, SPI_0, 7},
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{PB14, SPI_0, 8},
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{PB15, SPI_0, 9},
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{PD9, SPI_0, 16},
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{PD10, SPI_0, 17},
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{PD11, SPI_0, 18},
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{PD12, SPI_0, 19},
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{PD13, SPI_0, 20},
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{PD14, SPI_0, 21},
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{PD15, SPI_0, 22},
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#endif
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#ifdef USART1_BASE
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/* USART1 */
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{PC6, SPI_1, 10},
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{PC7, SPI_1, 11},
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{PC8, SPI_1, 12},
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{PC9, SPI_1, 13},
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{PC10, SPI_1, 14},
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{PC11, SPI_1, 15},
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{PF0, SPI_1, 23},
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{PF1, SPI_1, 24},
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{PF2, SPI_1, 25},
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{PF3, SPI_1, 26},
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{PF4, SPI_1, 27},
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{PF5, SPI_1, 28},
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{PF6, SPI_1, 29},
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{PF7, SPI_1, 30},
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{PA0, SPI_1, 31},
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#endif
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{NC , NC , NC}
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};
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MBED_WEAK const PinMap PinMap_SPI_CLK[] = {
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#ifdef USART0_BASE
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/* USART0 */
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{PA0, SPI_0, 30},
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{PA1, SPI_0, 31},
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{PA2, SPI_0, 0},
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{PA3, SPI_0, 1},
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{PA4, SPI_0, 2},
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{PA5, SPI_0, 3},
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{PB11, SPI_0, 4},
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{PB12, SPI_0, 5},
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{PB13, SPI_0, 6},
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{PB14, SPI_0, 7},
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{PB15, SPI_0, 8},
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{PD9, SPI_0, 15},
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{PD10, SPI_0, 16},
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{PD11, SPI_0, 17},
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{PD12, SPI_0, 18},
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{PD13, SPI_0, 19},
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{PD14, SPI_0, 20},
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{PD15, SPI_0, 21},
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#endif
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#ifdef USART1_BASE
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/* USART1 */
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{PC6, SPI_1, 9},
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{PC7, SPI_1, 10},
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{PC8, SPI_1, 11},
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{PC9, SPI_1, 12},
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{PC10, SPI_1, 13},
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{PC11, SPI_1, 14},
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{PF0, SPI_1, 22},
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{PF1, SPI_1, 23},
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{PF2, SPI_1, 24},
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{PF3, SPI_1, 25},
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{PF4, SPI_1, 26},
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{PF5, SPI_1, 27},
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{PF6, SPI_1, 28},
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{PF7, SPI_1, 29},
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{PA0, SPI_1, 30},
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{PA1, SPI_1, 31},
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#endif
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{NC , NC , NC}
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};
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MBED_WEAK const PinMap PinMap_SPI_CS[] = {
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#ifdef USART0_BASE
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/* USART0 */
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{PA0, SPI_0, 29},
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{PA1, SPI_0, 30},
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{PA2, SPI_0, 31},
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{PA3, SPI_0, 0},
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{PA4, SPI_0, 1},
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{PA5, SPI_0, 2},
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{PB11, SPI_0, 3},
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{PB12, SPI_0, 4},
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{PB13, SPI_0, 5},
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{PB14, SPI_0, 6},
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{PB15, SPI_0, 7},
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{PD9, SPI_0, 14},
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{PD10, SPI_0, 15},
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{PD11, SPI_0, 16},
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{PD12, SPI_0, 17},
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{PD13, SPI_0, 18},
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{PD14, SPI_0, 19},
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{PD15, SPI_0, 20},
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#endif
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#ifdef USART1_BASE
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/* USART1 */
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{PC6, SPI_1, 8},
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{PC7, SPI_1, 9},
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{PC8, SPI_1, 10},
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{PC9, SPI_1, 11},
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{PC10, SPI_1, 12},
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{PC11, SPI_1, 13},
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{PF0, SPI_1, 21},
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{PF1, SPI_1, 22},
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{PF2, SPI_1, 23},
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{PF3, SPI_1, 24},
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{PF4, SPI_1, 25},
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{PF5, SPI_1, 26},
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{PF6, SPI_1, 27},
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{PF7, SPI_1, 28},
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#endif
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{NC , NC , NC}
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};
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/************UART**************/
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MBED_WEAK const PinMap PinMap_UART_TX[] = {
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#ifdef USART0_BASE
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/* USART0 */
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{PA0, USART_0, 0},
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{PA1, USART_0, 1},
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{PA2, USART_0, 2},
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{PA3, USART_0, 3},
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{PA4, USART_0, 4},
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{PA5, USART_0, 5},
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{PB11, USART_0, 6},
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{PB12, USART_0, 7},
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{PB13, USART_0, 8},
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{PB14, USART_0, 9},
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{PB15, USART_0, 10},
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#endif
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#ifdef LEUART0_BASE
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/* LEUART0 */
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{PD9, LEUART_0, 17},
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{PD10, LEUART_0, 18},
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{PD11, LEUART_0, 19},
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{PD12, LEUART_0, 20},
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{PD13, LEUART_0, 21},
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{PD14, LEUART_0, 22},
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{PD15, LEUART_0, 23},
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#endif
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#ifdef USART1_BASE
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/* USART1 */
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{PC6, USART_1, 11},
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{PC7, USART_1, 12},
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{PC8, USART_1, 13},
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{PC9, USART_1, 14},
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{PC10, USART_1, 15},
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{PC11, USART_1, 16},
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{PF0, USART_1, 24},
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{PF1, USART_1, 25},
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{PF2, USART_1, 26},
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{PF3, USART_1, 27},
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{PF4, USART_1, 28},
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{PF5, USART_1, 29},
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{PF6, USART_1, 30},
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{PF7, USART_1, 31},
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#endif
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{NC , NC , NC}
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};
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MBED_WEAK const PinMap PinMap_UART_RX[] = {
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#ifdef USART0_BASE
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/* USART0 */
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{PA0, USART_0, 31},
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{PA1, USART_0, 0},
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{PA2, USART_0, 1},
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{PA3, USART_0, 2},
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{PA4, USART_0, 3},
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{PA5, USART_0, 4},
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{PB11, USART_0, 5},
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{PB12, USART_0, 6},
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{PB13, USART_0, 7},
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{PB14, USART_0, 8},
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{PB15, USART_0, 9},
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#endif
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#ifdef LEUART0_BASE
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/* LEUART0 */
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{PD9, LEUART_0, 16},
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{PD10, LEUART_0, 17},
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{PD11, LEUART_0, 18},
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{PD12, LEUART_0, 19},
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{PD13, LEUART_0, 20},
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{PD14, LEUART_0, 21},
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{PD15, LEUART_0, 22},
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#endif
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#ifdef USART1_BASE
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/* USART1 */
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{PC6, USART_1, 10},
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{PC7, USART_1, 11},
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{PC8, USART_1, 12},
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{PC9, USART_1, 13},
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{PC10, USART_1, 14},
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{PC11, USART_1, 15},
|
|
{PF0, USART_1, 23},
|
|
{PF1, USART_1, 24},
|
|
{PF2, USART_1, 25},
|
|
{PF3, USART_1, 26},
|
|
{PF4, USART_1, 27},
|
|
{PF5, USART_1, 28},
|
|
{PF6, USART_1, 29},
|
|
{PF7, USART_1, 30},
|
|
#endif
|
|
{NC , NC , NC}
|
|
};
|