mirror of https://github.com/ARMmbed/mbed-os.git
342 lines
10 KiB
C
342 lines
10 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2006-2015 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <math.h>
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#include "spi_api.h"
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#include "spi_def.h"
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#include "cmsis.h"
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#include "pinmap.h"
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#include "mbed_error.h"
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#include "mbed_wait_api.h"
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static const PinMap PinMap_SPI_SCLK[] = {
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{SCLK_SPI , SPI_0, 0},
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{CLCD_SCLK , SPI_1, 0},
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{ADC_SCLK , SPI_2, 0},
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{SHIELD_0_SPI_SCK , SPI_3, 0},
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{SHIELD_1_SPI_SCK , SPI_4, 0},
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{NC , NC , 0}
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};
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static const PinMap PinMap_SPI_MOSI[] = {
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{MOSI_SPI, SPI_0, 0},
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{CLCD_MOSI, SPI_1, 0},
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{ADC_MOSI, SPI_2, 0},
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{SHIELD_0_SPI_MOSI, SPI_3, 0},
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{SHIELD_1_SPI_MOSI, SPI_4, 0},
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{NC , NC , 0}
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};
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static const PinMap PinMap_SPI_MISO[] = {
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{MISO_SPI, SPI_0, 0},
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{CLCD_MISO, SPI_1, 0},
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{ADC_MISO, SPI_2, 0},
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{SHIELD_0_SPI_MISO, SPI_3, 0},
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{SHIELD_1_SPI_MISO, SPI_4, 0},
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{NC , NC , 0}
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};
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static const PinMap PinMap_SPI_SSEL[] = {
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{SSEL_SPI, SPI_0, 0},
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{CLCD_SSEL, SPI_1, 0},
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{ADC_SSEL, SPI_2, 0},
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{SHIELD_0_SPI_nCS, SPI_3, 0},
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{SHIELD_1_SPI_nCS, SPI_4, 0},
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{NC , NC , 0}
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};
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static inline int ssp_disable(spi_t *obj);
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static inline int ssp_enable(spi_t *obj);
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
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int altfunction[4];
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// determine the SPI to use
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SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
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SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
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SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
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SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
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SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
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SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
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obj->spi = (MPS2_SSP_TypeDef*)pinmap_merge(spi_data, spi_cntl);
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if ((int)obj->spi == NC) {
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error("SPI pinout mapping failed");
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}
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// enable power and clocking
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switch ((int)obj->spi) {
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case (int)SPI_0:
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obj->spi->CR1 = 0;
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obj->spi->CR0 = SSP_CR0_SCR_DFLT | SSP_CR0_FRF_MOT | SSP_CR0_DSS_8;
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obj->spi->CPSR = SSP_CPSR_DFLT;
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obj->spi->IMSC = 0x8;
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obj->spi->DMACR = 0;
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obj->spi->CR1 = SSP_CR1_SSE_Msk;
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obj->spi->ICR = 0x3;
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break;
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case (int)SPI_1:
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/* Configure SSP used for LCD */
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obj->spi->CR1 = 0; /* Synchronous serial port disable */
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obj->spi->DMACR = 0; /* Disable FIFO DMA */
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obj->spi->IMSC = 0; /* Mask all FIFO/IRQ interrupts */
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obj->spi->ICR = ((1ul << 0) | /* Clear SSPRORINTR interrupt */
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(1ul << 1) ); /* Clear SSPRTINTR interrupt */
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obj->spi->CR0 = ((7ul << 0) | /* 8 bit data size */
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(0ul << 4) | /* Motorola frame format */
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(0ul << 6) | /* CPOL = 0 */
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(0ul << 7) | /* CPHA = 0 */
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(1ul << 8) ); /* Set serial clock rate */
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obj->spi->CPSR = (2ul << 0); /* set SSP clk to 6MHz (6.6MHz max) */
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obj->spi->CR1 = ((1ul << 1) | /* Synchronous serial port enable */
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(0ul << 2) ); /* Device configured as master */
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break;
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case (int)SPI_2:
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obj->spi->CR1 = 0;
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obj->spi->CR0 = SSP_CR0_SCR_DFLT | SSP_CR0_FRF_MOT | SSP_CR0_DSS_8;
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obj->spi->CPSR = SSP_CPSR_DFLT;
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obj->spi->IMSC = 0x8;
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obj->spi->DMACR = 0;
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obj->spi->CR1 = SSP_CR1_SSE_Msk;
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obj->spi->ICR = 0x3;
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break;
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case (int)SPI_3:
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obj->spi->CR1 = 0;
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obj->spi->CR0 = SSP_CR0_SCR_DFLT | SSP_CR0_FRF_MOT | SSP_CR0_DSS_8;
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obj->spi->CPSR = SSP_CPSR_DFLT;
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obj->spi->IMSC = 0x8;
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obj->spi->DMACR = 0;
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obj->spi->CR1 = SSP_CR1_SSE_Msk;
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obj->spi->ICR = 0x3;
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break;
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case (int)SPI_4:
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obj->spi->CR1 = 0;
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obj->spi->CR0 = SSP_CR0_SCR_DFLT | SSP_CR0_FRF_MOT | SSP_CR0_DSS_8;
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obj->spi->CPSR = SSP_CPSR_DFLT;
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obj->spi->IMSC = 0x8;
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obj->spi->DMACR = 0;
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obj->spi->CR1 = SSP_CR1_SSE_Msk;
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obj->spi->ICR = 0x3;
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break;
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}
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if(mosi != NC){ altfunction[0] = 1;}else{ altfunction[0] = 0;}
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if(miso != NC){ altfunction[1] = 1;}else{ altfunction[1] = 0;}
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if(sclk != NC){ altfunction[2] = 1;}else{ altfunction[2] = 0;}
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if(ssel != NC){ altfunction[3] = 1;}else{ altfunction[3] = 0;}
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// enable alt function
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switch ((int)obj->spi) {
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case (int)SPI_2:
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CMSDK_GPIO1->ALTFUNCSET |= (altfunction[2]<<3 | altfunction[0]<<2 | altfunction[1]<<1 | altfunction[3]);
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break;
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case (int)SPI_3:
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CMSDK_GPIO0->ALTFUNCSET |= (altfunction[1]<<14 | altfunction[0]<<13 | altfunction[3]<<12 | altfunction[2]<<11);
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break;
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case (int)SPI_4:
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CMSDK_GPIO2->ALTFUNCSET |= (altfunction[2]<<12 | altfunction[1]<<8 | altfunction[0]<<7 | altfunction[3]<<6);
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break;
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}
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// set default format and frequency
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if (ssel == NC) {
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spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
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} else {
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spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
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}
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spi_frequency(obj, 1000000);
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// enable the ssp channel
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ssp_enable(obj);
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// pin out the spi pins
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pinmap_pinout(mosi, PinMap_SPI_MOSI);
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pinmap_pinout(miso, PinMap_SPI_MISO);
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pinmap_pinout(sclk, PinMap_SPI_SCLK);
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if (ssel != NC) {
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pinmap_pinout(ssel, PinMap_SPI_SSEL);
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}
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}
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void spi_free(spi_t *obj) {}
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void spi_format(spi_t *obj, int bits, int mode, int slave) {
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ssp_disable(obj);
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if (!(bits >= 4 && bits <= 16) || !(mode >= 0 && mode <= 3)) {
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error("SPI format error");
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}
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int polarity = (mode & 0x2) ? 1 : 0;
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int phase = (mode & 0x1) ? 1 : 0;
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// set it up
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int DSS = bits - 1; // DSS (data select size)
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int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
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int SPH = (phase) ? 1 : 0; // SPH - clock out phase
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int FRF = 0; // FRF (frame format) = SPI
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uint32_t tmp = obj->spi->CR0;
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tmp &= ~(0xFFFF);
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tmp |= DSS << 0
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| FRF << 4
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| SPO << 6
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| SPH << 7;
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obj->spi->CR0 = tmp;
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tmp = obj->spi->CR1;
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tmp &= ~(0xD);
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tmp |= 0 << 0 // LBM - loop back mode - off
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| ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
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| 0 << 3; // SOD - slave output disable - na
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obj->spi->CR1 = tmp;
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ssp_enable(obj);
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}
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void spi_frequency(spi_t *obj, int hz) {
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ssp_disable(obj);
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uint32_t PCLK = SystemCoreClock;
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int prescaler;
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for (prescaler = 2; prescaler <= 254; prescaler += 2) {
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int prescale_hz = PCLK / prescaler;
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// calculate the divider
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int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
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// check we can support the divider
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if (divider < 256) {
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// prescaler
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obj->spi->CPSR = prescaler;
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// divider
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obj->spi->CR0 &= ~(0xFFFF << 8);
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obj->spi->CR0 |= (divider - 1) << 8;
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ssp_enable(obj);
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return;
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}
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}
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error("Couldn't setup requested SPI frequency");
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}
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static inline int ssp_disable(spi_t *obj) {
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return obj->spi->CR1 &= ~(1 << 1);
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}
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static inline int ssp_enable(spi_t *obj) {
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return obj->spi->CR1 |= SSP_CR1_SSE_Msk;
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}
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static inline int ssp_readable(spi_t *obj) {
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return obj->spi->SR & (1 << 2);
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}
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static inline int ssp_writeable(spi_t *obj) {
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return obj->spi->SR & SSP_SR_BSY_Msk;
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}
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static inline void ssp_write(spi_t *obj, int value) {
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obj->spi->DR = value;
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while (ssp_writeable(obj));
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}
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static inline int ssp_read(spi_t *obj) {
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int read_DR = obj->spi->DR;
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return read_DR;
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}
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static inline int ssp_busy(spi_t *obj) {
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return (obj->spi->SR & (1 << 4)) ? (1) : (0);
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}
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int spi_master_write(spi_t *obj, int value) {
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ssp_write(obj, value);
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while (obj->spi->SR & SSP_SR_BSY_Msk); /* Wait for send to finish */
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return (ssp_read(obj));
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}
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int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
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char *rx_buffer, int rx_length, char write_fill) {
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int total = (tx_length > rx_length) ? tx_length : rx_length;
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for (int i = 0; i < total; i++) {
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char out = (i < tx_length) ? tx_buffer[i] : write_fill;
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char in = spi_master_write(obj, out);
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if (i < rx_length) {
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rx_buffer[i] = in;
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}
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}
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return total;
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}
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int spi_slave_receive(spi_t *obj) {
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return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
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}
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int spi_slave_read(spi_t *obj) {
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return obj->spi->DR;
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}
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void spi_slave_write(spi_t *obj, int value) {
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while (ssp_writeable(obj) == 0) ;
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obj->spi->DR = value;
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}
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int spi_busy(spi_t *obj) {
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return ssp_busy(obj);
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}
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const PinMap *spi_master_mosi_pinmap()
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{
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return PinMap_SPI_MOSI;
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}
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const PinMap *spi_master_miso_pinmap()
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{
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return PinMap_SPI_MISO;
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}
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const PinMap *spi_master_clk_pinmap()
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{
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return PinMap_SPI_SCLK;
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}
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const PinMap *spi_master_cs_pinmap()
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{
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return PinMap_SPI_SSEL;
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}
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const PinMap *spi_slave_mosi_pinmap()
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{
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return PinMap_SPI_MOSI;
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}
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const PinMap *spi_slave_miso_pinmap()
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{
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return PinMap_SPI_MISO;
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}
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const PinMap *spi_slave_clk_pinmap()
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{
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return PinMap_SPI_SCLK;
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}
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const PinMap *spi_slave_cs_pinmap()
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{
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return PinMap_SPI_SSEL;
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}
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