mirror of https://github.com/ARMmbed/mbed-os.git
226 lines
7.1 KiB
C
226 lines
7.1 KiB
C
/* mbed Microcontroller Library
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* (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2018 All rights reserved
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "pwmout_api.h"
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#include "PeripheralNames.h"
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#include "pinmap.h"
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#define GPIO_CLK_OFFSET 2
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// Because Timer operating frequency is 2.5 MhZ
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#define CALCULATE_RGC1_VAL 2.5
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static const PinMap PinMap_PWM[] = {
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{PA5, PWM_0, PIN_DATA(5, 1)},
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{PB2, PWM_1, PIN_DATA(5, 1)},
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{PB4, PWM_2, PIN_DATA(5, 1)},
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{PD2, PWM_3, PIN_DATA(5, 1)},
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{PD4, PWM_4, PIN_DATA(5, 1)},
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{PE1, PWM_5, PIN_DATA(5, 1)},
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{PE6, PWM_6, PIN_DATA(5, 1)},
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{PC2, PWM_7, PIN_DATA(5, 1)},
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{PL6, PWM_8, PIN_DATA(3, 1)},
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{PC4, PWM_9, PIN_DATA(5, 1)},
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{PM2, PWM_10, PIN_DATA(3, 1)},
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{PU0, PWM_11, PIN_DATA(3, 1)},
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{PU6, PWM_12, PIN_DATA(3, 1)},
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{NC, NC, 0}
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};
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void pwmout_init(pwmout_t *obj, PinName pin)
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{
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// Determine the pwm channel
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PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
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// Assert input is valid
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MBED_ASSERT(pwm != (PWMName)NC);
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switch (pwm) {
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case PWM_0:
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obj->p_t32a.p_instance = TSB_T32A1;
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// Clock enable of T32A ch01
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TSB_CG_FSYSMENA_IPMENA07 = TXZ_ENABLE;
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break;
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case PWM_1:
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obj->p_t32a.p_instance = TSB_T32A2;
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// Clock enable of T32A ch02
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TSB_CG_FSYSMENA_IPMENA08 = TXZ_ENABLE;
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break;
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case PWM_2:
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obj->p_t32a.p_instance = TSB_T32A3;
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// Clock enable of T32A ch03
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TSB_CG_FSYSMENA_IPMENA09 = TXZ_ENABLE;
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break;
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case PWM_3:
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obj->p_t32a.p_instance = TSB_T32A4;
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// Clock enable of T32A ch04
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TSB_CG_FSYSMENA_IPMENA10 = TXZ_ENABLE;
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break;
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case PWM_4:
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obj->p_t32a.p_instance = TSB_T32A5;
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// Clock enable of T32A ch05
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TSB_CG_FSYSMENA_IPMENA11 = TXZ_ENABLE;
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break;
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case PWM_5:
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obj->p_t32a.p_instance = TSB_T32A6;
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// Clock enable of T32A ch06
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TSB_CG_FSYSMENA_IPMENA12 = TXZ_ENABLE;
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break;
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case PWM_6:
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obj->p_t32a.p_instance = TSB_T32A7;
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// Clock enable of T32A ch07
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TSB_CG_FSYSMENA_IPMENA13 = TXZ_ENABLE;
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break;
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case PWM_7:
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obj->p_t32a.p_instance = TSB_T32A8;
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// Clock enable of T32A ch08
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TSB_CG_FSYSMENA_IPMENA14 = TXZ_ENABLE;
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break;
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case PWM_8:
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obj->p_t32a.p_instance = TSB_T32A9;
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// Clock enable of T32A ch09
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TSB_CG_FSYSMENA_IPMENA15 = TXZ_ENABLE;
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break;
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case PWM_9:
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obj->p_t32a.p_instance = TSB_T32A10;
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// Clock enable of T32A ch10
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TSB_CG_FSYSMENA_IPMENA16 = TXZ_ENABLE;
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break;
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case PWM_10:
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obj->p_t32a.p_instance = TSB_T32A11;
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// Clock enable of T32A ch11
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TSB_CG_FSYSMENA_IPMENA17 = TXZ_ENABLE;
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break;
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case PWM_11:
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obj->p_t32a.p_instance = TSB_T32A12;
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// Clock enable of T32A ch12
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TSB_CG_FSYSMENA_IPMENA18 = TXZ_ENABLE;
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break;
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case PWM_12:
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obj->p_t32a.p_instance = TSB_T32A13;
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// Clock enable of T32A ch13
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TSB_CG_FSYSMENA_IPMENA19 = TXZ_ENABLE;
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break;
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default:
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obj->p_t32a.p_instance = NULL;
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break;
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}
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if (obj->p_t32a.p_instance == NULL) {
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return;
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}
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// Enable clock for GPIO port.
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TSB_CG->FSYSMENB |= (TXZ_ENABLE << ((PIN_PORT(pin)) + GPIO_CLK_OFFSET));
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// Set pin function as PWM
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pinmap_pinout(pin, PinMap_PWM);
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// Default to 20ms, 0% duty cycle
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pwmout_period_ms(obj, 20);
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}
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void pwmout_free(pwmout_t *obj)
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{
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// Stop PWM
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obj->p_t32a.p_instance->RUNC = (T32A_RUN_ENABLE | T32A_COUNT_STOP);
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obj->trailing_timing = TXZ_DISABLE;
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obj->leading_timing = TXZ_DISABLE;
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obj->p_t32a.p_instance = NULL;
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}
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void pwmout_write(pwmout_t *obj, float value)
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{
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// Stop PWM
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obj->p_t32a.p_instance->RUNC = (T32A_RUN_ENABLE | T32A_COUNT_STOP);
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if (value <= 0.0f) {
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value = TXZ_DISABLE;
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} else if (value >= 1.0f) {
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value = TXZ_ENABLE;
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}
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// Store the new leading_timing value
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obj->leading_timing = obj->trailing_timing - (obj->trailing_timing * value);
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// Setting T32A_RGA0 register
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obj->p_t32a.p_instance->RGC0 = obj->leading_timing;
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// Start PWM
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obj->p_t32a.p_instance->RUNC = (T32A_RUN_ENABLE | T32A_COUNT_START);
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}
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float pwmout_read(pwmout_t *obj)
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{
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float duty_cycle = (float)(obj->trailing_timing - obj->leading_timing) / obj->trailing_timing;
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return duty_cycle;
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}
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void pwmout_period(pwmout_t *obj, float seconds)
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{
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pwmout_period_us(obj, (int)(seconds * 1000000.0f));
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}
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void pwmout_period_ms(pwmout_t *obj, int ms)
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{
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pwmout_period_us(obj, (ms * 1000));
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}
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// Set the PWM period, keeping the duty cycle the same.
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void pwmout_period_us(pwmout_t *obj, int us)
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{
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uint32_t prscl = 0;
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float duty_cycle = 0;
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float seconds = (float)((us) / 1000000.0f);
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obj->period = seconds;
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// Restore the duty-cycle
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duty_cycle = ((float)(obj->trailing_timing - obj->leading_timing) / obj->trailing_timing);
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prscl = T32A_PRSCLx_32;
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obj->trailing_timing = (us * CALCULATE_RGC1_VAL);
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obj->leading_timing = ((obj->trailing_timing)- (obj->trailing_timing * duty_cycle));
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obj->p_t32a.p_instance->MOD = T32A_MODE_32;
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obj->p_t32a.p_instance->RUNC = (T32A_RUN_DISABLE | T32A_COUNT_STOP);
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obj->p_t32a.p_instance->CRC = (prscl | T32A_RELOAD_TREGx);
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obj->p_t32a.p_instance->IMC = (T32A_IMUFx_MASK_REQ | T32A_IMOFx_MASK_REQ |
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T32A_IMx1_MASK_REQ | T32A_IMx0_MASK_REQ);
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obj->p_t32a.p_instance->RGC0 = obj->leading_timing;
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obj->p_t32a.p_instance->RGC1 = obj->trailing_timing;
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obj->p_t32a.p_instance->OUTCRC0 = T32A_OCR_DISABLE;
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obj->p_t32a.p_instance->OUTCRC1 = (T32A_OCRCMPx1_CLR | T32A_OCRCMPx0_SET);
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obj->p_t32a.p_instance->RUNC = (T32A_RUN_ENABLE | T32A_COUNT_START);
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}
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void pwmout_pulsewidth(pwmout_t *obj, float seconds)
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{
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pwmout_pulsewidth_us(obj, (seconds * 1000000.0f));
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}
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void pwmout_pulsewidth_ms(pwmout_t *obj, int ms)
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{
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pwmout_pulsewidth_us(obj, (ms * 1000));
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}
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void pwmout_pulsewidth_us(pwmout_t *obj, int us)
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{
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float seconds = 0;
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float value = 0;
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seconds = (float)(us / 1000000.0f);
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value = (((seconds / obj->period) * 100.0f) / 100.0f);
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pwmout_write(obj, value);
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}
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