mirror of https://github.com/ARMmbed/mbed-os.git
747 lines
23 KiB
C
747 lines
23 KiB
C
/**
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******************************************************************************
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* @file stm32wbxx_hal_ipcc.c
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* @author MCD Application Team
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* @brief IPCC HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the Inter-Processor communication controller
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* peripherals (IPCC).
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* + Initialization and de-initialization functions
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* + Configuration, notification and interrupts handling
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* + Peripheral State and Error functions
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@verbatim
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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The IPCC HAL driver can be used as follows:
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(#) Declare a IPCC_HandleTypeDef handle structure, for example: IPCC_HandleTypeDef hipcc;
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(#) Initialize the IPCC low level resources by implementing the HAL_IPCC_MspInit() API:
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(##) Enable the IPCC interface clock
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(##) NVIC configuration if you need to use interrupt process
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(+++) Configure the IPCC interrupt priority
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(+++) Enable the NVIC IPCC IRQ
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(#) Initialize the IPCC registers by calling the HAL_IPCC_Init() API which trig
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HAL_IPCC_MspInit().
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(#) Implement the interrupt callbacks for transmission and reception to use the driver in interrupt mode
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(#) Associate those callback to the corresponding channel and direction using HAL_IPCC_ConfigChannel().
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This is the interrupt mode.
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If no callback are configured for a given channel and direction, it is up to the user to poll the
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status of the communication (polling mode).
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(#) Notify the other MCU when a message is available in a chosen channel
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or when a message has been retrieved from a chosen channel by calling
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the HAL_IPCC_NotifyCPU() API.
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32wbxx_hal.h"
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/** @addtogroup STM32WBxx_HAL_Driver
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* @{
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*/
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/** @addtogroup IPCC
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* @{
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*/
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#ifdef HAL_IPCC_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @defgroup IPCC_Private_Constants IPCC Private Constants
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* @{
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*/
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#define IPCC_ALL_RX_BUF 0x0000003FU /*!< Mask for all RX buffers. */
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#define IPCC_ALL_TX_BUF 0x003F0000U /*!< Mask for all TX buffers. */
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#define CHANNEL_INDEX_Msk 0x0000000FU /*!< Mask the channel index to avoid overflow */
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/** @defgroup IPCC_Private_Functions IPCC Private Functions
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* @{
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*/
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void IPCC_MaskInterrupt(uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
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void IPCC_UnmaskInterrupt(uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
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void IPCC_SetDefaultCallbacks(IPCC_HandleTypeDef *hipcc);
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void IPCC_Reset_Register(IPCC_CommonTypeDef *Instance);
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/**
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* @}
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*/
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/** @addtogroup IPCC_Exported_Functions
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* @{
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*/
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/** @addtogroup IPCC_Exported_Functions_Group1
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* @brief Initialization and de-initialization functions
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*
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@verbatim
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===============================================================================
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##### Initialization and de-initialization functions #####
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===============================================================================
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[..] This subsection provides a set of functions allowing to initialize and
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deinitialize the IPCC peripheral:
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(+) User must Implement HAL_IPCC_MspInit() function in which he configures
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all related peripherals resources (CLOCK and NVIC ).
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(+) Call the function HAL_IPCC_Init() to configure the IPCC register.
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(+) Call the function HAL_PKA_DeInit() to restore the default configuration
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of the selected IPCC peripheral.
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@endverbatim
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* @{
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*/
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/**
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* @brief Initialize the IPCC peripheral.
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* @param hipcc IPCC handle
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_IPCC_Init(IPCC_HandleTypeDef *hipcc)
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{
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HAL_StatusTypeDef err = HAL_OK;
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/* Check the IPCC handle allocation */
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if (hipcc != NULL)
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{
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/* Check the parameters */
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assert_param(IS_IPCC_ALL_INSTANCE(hipcc->Instance));
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IPCC_CommonTypeDef *currentInstance = IPCC_C1;
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if (hipcc->State == HAL_IPCC_STATE_RESET)
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{
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/* Init the low level hardware : CLOCK, NVIC */
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HAL_IPCC_MspInit(hipcc);
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}
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/* Reset all registers of the current cpu to default state */
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IPCC_Reset_Register(currentInstance);
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/* Activate the interrupts */
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currentInstance->CR |= (IPCC_CR_RXOIE | IPCC_CR_TXFIE);
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/* Clear callback pointers */
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IPCC_SetDefaultCallbacks(hipcc);
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/* Reset all callback notification request */
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hipcc->callbackRequest = 0;
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hipcc->State = HAL_IPCC_STATE_READY;
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}
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else
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{
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err = HAL_ERROR;
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}
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return err;
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}
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/**
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* @brief DeInitialize the IPCC peripheral.
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* @param hipcc IPCC handle
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_IPCC_DeInit(IPCC_HandleTypeDef *hipcc)
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{
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HAL_StatusTypeDef err = HAL_OK;
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/* Check the IPCC handle allocation */
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if (hipcc != NULL)
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{
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assert_param(IS_IPCC_ALL_INSTANCE(hipcc->Instance));
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IPCC_CommonTypeDef *currentInstance = IPCC_C1;
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/* Set the state to busy */
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hipcc->State = HAL_IPCC_STATE_BUSY;
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/* Reset all registers of the current cpu to default state */
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IPCC_Reset_Register(currentInstance);
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/* Clear callback pointers */
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IPCC_SetDefaultCallbacks(hipcc);
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/* Reset all callback notification request */
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hipcc->callbackRequest = 0;
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/* DeInit the low level hardware : CLOCK, NVIC */
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HAL_IPCC_MspDeInit(hipcc);
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hipcc->State = HAL_IPCC_STATE_RESET;
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}
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else
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{
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err = HAL_ERROR;
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}
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return err;
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}
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/**
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* @brief Initialize the IPCC MSP.
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* @param hipcc IPCC handle
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* @retval None
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*/
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__weak void HAL_IPCC_MspInit(IPCC_HandleTypeDef *hipcc)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hipcc);
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/* NOTE : This function should not be modified. When the callback is needed
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the HAL_IPCC_MspInit should be implemented in the user file
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*/
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}
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/**
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* @brief IPCC MSP DeInit
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* @param hipcc IPCC handle
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* @retval None
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*/
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__weak void HAL_IPCC_MspDeInit(IPCC_HandleTypeDef *hipcc)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hipcc);
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/* NOTE : This function should not be modified. When the callback is needed
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the HAL_IPCC_MspDeInit should be implemented in the user file
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*/
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}
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/**
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* @}
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*/
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/** @addtogroup IPCC_Exported_Functions_Group2
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* @brief Configuration, notification and Irq handling functions.
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*
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@verbatim
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===============================================================================
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##### IO operation functions #####
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===============================================================================
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[..] This section provides functions to allow two MCU to communicate.
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(#) For a given channel (from 0 to IPCC_CHANNEL_NUMBER), for a given direction
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IPCC_CHANNEL_DIR_TX or IPCC_CHANNEL_DIR_RX, you can choose to communicate
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in polling mode or in interrupt mode using IPCC.
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By default, the IPCC HAL driver handle the communication in polling mode.
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By setting a callback for a channel/direction, this communication use
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the interrupt mode.
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(#) Polling mode:
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(++) To transmit information, use HAL_IPCC_NotifyCPU() with
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IPCC_CHANNEL_DIR_TX. To know when the other processor has handled
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the notification, poll the communication using HAL_IPCC_NotifyCPU
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with IPCC_CHANNEL_DIR_TX.
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(++) To receive information, poll the status of the communication with
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HAL_IPCC_GetChannelStatus with IPCC_CHANNEL_DIR_RX. To notify the other
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processor that the information has been received, use HAL_IPCC_NotifyCPU
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with IPCC_CHANNEL_DIR_RX.
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(#) Interrupt mode:
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(++) Configure a callback for the channel and the direction using HAL_IPCC_ConfigChannel().
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This callback will be triggered under interrupt.
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(++) To transmit information, use HAL_IPCC_NotifyCPU() with
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IPCC_CHANNEL_DIR_TX. The callback configured with HAL_IPCC_ConfigChannel() and
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IPCC_CHANNEL_DIR_TX will be triggered once the communication has been handled by the
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other processor.
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(++) To receive information, the callback configured with HAL_IPCC_ConfigChannel() and
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IPCC_CHANNEL_DIR_RX will be triggered on reception of a communication.To notify the other
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processor that the information has been received, use HAL_IPCC_NotifyCPU
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with IPCC_CHANNEL_DIR_RX.
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(++) HAL_IPCC_TX_IRQHandler must be added to the IPCC TX IRQHandler
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(++) HAL_IPCC_RX_IRQHandler must be added to the IPCC RX IRQHandler
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@endverbatim
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* @{
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*/
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/**
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* @brief Activate the callback notification on receive/transmit interrupt
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* @param hipcc IPCC handle
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* @param ChannelIndex Channel number
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* This parameter can be one of the following values:
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* @arg IPCC_CHANNEL_1: IPCC Channel 1
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* @arg IPCC_CHANNEL_2: IPCC Channel 2
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* @arg IPCC_CHANNEL_3: IPCC Channel 3
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* @arg IPCC_CHANNEL_4: IPCC Channel 4
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* @arg IPCC_CHANNEL_5: IPCC Channel 5
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* @arg IPCC_CHANNEL_6: IPCC Channel 6
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* @param ChannelDir Channel direction
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* @param cb Interrupt callback
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_IPCC_ActivateNotification(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir, ChannelCb cb)
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{
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HAL_StatusTypeDef err = HAL_OK;
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/* Check the IPCC handle allocation */
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if (hipcc != NULL)
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{
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/* Check the parameters */
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assert_param(IS_IPCC_ALL_INSTANCE(hipcc->Instance));
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/* Check IPCC state */
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if (hipcc->State == HAL_IPCC_STATE_READY)
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{
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/* Set callback and register masking information */
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if (ChannelDir == IPCC_CHANNEL_DIR_TX)
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{
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hipcc->ChannelCallbackTx[ChannelIndex] = cb;
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hipcc->callbackRequest |= (IPCC_MR_CH1FM_Msk << (ChannelIndex & CHANNEL_INDEX_Msk));
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}
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else
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{
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hipcc->ChannelCallbackRx[ChannelIndex] = cb;
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hipcc->callbackRequest |= (IPCC_MR_CH1OM_Msk << (ChannelIndex & CHANNEL_INDEX_Msk));
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}
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/* Unmask only the channels in reception (Transmission channel mask/unmask is done in HAL_IPCC_NotifyCPU) */
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if (ChannelDir == IPCC_CHANNEL_DIR_RX)
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{
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IPCC_UnmaskInterrupt(ChannelIndex, ChannelDir);
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}
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}
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else
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{
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err = HAL_ERROR;
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}
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}
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else
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{
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err = HAL_ERROR;
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}
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return err;
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}
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/**
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* @brief Remove the callback notification on receive/transmit interrupt
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* @param hipcc IPCC handle
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* @param ChannelIndex Channel number
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* This parameter can be one of the following values:
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* @arg IPCC_CHANNEL_1: IPCC Channel 1
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* @arg IPCC_CHANNEL_2: IPCC Channel 2
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* @arg IPCC_CHANNEL_3: IPCC Channel 3
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* @arg IPCC_CHANNEL_4: IPCC Channel 4
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* @arg IPCC_CHANNEL_5: IPCC Channel 5
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* @arg IPCC_CHANNEL_6: IPCC Channel 6
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* @param ChannelDir Channel direction
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_IPCC_DeActivateNotification(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir)
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{
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HAL_StatusTypeDef err = HAL_OK;
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/* Check the IPCC handle allocation */
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if (hipcc != NULL)
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{
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/* Check the parameters */
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assert_param(IS_IPCC_ALL_INSTANCE(hipcc->Instance));
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/* Check IPCC state */
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if (hipcc->State == HAL_IPCC_STATE_READY)
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{
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/* Set default callback and register masking information */
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if (ChannelDir == IPCC_CHANNEL_DIR_TX)
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{
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hipcc->ChannelCallbackTx[ChannelIndex] = HAL_IPCC_TxCallback;
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hipcc->callbackRequest &= ~(IPCC_MR_CH1FM_Msk << (ChannelIndex & CHANNEL_INDEX_Msk));
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}
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else
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{
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hipcc->ChannelCallbackRx[ChannelIndex] = HAL_IPCC_RxCallback;
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hipcc->callbackRequest &= ~(IPCC_MR_CH1OM_Msk << (ChannelIndex & CHANNEL_INDEX_Msk));
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}
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/* Mask the interrupt */
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IPCC_MaskInterrupt(ChannelIndex, ChannelDir);
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}
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else
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{
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err = HAL_ERROR;
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}
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}
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else
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{
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err = HAL_ERROR;
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}
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return err;
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}
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/**
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* @brief Get state of IPCC channel
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* @param hipcc IPCC handle
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* @param ChannelIndex Channel number
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* This parameter can be one of the following values:
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* @arg IPCC_CHANNEL_1: IPCC Channel 1
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* @arg IPCC_CHANNEL_2: IPCC Channel 2
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* @arg IPCC_CHANNEL_3: IPCC Channel 3
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* @arg IPCC_CHANNEL_4: IPCC Channel 4
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* @arg IPCC_CHANNEL_5: IPCC Channel 5
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* @arg IPCC_CHANNEL_6: IPCC Channel 6
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* @param ChannelDir Channel direction
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* @retval Channel status
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*/
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IPCC_CHANNELStatusTypeDef HAL_IPCC_GetChannelStatus(IPCC_HandleTypeDef const *const hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir)
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{
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uint32_t channel_state;
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IPCC_CommonTypeDef *currentInstance = IPCC_C1;
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IPCC_CommonTypeDef *otherInstance = IPCC_C2;
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/* Check the parameters */
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assert_param(IS_IPCC_ALL_INSTANCE(hipcc->Instance));
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/* Read corresponding channel depending of the MCU and the direction */
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if (ChannelDir == IPCC_CHANNEL_DIR_TX)
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{
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channel_state = (currentInstance->SR) & (IPCC_SR_CH1F_Msk << (ChannelIndex & CHANNEL_INDEX_Msk));
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}
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else
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{
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channel_state = (otherInstance->SR) & (IPCC_SR_CH1F_Msk << (ChannelIndex & CHANNEL_INDEX_Msk));
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}
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return (channel_state == 0UL) ? IPCC_CHANNEL_STATUS_FREE : IPCC_CHANNEL_STATUS_OCCUPIED ;
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}
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/**
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* @brief Notify remote processor
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* @param hipcc IPCC handle
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* @param ChannelIndex Channel number
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* This parameter can be one of the following values:
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* @arg IPCC_CHANNEL_1: IPCC Channel 1
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* @arg IPCC_CHANNEL_2: IPCC Channel 2
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* @arg IPCC_CHANNEL_3: IPCC Channel 3
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* @arg IPCC_CHANNEL_4: IPCC Channel 4
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* @arg IPCC_CHANNEL_5: IPCC Channel 5
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* @arg IPCC_CHANNEL_6: IPCC Channel 6
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* @param ChannelDir Channel direction
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_IPCC_NotifyCPU(IPCC_HandleTypeDef const *const hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir)
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{
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HAL_StatusTypeDef err = HAL_OK;
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uint32_t mask;
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IPCC_CommonTypeDef *currentInstance = IPCC_C1;
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/* Check the parameters */
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assert_param(IS_IPCC_ALL_INSTANCE(hipcc->Instance));
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/* Check if IPCC is initiliased */
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if (hipcc->State == HAL_IPCC_STATE_READY)
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{
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/* For IPCC_CHANNEL_DIR_TX, set the status. For IPCC_CHANNEL_DIR_RX, clear the status */
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currentInstance->SCR |= ((ChannelDir == IPCC_CHANNEL_DIR_TX) ? IPCC_SCR_CH1S : IPCC_SCR_CH1C) << (ChannelIndex & CHANNEL_INDEX_Msk) ;
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/* Unmask interrupt if the callback is requested */
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mask = ((ChannelDir == IPCC_CHANNEL_DIR_TX) ? IPCC_MR_CH1FM_Msk : IPCC_MR_CH1OM_Msk) << (ChannelIndex & CHANNEL_INDEX_Msk) ;
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if ((hipcc->callbackRequest & mask) == mask)
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{
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IPCC_UnmaskInterrupt(ChannelIndex, ChannelDir);
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}
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}
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else
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{
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err = HAL_ERROR;
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}
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return err;
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}
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/**
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* @}
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*/
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/** @addtogroup IPCC_IRQ_Handler_and_Callbacks
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* @{
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*/
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/**
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* @brief This function handles IPCC Tx Free interrupt request.
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* @param hipcc IPCC handle
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* @retval None
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*/
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void HAL_IPCC_TX_IRQHandler(IPCC_HandleTypeDef *const hipcc)
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{
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uint32_t irqmask;
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uint32_t bit_pos;
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uint32_t ch_count = 0U;
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IPCC_CommonTypeDef *currentInstance = IPCC_C1;
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/* check the Tx free channels which are not masked */
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irqmask = ~(currentInstance->MR) & IPCC_ALL_TX_BUF;
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irqmask = irqmask & ~(currentInstance->SR << IPCC_MR_CH1FM_Pos);
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while (irqmask != 0UL) /* if several bits are set, it loops to serve all of them */
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{
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bit_pos = 1UL << (IPCC_MR_CH1FM_Pos + (ch_count & CHANNEL_INDEX_Msk));
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if ((irqmask & bit_pos) != 0U)
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{
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/* mask the channel Free interrupt */
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currentInstance->MR |= bit_pos;
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if (hipcc->ChannelCallbackTx[ch_count] != NULL)
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{
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hipcc->ChannelCallbackTx[ch_count](hipcc, ch_count, IPCC_CHANNEL_DIR_TX);
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}
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irqmask = irqmask & ~(bit_pos);
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}
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ch_count++;
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}
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}
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/**
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* @brief This function handles IPCC Rx Occupied interrupt request.
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* @param hipcc : IPCC handle
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|
* @retval None
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|
*/
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void HAL_IPCC_RX_IRQHandler(IPCC_HandleTypeDef *const hipcc)
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|
{
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|
uint32_t irqmask;
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uint32_t bit_pos;
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uint32_t ch_count = 0U;
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IPCC_CommonTypeDef *currentInstance = IPCC_C1;
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IPCC_CommonTypeDef *otherInstance = IPCC_C2;
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|
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/* check the Rx occupied channels which are not masked */
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irqmask = ~(currentInstance->MR) & IPCC_ALL_RX_BUF;
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irqmask = irqmask & otherInstance->SR;
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|
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while (irqmask != 0UL) /* if several bits are set, it loops to serve all of them */
|
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{
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bit_pos = 1UL << (ch_count & CHANNEL_INDEX_Msk);
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|
|
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if ((irqmask & bit_pos) != 0U)
|
|
{
|
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/* mask the channel occupied interrupt */
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|
currentInstance->MR |= bit_pos;
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if (hipcc->ChannelCallbackRx[ch_count] != NULL)
|
|
{
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|
hipcc->ChannelCallbackRx[ch_count](hipcc, ch_count, IPCC_CHANNEL_DIR_RX);
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}
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irqmask = irqmask & ~(bit_pos);
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}
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ch_count++;
|
|
}
|
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}
|
|
|
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/**
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|
* @brief Rx occupied callback
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|
* @param hipcc IPCC handle
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|
* @param ChannelIndex Channel number
|
|
* This parameter can be one of the following values:
|
|
* @arg IPCC_CHANNEL_1: IPCC Channel 1
|
|
* @arg IPCC_CHANNEL_2: IPCC Channel 2
|
|
* @arg IPCC_CHANNEL_3: IPCC Channel 3
|
|
* @arg IPCC_CHANNEL_4: IPCC Channel 4
|
|
* @arg IPCC_CHANNEL_5: IPCC Channel 5
|
|
* @arg IPCC_CHANNEL_6: IPCC Channel 6
|
|
* @param ChannelDir Channel direction
|
|
*/
|
|
__weak void HAL_IPCC_RxCallback(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir)
|
|
{
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(hipcc);
|
|
UNUSED(ChannelIndex);
|
|
UNUSED(ChannelDir);
|
|
|
|
/* NOTE : This function should not be modified, when the callback is needed,
|
|
the HAL_IPCC_RxCallback can be implemented in the user file
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @brief Tx free callback
|
|
* @param hipcc IPCC handle
|
|
* @param ChannelIndex Channel number
|
|
* This parameter can be one of the following values:
|
|
* @arg IPCC_CHANNEL_1: IPCC Channel 1
|
|
* @arg IPCC_CHANNEL_2: IPCC Channel 2
|
|
* @arg IPCC_CHANNEL_3: IPCC Channel 3
|
|
* @arg IPCC_CHANNEL_4: IPCC Channel 4
|
|
* @arg IPCC_CHANNEL_5: IPCC Channel 5
|
|
* @arg IPCC_CHANNEL_6: IPCC Channel 6
|
|
* @param ChannelDir Channel direction
|
|
*/
|
|
__weak void HAL_IPCC_TxCallback(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir)
|
|
{
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(hipcc);
|
|
UNUSED(ChannelIndex);
|
|
UNUSED(ChannelDir);
|
|
|
|
/* NOTE : This function should not be modified, when the callback is needed,
|
|
the HAL_IPCC_TxCallback can be implemented in the user file
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup IPCC_Exported_Functions_Group3
|
|
* @brief IPCC Peripheral State and Error functions
|
|
*
|
|
@verbatim
|
|
==============================================================================
|
|
##### Peripheral State and Error functions #####
|
|
==============================================================================
|
|
[..]
|
|
This subsection permit to get in run-time the status of the peripheral
|
|
and the data flow.
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Return the IPCC handle state.
|
|
* @param hipcc IPCC handle
|
|
* @retval IPCC handle state
|
|
*/
|
|
HAL_IPCC_StateTypeDef HAL_IPCC_GetState(IPCC_HandleTypeDef const *const hipcc)
|
|
{
|
|
return hipcc->State;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup IPCC_Private_Functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Mask IPCC interrupts.
|
|
* @param ChannelIndex Channel number
|
|
* This parameter can be one of the following values:
|
|
* @arg IPCC_CHANNEL_1: IPCC Channel 1
|
|
* @arg IPCC_CHANNEL_2: IPCC Channel 2
|
|
* @arg IPCC_CHANNEL_3: IPCC Channel 3
|
|
* @arg IPCC_CHANNEL_4: IPCC Channel 4
|
|
* @arg IPCC_CHANNEL_5: IPCC Channel 5
|
|
* @arg IPCC_CHANNEL_6: IPCC Channel 6
|
|
* @param ChannelDir Channel direction
|
|
*/
|
|
void IPCC_MaskInterrupt(uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir)
|
|
{
|
|
IPCC_CommonTypeDef *currentInstance = IPCC_C1;
|
|
if (ChannelDir == IPCC_CHANNEL_DIR_TX)
|
|
{
|
|
/* Mask interrupt */
|
|
currentInstance->MR |= (IPCC_MR_CH1FM_Msk << (ChannelIndex & CHANNEL_INDEX_Msk));
|
|
}
|
|
else
|
|
{
|
|
/* Mask interrupt */
|
|
currentInstance->MR |= (IPCC_MR_CH1OM_Msk << (ChannelIndex & CHANNEL_INDEX_Msk));
|
|
}
|
|
}
|
|
/**
|
|
* @brief Unmask IPCC interrupts.
|
|
* @param ChannelIndex Channel number
|
|
* This parameter can be one of the following values:
|
|
* @arg IPCC_CHANNEL_1: IPCC Channel 1
|
|
* @arg IPCC_CHANNEL_2: IPCC Channel 2
|
|
* @arg IPCC_CHANNEL_3: IPCC Channel 3
|
|
* @arg IPCC_CHANNEL_4: IPCC Channel 4
|
|
* @arg IPCC_CHANNEL_5: IPCC Channel 5
|
|
* @arg IPCC_CHANNEL_6: IPCC Channel 6
|
|
* @param ChannelDir Channel direction
|
|
*/
|
|
void IPCC_UnmaskInterrupt(uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir)
|
|
{
|
|
IPCC_CommonTypeDef *currentInstance = IPCC_C1;
|
|
if (ChannelDir == IPCC_CHANNEL_DIR_TX)
|
|
{
|
|
/* Unmask interrupt */
|
|
currentInstance->MR &= ~(IPCC_MR_CH1FM_Msk << (ChannelIndex & CHANNEL_INDEX_Msk));
|
|
}
|
|
else
|
|
{
|
|
/* Unmask interrupt */
|
|
currentInstance->MR &= ~(IPCC_MR_CH1OM_Msk << (ChannelIndex & CHANNEL_INDEX_Msk));
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Reset all callbacks of the handle to NULL.
|
|
* @param hipcc IPCC handle
|
|
*/
|
|
void IPCC_SetDefaultCallbacks(IPCC_HandleTypeDef *hipcc)
|
|
{
|
|
uint32_t i;
|
|
/* Set all callbacks to default */
|
|
for (i = 0; i < IPCC_CHANNEL_NUMBER; i++)
|
|
{
|
|
hipcc->ChannelCallbackRx[i] = HAL_IPCC_RxCallback;
|
|
hipcc->ChannelCallbackTx[i] = HAL_IPCC_TxCallback;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Reset IPCC register to default value for the concerned instance.
|
|
* @param Instance pointer to register
|
|
*/
|
|
void IPCC_Reset_Register(IPCC_CommonTypeDef *Instance)
|
|
{
|
|
/* Disable RX and TX interrupts */
|
|
Instance->CR = 0x00000000U;
|
|
|
|
/* Mask RX and TX interrupts */
|
|
Instance->MR = (IPCC_ALL_TX_BUF | IPCC_ALL_RX_BUF);
|
|
|
|
/* Clear RX status */
|
|
Instance->SCR = IPCC_ALL_RX_BUF;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* HAL_IPCC_MODULE_ENABLED */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|