mirror of https://github.com/ARMmbed/mbed-os.git
74 lines
2.6 KiB
C
74 lines
2.6 KiB
C
/*
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* mbed Microcontroller Library
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* Copyright (c) 2017-2018 Future Electronics
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_DEVICE_H
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#define MBED_DEVICE_H
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/*----------------------------------------------------------------------------*/
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/** Config options. */
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/*----------------------------------------------------------------------------*/
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/** ALTHF (BLE ECO) frequency in Hz */
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#define CYDEV_CLK_ALTHF__HZ ( 8000000UL)
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/*----------------------------------------------------------------------------*/
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#include "cmsis.h"
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#include "objects.h"
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#include "cycfg.h"
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/*
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* Board clocks.
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*/
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/** Default HFClk frequency in Hz */
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#ifndef CY_CLK_HFCLK0_FREQ_HZ
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#define CY_CLK_HFCLK0_FREQ_HZ (100000000UL)
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#endif
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/** Default PeriClk frequency in Hz */
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#ifndef CY_CLK_PERICLK_FREQ_HZ
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#define CY_CLK_PERICLK_FREQ_HZ (CY_CLK_HFCLK0_FREQ_HZ / 2)
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#endif
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/** Default SlowClk system core frequency in Hz */
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#ifndef CY_CLK_SYSTEM_FREQ_HZ
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#define CY_CLK_SYSTEM_FREQ_HZ (CY_CLK_PERICLK_FREQ_HZ)
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#endif
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/** Interrupt assignment for CM0+ core.
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* On PSoC6 CM0+ core physical interrupt are routed into NVIC through a programmable
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* multiplexer. This requires that we define which of the 32 NVIC channels is used
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* by which interrupt. This is done here.
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*/
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#define CY_M0_CORE_IRQ_CHANNEL_LP_TICKER ((IRQn_Type)0)
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#define CY_M0_CORE_IRQ_CHANNEL_IPC_SYS ((IRQn_Type)1)
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#define CY_M0_CORE_IRQ_CHANNEL_IPC_USR ((IRQn_Type)2)
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#define CY_M0_CORE_IRQ_CHANNEL_PSA_MAILBOX ((IRQn_Type)3)
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#define CY_M0_CORE_IRQ_CHANNEL_SERIAL ((IRQn_Type)4)
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#define CY_M0_CORE_IRQ_CHANNEL_BLE ((IRQn_Type)7)
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#define CY_M0_CORE_IRQ_CHANNEL_US_TICKER ((IRQn_Type)8)
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/** Identifiers used in allocation of NVIC channels.
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*/
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#define CY_US_TICKER_IRQN_ID (0x100)
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#define CY_SERIAL_IRQN_ID (0x200)
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#define CY_BLE_IRQN_ID (0x300)
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#define CY_GPIO_IRQN_ID (0x400)
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#define CY_LP_TICKER_IRQN_ID (0x500)
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#define CY_PSA_MAILBOX_IRQN_ID (0x600)
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#endif
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