mirror of https://github.com/ARMmbed/mbed-os.git
678 lines
22 KiB
Python
678 lines
22 KiB
Python
#!/usr/bin/env python
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"""Memory Map File Analyser for ARM mbed"""
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import sys
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import os
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import re
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import csv
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import json
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import argparse
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from prettytable import PrettyTable
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from utils import argparse_filestring_type, \
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argparse_lowercase_hyphen_type, argparse_uppercase_type
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DEBUG = False
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RE_ARMCC = re.compile(
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r'^\s+0x(\w{8})\s+0x(\w{8})\s+(\w+)\s+(\w+)\s+(\d+)\s+[*]?.+\s+(.+)$')
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RE_IAR = re.compile(
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r'^\s+(.+)\s+(zero|const|ro code|inited|uninit)\s'
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r'+0x(\w{8})\s+0x(\w+)\s+(.+)\s.+$')
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class MemapParser(object):
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"""An object that represents parsed results, parses the memory map files,
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and writes out different file types of memory results
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"""
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print_sections = ('.text', '.data', '.bss')
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misc_flash_sections = ('.interrupts', '.flash_config')
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other_sections = ('.interrupts_ram', '.init', '.ARM.extab',
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'.ARM.exidx', '.ARM.attributes', '.eh_frame',
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'.init_array', '.fini_array', '.jcr', '.stab',
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'.stabstr', '.ARM.exidx', '.ARM')
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# sections to print info (generic for all toolchains)
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sections = ('.text', '.data', '.bss', '.heap', '.stack')
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def __init__(self, detailed_misc=False):
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""" General initialization
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"""
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#
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self.detailed_misc = detailed_misc
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# list of all modules and their sections
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self.modules = dict()
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# sections must be defined in this order to take irrelevant out
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self.all_sections = self.sections + self.other_sections + \
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self.misc_flash_sections + ('unknown', 'OUTPUT')
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# list of all object files and mappting to module names
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self.object_to_module = dict()
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# Memory report (sections + summary)
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self.mem_report = []
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# Just the memory summary section
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self.mem_summary = dict()
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self.subtotal = dict()
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def module_add(self, module_name, size, section):
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""" Adds a module / section to the list
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Positional arguments:
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module_name - name of the module to add
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size - the size of the module being added
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section - the section the module contributes to
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"""
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if module_name in self.modules:
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self.modules[module_name][section] += size
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else:
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temp_dic = dict()
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for section_idx in self.all_sections:
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temp_dic[section_idx] = 0
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temp_dic[section] = size
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self.modules[module_name] = temp_dic
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def check_new_section_gcc(self, line):
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""" Check whether a new section in a map file has been detected (only
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applies to gcc)
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Positional arguments:
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line - the line to check for a new section
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"""
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for i in self.all_sections:
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if line.startswith(i):
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# should name of the section (assuming it's a known one)
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return i
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if line.startswith('.'):
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return 'unknown' # all others are classified are unknown
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else:
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return False # everything else, means no change in section
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def path_object_to_module_name(self, txt):
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""" Parse a path to object file to extract it's module and object data
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Positional arguments:
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txt - the path to parse the object and module name from
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"""
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txt = txt.replace('\\', '/')
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rex_mbed_os_name = r'^.+mbed-os\/(.+)\/(.+\.o)$'
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test_rex_mbed_os_name = re.match(rex_mbed_os_name, txt)
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if test_rex_mbed_os_name:
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object_name = test_rex_mbed_os_name.group(2)
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data = test_rex_mbed_os_name.group(1).split('/')
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ndata = len(data)
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if ndata == 1:
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module_name = data[0]
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else:
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module_name = data[0] + '/' + data[1]
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if self.detailed_misc:
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return [module_name + '/' + object_name, object_name]
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else:
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return [module_name, object_name]
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elif self.detailed_misc:
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rex_obj_name = r'^.+\/(.+\.o\)*)$'
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test_rex_obj_name = re.match(rex_obj_name, txt)
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if test_rex_obj_name:
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object_name = test_rex_obj_name.group(1)
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return ['Misc/' + object_name, ""]
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return ['Misc', ""]
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else:
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return ['Misc', ""]
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def parse_section_gcc(self, line):
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""" Parse data from a section of gcc map file
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examples:
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0x00004308 0x7c ./BUILD/K64F/GCC_ARM/mbed-os/hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/spi_api.o
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.text 0x00000608 0x198 ./BUILD/K64F/GCC_ARM/mbed-os/core/mbed-rtos/rtx/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_GCC/HAL_CM4.o
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Positional arguments:
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line - the line to parse a section from
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"""
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rex_address_len_name = re.compile(
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r'^\s+.*0x(\w{8,16})\s+0x(\w+)\s(.+)$')
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test_address_len_name = re.match(rex_address_len_name, line)
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if test_address_len_name:
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if int(test_address_len_name.group(2), 16) == 0: # size == 0
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return ["", 0] # no valid entry
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else:
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m_name, _ = self.path_object_to_module_name(
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test_address_len_name.group(3))
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m_size = int(test_address_len_name.group(2), 16)
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return [m_name, m_size]
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else: # special corner case for *fill* sections
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# example
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# *fill* 0x0000abe4 0x4
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rex_address_len = r'^\s+\*fill\*\s+0x(\w{8,16})\s+0x(\w+).*$'
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test_address_len = re.match(rex_address_len, line)
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if test_address_len:
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if int(test_address_len.group(2), 16) == 0: # size == 0
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return ["", 0] # no valid entry
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else:
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m_name = 'Fill'
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m_size = int(test_address_len.group(2), 16)
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return [m_name, m_size]
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else:
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return ["", 0] # no valid entry
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def parse_map_file_gcc(self, file_desc):
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""" Main logic to decode gcc map files
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Positional arguments:
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file_desc - a stream object to parse as a gcc map file
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"""
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current_section = 'unknown'
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with file_desc as infile:
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# Search area to parse
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for line in infile:
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if line.startswith('Linker script and memory map'):
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current_section = "unknown"
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break
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# Start decoding the map file
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for line in infile:
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change_section = self.check_new_section_gcc(line)
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if change_section == "OUTPUT": # finish parsing file: exit
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break
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elif change_section != False:
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current_section = change_section
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[module_name, module_size] = self.parse_section_gcc(line)
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if module_size == 0 or module_name == "":
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pass
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else:
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self.module_add(module_name, module_size, current_section)
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if DEBUG:
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print "Line: %s" % line,
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print "Module: %s\tSection: %s\tSize: %s" % \
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(module_name, current_section, module_size)
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raw_input("----------")
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def parse_section_armcc(self, line):
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""" Parse data from an armcc map file
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Examples of armcc map file:
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Base_Addr Size Type Attr Idx E Section Name Object
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0x00000000 0x00000400 Data RO 11222 RESET startup_MK64F12.o
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0x00000410 0x00000008 Code RO 49364 * !!!main c_w.l(__main.o)
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Positional arguments:
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line - the line to parse the section data from
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"""
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test_rex_armcc = re.match(RE_ARMCC, line)
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if test_rex_armcc:
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size = int(test_rex_armcc.group(2), 16)
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if test_rex_armcc.group(4) == 'RO':
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section = '.text'
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else:
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if test_rex_armcc.group(3) == 'Data':
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section = '.data'
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elif test_rex_armcc.group(3) == 'Zero':
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section = '.bss'
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else:
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print "BUG armcc map parser"
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raw_input()
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# lookup object in dictionary and return module name
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object_name = test_rex_armcc.group(6)
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if object_name in self.object_to_module:
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module_name = self.object_to_module[object_name]
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else:
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module_name = 'Misc'
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return [module_name, size, section]
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else:
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return ["", 0, ""] # no valid entry
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def parse_section_iar(self, line):
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""" Parse data from an IAR map file
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Examples of IAR map file:
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Section Kind Address Size Object
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.intvec ro code 0x00000000 0x198 startup_MK64F12.o [15]
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.rodata const 0x00000198 0x0 zero_init3.o [133]
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.iar.init_table const 0x00008384 0x2c - Linker created -
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Initializer bytes const 0x00000198 0xb2 <for P3 s0>
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.data inited 0x20000000 0xd4 driverAtmelRFInterface.o [70]
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.bss zero 0x20000598 0x318 RTX_Conf_CM.o [4]
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.iar.dynexit uninit 0x20001448 0x204 <Block tail>
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HEAP uninit 0x20001650 0x10000 <Block tail>
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Positional_arguments:
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line - the line to parse section data from
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"""
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test_rex_iar = re.match(RE_IAR, line)
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if test_rex_iar:
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size = int(test_rex_iar.group(4), 16)
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if test_rex_iar.group(2) == 'const' or \
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test_rex_iar.group(2) == 'ro code':
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section = '.text'
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elif test_rex_iar.group(2) == 'zero' or \
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test_rex_iar.group(2) == 'uninit':
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if test_rex_iar.group(1)[0:4] == 'HEAP':
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section = '.heap'
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elif test_rex_iar.group(1)[0:6] == 'CSTACK':
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section = '.stack'
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else:
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section = '.bss' # default section
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elif test_rex_iar.group(2) == 'inited':
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section = '.data'
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else:
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print "BUG IAR map parser"
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raw_input()
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# lookup object in dictionary and return module name
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object_name = test_rex_iar.group(5)
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if object_name in self.object_to_module:
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module_name = self.object_to_module[object_name]
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else:
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module_name = 'Misc'
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return [module_name, size, section]
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else:
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return ["", 0, ""] # no valid entry
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def parse_map_file_armcc(self, file_desc):
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""" Main logic to decode armc5 map files
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Positional arguments:
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file_desc - a file like object to parse as an armc5 map file
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"""
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with file_desc as infile:
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# Search area to parse
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for line in infile:
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if line.startswith(' Base Addr Size'):
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break
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# Start decoding the map file
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for line in infile:
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[name, size, section] = self.parse_section_armcc(line)
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if size == 0 or name == "" or section == "":
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pass
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else:
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self.module_add(name, size, section)
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def parse_map_file_iar(self, file_desc):
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""" Main logic to decode IAR map files
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Positional arguments:
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file_desc - a file like object to parse as an IAR map file
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"""
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with file_desc as infile:
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# Search area to parse
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for line in infile:
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if line.startswith(' Section '):
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break
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# Start decoding the map file
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for line in infile:
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[name, size, section] = self.parse_section_iar(line)
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if size == 0 or name == "" or section == "":
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pass
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else:
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self.module_add(name, size, section)
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def search_objects(self, path):
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""" Searches for object files and creates mapping: object --> module
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Positional arguments:
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path - the path to an object file
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"""
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path = path.replace('\\', '/')
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# check location of map file
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rex = r'^(.+)' + r'\/(.+\.map)$'
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test_rex = re.match(rex, path)
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if test_rex:
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search_path = test_rex.group(1) + '/mbed-os/'
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else:
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print "Warning: this doesn't look like an mbed project"
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return
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for root, _, obj_files in os.walk(search_path):
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for obj_file in obj_files:
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if obj_file.endswith(".o"):
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module_name, object_name = self.path_object_to_module_name(
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os.path.join(root, obj_file))
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if object_name in self.object_to_module:
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if DEBUG:
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print "WARNING: multiple usages of object file: %s"\
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% object_name
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print " Current: %s" % \
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self.object_to_module[object_name]
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print " New: %s" % module_name
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print " "
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else:
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self.object_to_module.update({object_name:module_name})
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export_formats = ["json", "csv-ci", "table"]
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def generate_output(self, export_format, file_output=None):
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""" Generates summary of memory map data
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Positional arguments:
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export_format - the format to dump
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Keyword arguments:
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file_desc - descriptor (either stdout or file)
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Returns: generated string for the 'table' format, otherwise None
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"""
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try:
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if file_output:
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file_desc = open(file_output, 'wb')
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else:
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file_desc = sys.stdout
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except IOError as error:
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print "I/O error({0}): {1}".format(error.errno, error.strerror)
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return False
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to_call = {'json': self.generate_json,
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'csv-ci': self.generate_csv,
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'table': self.generate_table}[export_format]
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output = to_call(file_desc)
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if file_desc is not sys.stdout:
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file_desc.close()
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return output
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def generate_json(self, file_desc):
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"""Generate a json file from a memory map
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Positional arguments:
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file_desc - the file to write out the final report to
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"""
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file_desc.write(json.dumps(self.mem_report, indent=4))
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file_desc.write('\n')
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return None
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def generate_csv(self, file_desc):
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"""Generate a CSV file from a memoy map
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Positional arguments:
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file_desc - the file to write out the final report to
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"""
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csv_writer = csv.writer(file_desc, delimiter=',',
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quoting=csv.QUOTE_MINIMAL)
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csv_module_section = []
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csv_sizes = []
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for i in sorted(self.modules):
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for k in self.print_sections:
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csv_module_section += [i+k]
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csv_sizes += [self.modules[i][k]]
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csv_module_section += ['static_ram']
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csv_sizes += [self.mem_summary['static_ram']]
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csv_module_section += ['heap']
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if self.mem_summary['heap'] == 0:
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csv_sizes += ['unknown']
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else:
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csv_sizes += [self.mem_summary['heap']]
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csv_module_section += ['stack']
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if self.mem_summary['stack'] == 0:
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csv_sizes += ['unknown']
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else:
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csv_sizes += [self.mem_summary['stack']]
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csv_module_section += ['total_ram']
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csv_sizes += [self.mem_summary['total_ram']]
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csv_module_section += ['total_flash']
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csv_sizes += [self.mem_summary['total_flash']]
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csv_writer.writerow(csv_module_section)
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csv_writer.writerow(csv_sizes)
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return None
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def generate_table(self, file_desc):
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"""Generate a table from a memoy map
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Positional arguments:
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file_desc - the file to write out the final report to
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Returns: string of the generated table
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"""
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# Create table
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columns = ['Module']
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columns.extend(self.print_sections)
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table = PrettyTable(columns)
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table.align["Module"] = "l"
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for col in self.print_sections:
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table.align[col] = 'r'
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for i in list(self.print_sections):
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table.align[i] = 'r'
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for i in sorted(self.modules):
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row = [i]
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for k in self.print_sections:
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row.append(self.modules[i][k])
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table.add_row(row)
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subtotal_row = ['Subtotals']
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for k in self.print_sections:
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subtotal_row.append(self.subtotal[k])
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table.add_row(subtotal_row)
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output = table.get_string()
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output += '\n'
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if self.mem_summary['heap'] == 0:
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output += "Allocated Heap: unknown\n"
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else:
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output += "Allocated Heap: %s bytes\n" % \
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str(self.mem_summary['heap'])
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if self.mem_summary['stack'] == 0:
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output += "Allocated Stack: unknown\n"
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else:
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output += "Allocated Stack: %s bytes\n" % \
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str(self.mem_summary['stack'])
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output += "Total Static RAM memory (data + bss): %s bytes\n" % \
|
|
str(self.mem_summary['static_ram'])
|
|
output += "Total RAM memory (data + bss + heap + stack): %s bytes\n" % \
|
|
str(self.mem_summary['total_ram'])
|
|
output += "Total Flash memory (text + data + misc): %s bytes\n" % \
|
|
str(self.mem_summary['total_flash'])
|
|
|
|
return output
|
|
|
|
toolchains = ["ARM", "ARM_STD", "ARM_MICRO", "GCC_ARM", "GCC_CR", "IAR"]
|
|
|
|
def compute_report(self):
|
|
for k in self.sections:
|
|
self.subtotal[k] = 0
|
|
|
|
for i in sorted(self.modules):
|
|
for k in self.sections:
|
|
self.subtotal[k] += self.modules[i][k]
|
|
|
|
# Calculate misc flash sections
|
|
self.misc_flash_mem = 0
|
|
for i in self.modules:
|
|
for k in self.misc_flash_sections:
|
|
if self.modules[i][k]:
|
|
self.misc_flash_mem += self.modules[i][k]
|
|
|
|
self.mem_summary = {
|
|
'static_ram': (self.subtotal['.data'] + self.subtotal['.bss']),
|
|
'heap': (self.subtotal['.heap']),
|
|
'stack': (self.subtotal['.stack']),
|
|
'total_ram': (self.subtotal['.data'] + self.subtotal['.bss'] +
|
|
self.subtotal['.heap']+self.subtotal['.stack']),
|
|
'total_flash': (self.subtotal['.text'] + self.subtotal['.data'] +
|
|
self.misc_flash_mem),
|
|
}
|
|
|
|
self.mem_report = []
|
|
for i in sorted(self.modules):
|
|
self.mem_report.append({
|
|
"module":i,
|
|
"size":{
|
|
k:self.modules[i][k] for k in self.print_sections
|
|
}
|
|
})
|
|
|
|
self.mem_report.append({
|
|
'summary': self.mem_summary
|
|
})
|
|
|
|
def parse(self, mapfile, toolchain):
|
|
""" Parse and decode map file depending on the toolchain
|
|
|
|
Positional arguments:
|
|
mapfile - the file name of the memory map file
|
|
toolchain - the toolchain used to create the file
|
|
"""
|
|
|
|
result = True
|
|
try:
|
|
with open(mapfile, 'r') as file_input:
|
|
if toolchain == "ARM" or toolchain == "ARM_STD" or\
|
|
toolchain == "ARM_MICRO":
|
|
self.search_objects(os.path.abspath(mapfile))
|
|
self.parse_map_file_armcc(file_input)
|
|
elif toolchain == "GCC_ARM" or toolchain == "GCC_CR":
|
|
self.parse_map_file_gcc(file_input)
|
|
elif toolchain == "IAR":
|
|
self.search_objects(os.path.abspath(mapfile))
|
|
self.parse_map_file_iar(file_input)
|
|
else:
|
|
result = False
|
|
|
|
self.compute_report()
|
|
|
|
except IOError as error:
|
|
print "I/O error({0}): {1}".format(error.errno, error.strerror)
|
|
result = False
|
|
return result
|
|
|
|
def main():
|
|
"""Entry Point"""
|
|
|
|
version = '0.3.12'
|
|
|
|
# Parser handling
|
|
parser = argparse.ArgumentParser(
|
|
description="Memory Map File Analyser for ARM mbed\nversion %s" %
|
|
version)
|
|
|
|
parser.add_argument(
|
|
'file', type=argparse_filestring_type, help='memory map file')
|
|
|
|
parser.add_argument(
|
|
'-t', '--toolchain', dest='toolchain',
|
|
help='select a toolchain used to build the memory map file (%s)' %
|
|
", ".join(MemapParser.toolchains),
|
|
required=True,
|
|
type=argparse_uppercase_type(MemapParser.toolchains, "toolchain"))
|
|
|
|
parser.add_argument(
|
|
'-o', '--output', help='output file name', required=False)
|
|
|
|
parser.add_argument(
|
|
'-e', '--export', dest='export', required=False, default='table',
|
|
type=argparse_lowercase_hyphen_type(MemapParser.export_formats,
|
|
'export format'),
|
|
help="export format (examples: %s: default)" %
|
|
", ".join(MemapParser.export_formats))
|
|
|
|
parser.add_argument('-v', '--version', action='version', version=version)
|
|
|
|
parser.add_argument('-d', '--detailed', action='store_true', help='Displays the elements in "Misc" in a detailed fashion', required=False)
|
|
|
|
# Parse/run command
|
|
if len(sys.argv) <= 1:
|
|
parser.print_help()
|
|
sys.exit(1)
|
|
|
|
|
|
args = parser.parse_args()
|
|
|
|
# Create memap object
|
|
memap = MemapParser(detailed_misc=args.detailed)
|
|
|
|
# Parse and decode a map file
|
|
if args.file and args.toolchain:
|
|
if memap.parse(args.file, args.toolchain) is False:
|
|
sys.exit(0)
|
|
|
|
returned_string = None
|
|
# Write output in file
|
|
if args.output != None:
|
|
returned_string = memap.generate_output(args.export, args.output)
|
|
else: # Write output in screen
|
|
returned_string = memap.generate_output(args.export)
|
|
|
|
if args.export == 'table' and returned_string:
|
|
print returned_string
|
|
|
|
sys.exit(0)
|
|
|
|
if __name__ == "__main__":
|
|
main()
|