mirror of https://github.com/ARMmbed/mbed-os.git
178 lines
5.3 KiB
C
178 lines
5.3 KiB
C
/**
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******************************************************************************
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* @file stm32h7xx_ll_delayblock.c
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* @author MCD Application Team
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* @brief DelayBlock Low Layer HAL module driver.
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*
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* This file provides firmware functions to manage the following
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* functionalities of the Delay Block peripheral:
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* + input clock frequency range 25MHz to 208MHz
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* + up to 12 oversampling phases
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*
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@verbatim
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==============================================================================
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##### DelayBlock peripheral features #####
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==============================================================================
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[..] The Delay block is used to generate an Output clock which is de-phased from the Input
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clock. The phase of the Output clock is programmed by FW. The Output clock is then used
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to clock the receive data in i.e. a SDMMC or QSPI interface.
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The delay is Voltage and Temperature dependent, which may require FW to do re-tuning
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and recenter the Output clock phase to the receive data.
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[..] The Delay Block features include the following:
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(+) Input clock frequency range 25MHz to 208MHz.
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(+) Up to 12 oversampling phases.
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##### How to use this driver #####
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==============================================================================
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[..]
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This driver is a considered as a driver of service for external devices drivers
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that interfaces with the DELAY peripheral.
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The DelayBlock_Enable() function, enables the DelayBlock instance, configure the delay line length
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and configure the Output clock phase.
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The DelayBlock_Disable() function, disables the DelayBlock instance by setting DEN flag to 0.
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx_hal.h"
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/** @addtogroup STM32H7xx_HAL_Driver
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* @{
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*/
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/** @defgroup DELAYBLOCK_LL DELAYBLOCK_LL
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* @brief Low layer module for Delay Block
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* @{
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*/
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#if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_QSPI_MODULE_ENABLED)
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup DelayBlock_LL_Exported_Functions Delay Block Low Layer Exported Functions
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* @{
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*/
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/** @defgroup HAL_DELAY_LL_Group1 Initialization de-initialization functions
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* @brief Initialization and Configuration functions
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*
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@verbatim
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===============================================================================
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##### Initialization and de-initialization functions #####
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===============================================================================
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[..] This section provides functions allowing to:
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@endverbatim
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* @{
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*/
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/**
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* @brief Enable the Delay Block instance.
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* @param DLYBx: Pointer to DLYB instance.
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* @retval HAL status
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*/
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HAL_StatusTypeDef DelayBlock_Enable(DLYB_TypeDef *DLYBx)
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{
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uint32_t i=0,N, lng, tuningOn = 1;
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uint32_t length_valid;
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uint32_t length_value;
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assert_param(IS_DLYB_ALL_INSTANCE(DLYBx));
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DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN;
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while((tuningOn != 0U) && (i < DLYB_MAX_UNIT))
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{
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DLYBx->CFGR = 12U | (i << 8U);
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HAL_Delay(1);
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length_valid = DLYBx->CFGR & DLYB_CFGR_LNGF;
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length_value = DLYBx->CFGR & DLYB_CFGR_LNG;
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if((length_valid != 0U)
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&& (length_value != 0U)
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&& (length_value != (DLYB_CFGR_LNG_11 | DLYB_CFGR_LNG_10)))
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{
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tuningOn = 0;
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}
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i++;
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}
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if(DLYB_MAX_UNIT != i)
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{
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lng = (DLYBx->CFGR & DLYB_CFGR_LNG) >> 16;
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N = 10;
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while((N>0U) && ((lng >> N) == 0U))
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{
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N--;
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}
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if(0U != N)
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{
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MODIFY_REG(DLYBx->CFGR, DLYB_CFGR_SEL, ((N/2U)+1U));
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/* Disable Selection phase */
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DLYBx->CR = DLYB_CR_DEN;
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return HAL_OK;
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}
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}
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/* Disable DLYB */
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(void) DelayBlock_Disable(DLYBx);
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return HAL_ERROR;
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}
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/**
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* @brief Disable the Delay Block instance.
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* @param DLYBx: Pointer to DLYB instance.
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* @retval HAL status
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*/
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HAL_StatusTypeDef DelayBlock_Disable(DLYB_TypeDef *DLYBx)
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{
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/* Disable DLYB */
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DLYBx->CR = 0;
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return HAL_OK;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* (HAL_SD_MODULE_ENABLED) & (HAL_QSPI_MODULE_ENABLED)*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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