mirror of https://github.com/ARMmbed/mbed-os.git
213 lines
13 KiB
C
213 lines
13 KiB
C
/**
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* @file
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* @brief Registers, Bit Masks and Bit Positions for the MAA Peripheral Module.
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*/
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/* ****************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*
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*
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* $Date: 2016-10-10 19:20:13 -0500 (Mon, 10 Oct 2016) $
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* $Revision: 24665 $
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*
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*************************************************************************** */
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/* Define to prevent redundant inclusion */
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#ifndef _MXC_MAA_REGS_H_
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#define _MXC_MAA_REGS_H_
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/* **** Includes **** */
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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///@cond
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/*
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If types are not defined elsewhere (CMSIS) define them here
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*/
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#ifndef __IO
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#define __IO volatile
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#endif
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#ifndef __I
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#define __I volatile const
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#endif
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __RO
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#define __RO volatile const
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#endif
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///@endcond
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/**
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* @ingroup icc_registers
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* @defgroup maa_registers Registers
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* @brief Registers, Bit Masks and Bit Positions for the MAA Peripheral Module.
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x * @{
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*/
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/**
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* Structure type to access the MAA Peripheral Module Registers.
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*/
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typedef struct {
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__IO uint32_t ctrl; /**< <tt>\b 0x0000</tt> MAA_CTRL - MAA Control, Configuration and Status */
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__IO uint32_t maws; /**< <tt>\b 0x0004</tt> MAA_MAWS - MAA Word (Operand) Size, Big/Little Endian Mode Select */
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} mxc_maa_regs_t;
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/**@} end of maa_registers group */
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/**
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* @ingroup maa
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* @defgroup maa_mem_segments Memory Segment Registers
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* @brief Registers, Bit Masks and Bit Positions for the MAA Memory Mapped Segments
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* @{
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*/
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/**
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* Structure type to access the MAA Peripheral Module Memory Mapped Registers.
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*/
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typedef struct {
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__IO uint32_t seg0[32]; /* 0x0000-0x007C [128 bytes] MAA Memory Segment 0 */
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__IO uint32_t seg1[32]; /* 0x0080-0x00FC [128 bytes] MAA Memory Segment 1 */
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__IO uint32_t seg2[32]; /* 0x0100-0x017C [128 bytes] MAA Memory Segment 2 */
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__IO uint32_t seg3[32]; /* 0x0180-0x01FC [128 bytes] MAA Memory Segment 3 */
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__IO uint32_t seg4[32]; /* 0x0200-0x027C [128 bytes] MAA Memory Segment 4 */
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__IO uint32_t seg5[32]; /* 0x0280-0x02FC [128 bytes] MAA Memory Segment 5 */
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} mxc_maa_mem_regs_t;
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/**@} end of maa_mem_segments group */
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/**
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* @ingroup maa_registers
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* @defgroup MAA_Register_Offsets Register Offsets
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* @brief MAA Register Offsets from the MAA Peripheral Module Base Address.
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* @{
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*/
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#define MXC_R_MAA_OFFS_CTRL ((uint32_t)0x00000000UL) /**< Offset from MAA Base Peripheral Address: <tt>\b 0x0000</tt> */
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#define MXC_R_MAA_OFFS_MAWS ((uint32_t)0x00000004UL) /**< Offset from MAA Base Peripheral Address: <tt>\b 0x0004</tt> */
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/**@} end of group MAA_Register_Offsets */
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/**
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* @ingroup maa_mem_segments
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* @defgroup MAA_Register_Mem_Offsets Register Offsets
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* @brief MAA Memory Mapped Register Offsets from the MAA Peripheral Module Base Memory Mapped Address.
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* @{
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*/
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#define MXC_R_MAA_MEM_OFFS_SEG0 ((uint32_t)0x00000000UL) /**< Offset from MAA Base Peripheral Memory Address: <tt>\b 0x0000</tt> */
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#define MXC_R_MAA_MEM_OFFS_SEG1 ((uint32_t)0x00000080UL) /**< Offset from MAA Base Peripheral Memory Address: <tt>\b 0x0080</tt> */
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#define MXC_R_MAA_MEM_OFFS_SEG2 ((uint32_t)0x00000100UL) /**< Offset from MAA Base Peripheral Memory Address: <tt>\b 0x0100</tt> */
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#define MXC_R_MAA_MEM_OFFS_SEG3 ((uint32_t)0x00000180UL) /**< Offset from MAA Base Peripheral Memory Address: <tt>\b 0x0180</tt> */
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#define MXC_R_MAA_MEM_OFFS_SEG4 ((uint32_t)0x00000200UL) /**< Offset from MAA Base Peripheral Memory Address: <tt>\b 0x0200</tt> */
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#define MXC_R_MAA_MEM_OFFS_SEG5 ((uint32_t)0x00000280UL) /**< Offset from MAA Base Peripheral Memory Address: <tt>\b 0x0280</tt> */
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/**@} end of group MAA_Register_Mem_Offsets */
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/*
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Field positions and masks for module MAA.
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*/
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/**
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* @ingroup maa_registers
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* @defgroup maa_ctrl MAA_CTRL
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* @brief Field Positions and Masks
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*/
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#define MXC_F_MAA_CTRL_START_POS 0 /**< START Position */
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#define MXC_F_MAA_CTRL_START ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_START_POS)) /**< START Mask */
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#define MXC_F_MAA_CTRL_OPSEL_POS 1 /**< OPSEL Position */
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#define MXC_F_MAA_CTRL_OPSEL ((uint32_t)(0x00000007UL << MXC_F_MAA_CTRL_OPSEL_POS)) /**< OPSEL Mask */
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#define MXC_F_MAA_CTRL_OCALC_POS 4 /**< OCALC Position */
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#define MXC_F_MAA_CTRL_OCALC ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_OCALC_POS)) /**< OCALC Mask */
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#define MXC_F_MAA_CTRL_IF_DONE_POS 5 /**< IF_DONE Position */
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#define MXC_F_MAA_CTRL_IF_DONE ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_IF_DONE_POS)) /**< IF_DONE Mask */
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#define MXC_F_MAA_CTRL_INTEN_POS 6 /**< INTEN Position */
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#define MXC_F_MAA_CTRL_INTEN ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_INTEN_POS)) /**< INTEN Mask */
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#define MXC_F_MAA_CTRL_IF_ERROR_POS 7 /**< IF_ERROR Position */
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#define MXC_F_MAA_CTRL_IF_ERROR ((uint32_t)(0x00000001UL << MXC_F_MAA_CTRL_IF_ERROR_POS)) /**< IF_ERROR Mask */
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#define MXC_F_MAA_CTRL_OFS_A_POS 8 /**< OFS_A Position */
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#define MXC_F_MAA_CTRL_OFS_A ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_A_POS)) /**< OFS_A Mask */
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#define MXC_F_MAA_CTRL_OFS_B_POS 10 /**< OFS_B Position */
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#define MXC_F_MAA_CTRL_OFS_B ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_B_POS)) /**< OFS_B Mask */
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#define MXC_F_MAA_CTRL_OFS_EXP_POS 12 /**< OFS_EXP Position */
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#define MXC_F_MAA_CTRL_OFS_EXP ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_EXP_POS)) /**< OFS_EXP Mask */
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#define MXC_F_MAA_CTRL_OFS_MOD_POS 14 /**< OFS_MOD Position */
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#define MXC_F_MAA_CTRL_OFS_MOD ((uint32_t)(0x00000003UL << MXC_F_MAA_CTRL_OFS_MOD_POS)) /**< OFS_MOD Mask */
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#define MXC_F_MAA_CTRL_SEG_A_POS 16 /**< SEG_A Position */
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#define MXC_F_MAA_CTRL_SEG_A ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_A_POS)) /**< SEG_A Mask */
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#define MXC_F_MAA_CTRL_SEG_B_POS 20 /**< SEG_B Position */
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#define MXC_F_MAA_CTRL_SEG_B ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_B_POS)) /**< SEG_B Mask */
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#define MXC_F_MAA_CTRL_SEG_RES_POS 24 /**< SEG_RES Position */
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#define MXC_F_MAA_CTRL_SEG_RES ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_RES_POS)) /**< SEG_RES Mask */
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#define MXC_F_MAA_CTRL_SEG_TMP_POS 28 /**< SEG_TMP Position */
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#define MXC_F_MAA_CTRL_SEG_TMP ((uint32_t)(0x0000000FUL << MXC_F_MAA_CTRL_SEG_TMP_POS)) /**< SEG_TMP Mask */
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/**@} end of maa_ctrl group */
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/**
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* @ingroup maa_registers
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* @defgroup maa_maws MAA_MAWS
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* @brief Field Positions and Masks
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*/
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#define MXC_F_MAA_MAWS_MODLEN_POS 0 /**< MODLEN Position */
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#define MXC_F_MAA_MAWS_MODLEN ((uint32_t)(0x000007FFUL << MXC_F_MAA_MAWS_MODLEN_POS)) /**< MODLEN Mask */
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#define MXC_F_MAA_MAWS_BYTESWAP_POS 15 /**< BYTESWAP Position */
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#define MXC_F_MAA_MAWS_BYTESWAP ((uint32_t)(0x00000001UL << MXC_F_MAA_MAWS_BYTESWAP_POS)) /**< BYTESWAP Mask */
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/**@} end of group MAA_MAWS */
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/*
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Field values and shifted values for module MAA.
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*/
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/**
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* @ingroup maa_ctrl
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* @defgroup maa_oppsel MAA_OPSEL
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* @brief MAA Operation Select - Field Values and Shifted Field Values.
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*/
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#define MXC_V_MAA_OPSEL_EXP ((uint32_t)(0x00000000UL)) /**< Field Value: OPSEL_EXP */
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#define MXC_V_MAA_OPSEL_SQR ((uint32_t)(0x00000001UL)) /**< Field Value: OPSEL_SQR */
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#define MXC_V_MAA_OPSEL_MUL ((uint32_t)(0x00000002UL)) /**< Field Value: OPSEL_MUL */
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#define MXC_V_MAA_OPSEL_SQRMUL ((uint32_t)(0x00000003UL)) /**< Field Value: OPSEL_SQRMUL */
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#define MXC_V_MAA_OPSEL_ADD ((uint32_t)(0x00000004UL)) /**< Field Value: OPSEL_ADD */
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#define MXC_V_MAA_OPSEL_SUB ((uint32_t)(0x00000005UL)) /**< Field Value: OPSEL_SUB */
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#define MXC_S_MAA_OPSEL_EXP ((uint32_t)(MXC_V_MAA_OPSEL_EXP << MXC_F_MAA_CTRL_OPSEL_POS)) /**< Shifted Field Value: OPSEL_EXP */
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#define MXC_S_MAA_OPSEL_SQR ((uint32_t)(MXC_V_MAA_OPSEL_SQR << MXC_F_MAA_CTRL_OPSEL_POS)) /**< Shifted Field Value: OPSEL_SQR */
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#define MXC_S_MAA_OPSEL_MUL ((uint32_t)(MXC_V_MAA_OPSEL_MUL << MXC_F_MAA_CTRL_OPSEL_POS)) /**< Shifted Field Value: OPSEL_MUL */
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#define MXC_S_MAA_OPSEL_SQRMUL ((uint32_t)(MXC_V_MAA_OPSEL_SQRMUL << MXC_F_MAA_CTRL_OPSEL_POS)) /**< Shifted Field Value: OPSEL_SQRMUL */
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#define MXC_S_MAA_OPSEL_ADD ((uint32_t)(MXC_V_MAA_OPSEL_ADD << MXC_F_MAA_CTRL_OPSEL_POS)) /**< Shifted Field Value: OPSEL_ADD */
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#define MXC_S_MAA_OPSEL_SUB ((uint32_t)(MXC_V_MAA_OPSEL_SUB << MXC_F_MAA_CTRL_OPSEL_POS)) /**< Shifted Field Value: OPSEL_SUB */
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/**@} end of group maa_opsel_values */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _MXC_MAA_REGS_H_ */
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