mirror of https://github.com/ARMmbed/mbed-os.git
180 lines
4.6 KiB
C
180 lines
4.6 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2018-2019 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_OBJECTS_H
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#define MBED_OBJECTS_H
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#include "stdbool.h"
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#include "cmsis.h"
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#include "PortNames.h"
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#include "PeripheralNames.h"
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#include "PinNames.h"
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#include "serial_object.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct {
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unsigned long baseAddr;
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PinName pin;
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PinMode mode;
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PinDirection dir;
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unsigned long pin_mask;
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} gpio_t;
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struct gpio_irq_s {
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unsigned long baseAddr;
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uint32_t port;
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PinName pin;
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uint32_t ch;
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unsigned long pin_mask;
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unsigned long irq_offset;
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};
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struct port_s {
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unsigned long baseAddr;
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unsigned long peripheralId;
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PortName port;
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uint32_t mask;
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};
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struct pwmout_s {
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uint32_t period_us;
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float duty_percent;
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void *handle;
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PWMName pwm;
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};
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struct serial_s {
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CC3220SF_UART_TypeDef *uart;
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int index;
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uint32_t baudRate; /*!< Baud rate for UART */
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unsigned int baseAddr; /*! UART Peripheral's base address */
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unsigned int intNum; /*! UART Peripheral's interrupt vector */
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unsigned int powerMgrId; /* Determined from base address */
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unsigned long peripheralId; /* Value that can be passed to PRCM functions */
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UART_LEN dataLength; /* Data length for UART */
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UART_STOP stopBits; /* Stop bits for UART */
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UART_PAR parityType; /* Parity bit type for UART */
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};
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struct analogin_s {
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PinName pin;
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unsigned long adc_ch;
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};
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struct trng_s {
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uint32_t placeholder;
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};
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struct flash_s {
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uint32_t placeholder;
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};
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typedef struct spi_clock_config_s {
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//! \param ulSPIClk is the rate of clock supplied to the SPI module.
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uint32_t ulSPIClk;
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//! \param ulBitRate is the desired bit rate.(master mode)
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uint32_t ulBitRate;
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//!
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//! The SPI module can operate in either master or slave mode. The parameter
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//! \e ulMode can be one of the following
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//! -\b SPI_MODE_MASTER
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//! -\b SPI_MODE_SLAVE
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uint32_t ulMode;
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//!
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//! The SPI module supports 4 sub modes based on SPI clock polarity and phase.
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//!
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//! <pre>
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//! Polarity Phase Sub-Mode
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//! 0 0 0
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//! 0 1 1
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//! 1 0 2
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//! 1 1 3
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//! </pre>
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//! Required sub mode can be select by setting \e ulSubMode parameter to one
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//! of the following
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//! - \b SPI_SUB_MODE_0
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//! - \b SPI_SUB_MODE_1
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//! - \b SPI_SUB_MODE_2
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//! - \b SPI_SUB_MODE_3
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uint32_t ulSubMode;
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//! The parameter \e ulConfig is logical OR of five values: the word length,
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//! active level for chip select, software or hardware controlled chip select,
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//! 3 or 4 pin mode and turbo mode.
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//! mode.
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//!
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//! SPI support 8, 16 and 32 bit word lengths defined by:-
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//! - \b SPI_WL_8
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//! - \b SPI_WL_16
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//! - \b SPI_WL_32
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//!
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//! Active state of Chip Select can be defined by:-
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//! - \b SPI_CS_ACTIVELOW
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//! - \b SPI_CS_ACTIVEHIGH
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//!
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//! SPI chip select can be configured to be controlled either by hardware or
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//! software:-
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//! - \b SPI_SW_CS
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//! - \b SPI_HW_CS
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//!
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//! The module can work in 3 or 4 pin mode defined by:-
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//! - \b SPI_3PIN_MODE
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//! - \b SPI_4PIN_MODE
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//!
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//! Turbo mode can be set on or turned off using:-
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//! - \b SPI_TURBO_MODE_ON
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//! - \b SPI_TURBO_MODE_OFF
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uint32_t ulConfig;
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} spi_clock_config_t;
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struct spi_s {
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/*! SPI module number */
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uint32_t instance;
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/*! SPICC32XXDMA Peripheral's base address */
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uint32_t baseAddr;
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/*! SPI Word lengh */
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uint32_t word_length;
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/*! SPI clock configuration */
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spi_clock_config_t clock_config;
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/*! Is clock update needed */
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bool clock_update;
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/*! Is CS controlled by GPIO */
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bool cs_control_gpio;
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#if DEVICE_SPI_ASYNCH
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uint32_t handler;
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uint32_t mask;
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uint32_t event;
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#endif
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};
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#ifdef __cplusplus
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}
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#endif
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#endif
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