mirror of https://github.com/ARMmbed/mbed-os.git
145 lines
4.8 KiB
Python
145 lines
4.8 KiB
Python
"""
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mbed CMSIS-DAP debugger
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Copyright (c) 2006-2013 ARM Limited
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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"""
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from pyOCD.target.target import TARGET_RUNNING
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import logging
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from struct import unpack
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from time import time
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"""
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import os,sys
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parentdir = os.path.dirname(os.path.dirname(os.path.abspath(__file__)))
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sys.path.insert(0,parentdir)
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"""
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class Flash():
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"""
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This class is responsible to flash a new binary in a target
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"""
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def __init__(self, target, flash_algo, memoryMapXML):
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self.target = target
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self.flash_algo = flash_algo
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self.end_flash_algo = flash_algo['load_address'] + len(flash_algo)*4
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self.begin_stack = flash_algo['begin_stack']
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self.begin_data = flash_algo['begin_data']
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self.static_base = flash_algo['static_base']
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self.page_size = flash_algo['page_size']
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self.memoryMapXML = memoryMapXML
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def init(self):
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"""
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Download the flash algorithm in RAM
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"""
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self.target.halt()
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self.target.setTargetState("PROGRAM")
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# download flash algo in RAM
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self.target.writeBlockMemoryAligned32(self.flash_algo['load_address'], self.flash_algo['instructions'])
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# update core register to execute the init subroutine
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self.updateCoreRegister(0, 0, 0, 0, self.flash_algo['pc_init'])
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# resume and wait until the breakpoint is hit
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self.target.resume()
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while(self.target.getState() == TARGET_RUNNING):
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pass
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return
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def eraseAll(self):
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"""
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Erase all the flash
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"""
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# update core register to execute the eraseAll subroutine
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self.updateCoreRegister(0, 0, 0, 0, self.flash_algo['pc_eraseAll'])
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# resume and wait until the breakpoint is hit
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self.target.resume()
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while(self.target.getState() == TARGET_RUNNING):
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pass
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return
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def programPage(self, flashPtr, bytes):
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"""
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Flash one page
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"""
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# first transfer in RAM
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self.target.writeBlockMemoryUnaligned8(self.begin_data, bytes)
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# update core register to execute the program_page subroutine
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self.updateCoreRegister(flashPtr, self.page_size, self.begin_data, 0, self.flash_algo['pc_program_page'])
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# resume and wait until the breakpoint is hit
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self.target.resume()
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while(self.target.getState() == TARGET_RUNNING):
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pass
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return
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def flashBinary(self, path_file):
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"""
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Flash a binary
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"""
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f = open(path_file, "rb")
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start = time()
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self.init()
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logging.debug("flash init OK: pc: 0x%X", self.target.readCoreRegister('pc'))
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self.eraseAll()
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logging.debug("eraseAll OK: pc: 0x%X", self.target.readCoreRegister('pc'))
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"""
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bin = open(os.path.join(parentdir, 'res', 'good_bin.txt'), "w+")
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"""
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flashPtr = 0
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nb_bytes = 0
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try:
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bytes_read = f.read(1024)
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while bytes_read:
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bytes_read = unpack(str(len(bytes_read)) + 'B', bytes_read)
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nb_bytes += len(bytes_read)
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# page download
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self.programPage(flashPtr, bytes_read)
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"""
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i = 0
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while (i < len(bytes_read)):
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bin.write(str(list(bytes_read[i:i+16])) + "\n")
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i += 16
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"""
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flashPtr += 1024
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bytes_read = f.read(1024)
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finally:
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f.close()
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"""
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bin.close()
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"""
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end = time()
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logging.info("%f kbytes flashed in %f seconds ===> %f kbytes/s" %(nb_bytes/1000, end-start, nb_bytes/(1000*(end - start))))
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def updateCoreRegister(self, r0, r1, r2, r3, pc):
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self.target.writeCoreRegister('pc', pc)
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self.target.writeCoreRegister('r0', r0)
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self.target.writeCoreRegister('r1', r1)
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self.target.writeCoreRegister('r2', r2)
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self.target.writeCoreRegister('r3', r3)
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self.target.writeCoreRegister('r9', self.static_base)
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self.target.writeCoreRegister('sp', self.begin_stack)
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self.target.writeCoreRegister('lr', self.flash_algo['load_address'] + 1)
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return
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