mirror of https://github.com/ARMmbed/mbed-os.git
263 lines
9.0 KiB
C
263 lines
9.0 KiB
C
/*
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* Copyright (c) 2020 ARM Limited. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef AT86RF215REG_H_
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#define AT86RF215REG_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*Register addresses*/
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#define RF09_IRQS 0x00
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#define RF24_IRQS 0x01
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#define BBC0_IRQS 0x02
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#define BBC1_IRQS 0x03
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#define RF_CFG 0x06
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#define RF_IQIFC1 0x0B
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#define RF_PN 0x0D
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#define RF_VN 0x0E
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#define RF_IRQM 0x00
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#define RF_STATE 0x02
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#define RF_CMD 0x03
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#define RF_CS 0x04
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#define RF_CCF0L 0x05
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#define RF_CCF0H 0x06
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#define RF_CNL 0x07
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#define RF_CNM 0x08
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#define RF_RXBWC 0x09
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#define RF_RXDFE 0x0A
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#define RF_AGCC 0x0B
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#define RF_AGCS 0x0C
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#define RF_RSSI 0x0D
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#define RF_EDC 0x0E
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#define RF_EDV 0x10
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#define RF_TXCUTC 0x12
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#define RF_TXDFE 0x13
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#define BBC_IRQM 0x00
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#define BBC_PC 0x01
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#define BBC_RXFLL 0x04
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#define BBC_RXFLH 0x05
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#define BBC_TXFLL 0x06
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#define BBC_TXFLH 0x07
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#define BBC_FBLL 0x08
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#define BBC_FBLH 0x09
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#define BBC_OQPSKC0 0x10
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#define BBC_OQPSKC1 0x11
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#define BBC_OQPSKC2 0x12
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#define BBC_OQPSKC3 0x13
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#define BBC_OQPSKPHRTX 0x14
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#define BBC_OQPSKPHRRX 0x15
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#define BBC_AFC0 0x20
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#define BBC_AFFTM 0x22
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#define BBC_MACEA0 0x25
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#define BBC_MACPID0F0 0x2D
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#define BBC_MACSHA0F0 0x2F
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#define BBC_AMCS 0x40
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#define BBC_AMEDT 0x41
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#define BBC_AMAACKTL 0x43
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#define BBC_AMAACKTH 0x44
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#define BBC_FSKC0 0x60
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#define BBC_FSKC1 0x61
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#define BBC_FSKC2 0x62
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#define BBC_FSKC3 0x63
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#define BBC_FSKPLL 0x65
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#define BBC_FSKPHRTX 0x6A
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#define BBC_FSKPHRRX 0x6B
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#define BBC0_FBRXS 0x2000
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#define BBC0_FBTXS 0x2800
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#define BBC1_FBRXS 0x3000
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#define BBC1_FBTXS 0x3800
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// RF_AGCC
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#define AGCI (1 << 6)
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#define AVGS 0x30
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#define AVGS_8_SAMPLES (0 << 4)
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// RF_AGCS
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#define TGT 0xE0
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#define TGT_1 (1 << 5)
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// RF_RXBWC
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#define BW 0x0F
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#define RF_BW2000KHZ_IF2000KHZ (11 << 0)
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#define RF_BW1600KHZ_IF2000KHZ (10 << 0)
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#define RF_BW1250KHZ_IF2000KHZ (9 << 0)
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#define RF_BW1000KHZ_IF1000KHZ (8 << 0)
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#define RF_BW800KHZ_IF1000KHZ (7 << 0)
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#define RF_BW630KHZ_IF1000KHZ (6 << 0)
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#define RF_BW500KHZ_IF500KHZ (5 << 0)
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#define RF_BW400KHZ_IF500KHZ (4 << 0)
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#define RF_BW320KHZ_IF500KHZ (3 << 0)
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#define RF_BW250KHZ_IF250KHZ (2 << 0)
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#define RF_BW200KHZ_IF250KHZ (1 << 0)
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#define RF_BW160KHZ_IF250KHZ (0 << 0)
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#define IFS (1 << 4)
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// RF_TXCUTC
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#define PARAMP 0xC0
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#define RF_PARAMP32U (3 << 6)
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#define RF_PARAMP16U (2 << 6)
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#define RF_PARAMP8U (1 << 6)
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#define RF_PARAMP4U (0 << 6)
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#define LPFCUT 0x0F
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#define RF_FLC80KHZ (0 << 0)
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#define RF_FLC100KHZ (1 << 0)
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#define RF_FLC125KHZ (2 << 0)
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#define RF_FLC160KHZ (3 << 0)
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#define RF_FLC200KHZ (4 << 0)
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#define RF_FLC250KHZ (5 << 0)
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#define RF_FLC315KHZ (6 << 0)
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#define RF_FLC400KHZ (7 << 0)
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#define RF_FLC500KHZ (8 << 0)
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#define RF_FLC625KHZ (9 << 0)
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#define RF_FLC800KHZ (10 << 0)
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#define RF_FLC1000KHZ (11 << 0)
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// RF_TXDFE, RF_RXDFE
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#define RCUT 0xE0
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#define RCUT_4 (4 << 5)
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#define RCUT_2 (2 << 5)
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#define RCUT_1 (1 << 5)
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#define RCUT_0 (0 << 5)
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#define SR 0x0F
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#define SR_10 (10 << 0)
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#define SR_8 (8 << 0)
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#define SR_6 (6 << 0)
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#define SR_5 (5 << 0)
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#define SR_4 (4 << 0)
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#define SR_3 (3 << 0)
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#define SR_2 (2 << 0)
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#define SR_1 (1 << 0)
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// BBC_FSKC0
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#define BT 0xC0
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#define BT_20 (3 << 6)
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#define BT_10 (1 << 6)
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#define MIDXS 0x30
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#define MIDXS_0 (0 << 4)
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#define MIDX 0x0E
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#define MIDX_10 (3 << 1)
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#define MIDX_075 (2 << 1)
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#define MIDX_05 (1 << 1)
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#define MIDX_0375 (0 << 1)
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// BBC_FSKC1
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#define SRATE 0x0F
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#define SRATE_400KHZ (5 << 0)
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#define SRATE_300KHZ (4 << 0)
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#define SRATE_200KHZ (3 << 0)
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#define SRATE_150KHZ (2 << 0)
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#define SRATE_100KHZ (1 << 0)
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#define SRATE_50KHZ (0 << 0)
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// BBC_FSKC2
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#define RXO 0x60
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#define RXO_DIS (0 << 5)
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#define FECIE (1 << 0)
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// BBC_FSKC3
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#define SFDT 0xF0
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#define PDT 0x0F
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#define PDT_6 (6 << 0)
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// BBC_AFFTM
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#define TYPE_2 (1 << 2)
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// BBC_AFC0
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#define PM (1 << 4)
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#define AFEN3 (1 << 3)
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#define AFEN2 (1 << 2)
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#define AFEN1 (1 << 1)
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#define AFEN0 (1 << 0)
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// BBC_OQPSKPHRTX
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#define LEG (1 << 0)
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// BBC_OQPSKC0
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#define FCHIP 0x03
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#define BB_FCHIP100 (0 << 0)
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#define BB_FCHIP200 (1 << 0)
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#define BB_FCHIP1000 (2 << 0)
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#define BB_FCHIP2000 (3 << 0)
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// BBC_OQPSKC2
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#define FCSTLEG 0x04
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#define RXM 0x03
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#define FCS_16 (1 << 2)
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#define RXM_2 (2 << 0)
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// BBC_IRQS, BBC_IRQM
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#define FBLI (1 << 7)
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#define AGCR (1 << 6)
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#define AGCH (1 << 5)
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#define TXFE (1 << 4)
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#define RXEM (1 << 3)
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#define RXAM (1 << 2)
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#define RXFE (1 << 1)
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#define RXFS (1 << 0)
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//BBC_PC
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#define BBEN (1 << 2)
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#define PT 0x03
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#define BB_PHYOFF (0 << 0)
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#define BB_MRFSK (1 << 0)
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#define BB_MROFDM (2 << 0)
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#define BB_MROQPSK (3 << 0)
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#define FCSOK (1 << 5)
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#define TXAFCS (1 << 4)
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#define FCST (1 << 3)
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#define FCSFE (1 << 6)
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//BBC_AMCS
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#define AACKFT (1 << 7)
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#define AACK (1 << 3)
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#define CCAED (1 << 2)
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// RF_IQIFC1
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#define CHPM 0x70
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#define RF_MODE_BBRF (0 << 4)
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#define RF_MODE_RF (1 << 4)
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#define RF_MODE_BBRF09 (4 << 4)
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#define RF_MODE_BBRF24 (5 << 4)
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/*RF_CFG bits*/
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#define IRQMM 0x08
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#define IRQP 0x04
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/*RFn_IRQM bits*/
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#define TRXRDY (1 << 1)
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#define EDC (1 << 2)
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/*RFn_EDC bits*/
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#define EDM 0x03
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#define RF_EDAUTO (0 << 0)
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#define RF_EDSINGLE (1 << 0)
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#define RF_EDCONT (2 << 0)
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#define RF_EDOFF (3 << 0)
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/*Masks*/
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#define CNH 0x01
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#define EDM 0x03
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#define CHPM 0x70
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#ifdef __cplusplus
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}
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#endif
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#endif /* AT86RF215REG_H_ */
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