mirror of https://github.com/ARMmbed/mbed-os.git
625 lines
19 KiB
C++
625 lines
19 KiB
C++
/*
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* Copyright (c) 2017-2020 ARM Limited
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* Copyright (c) 2017-2020 STMicroelectronics
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <stdio.h>
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// drivers
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#include "drivers/DigitalOut.h"
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#include "drivers/SPI.h"
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#include "drivers/InterruptIn.h"
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// platform
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#include "platform/mbed_wait_api.h"
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// FEATURE_BLE/targets/TARGET_CORDIO
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#include "CordioBLE.h"
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#include "CordioHCIDriver.h"
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#include "CordioHCITransportDriver.h"
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#include "hci_api.h"
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#include "hci_cmd.h"
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#include "hci_core.h"
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#include "dm_api.h"
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#include "bstream.h"
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#include "hci_mbed_os_adaptation.h"
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// rtos
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#include "Thread.h"
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#include "Semaphore.h"
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#include "Mutex.h"
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#define HCI_RESET_RAND_CNT 4
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#define VENDOR_SPECIFIC_EVENT 0xFF
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#define EVT_BLUENRG_MS_INITIALIZED 0x0001
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#define ACI_READ_CONFIG_DATA_OPCODE 0xFC0D
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#define ACI_WRITE_CONFIG_DATA_OPCODE 0xFC0C
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#define ACI_GATT_INIT_OPCODE 0xFD01
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#define ACI_GAP_INIT_OPCODE 0xFC8A
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#define PUBLIC_ADDRESS_OFFSET 0x00
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#define RANDOM_STATIC_ADDRESS_OFFSET 0x80
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#define LL_WITHOUT_HOST_OFFSET 0x2C
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#define ROLE_OFFSET 0x2D
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#define SPI_STACK_SIZE 1024
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namespace ble {
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namespace vendor {
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namespace bluenrg_ms {
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/**
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* BlueNRG_MS HCI driver implementation.
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* @see cordio::CordioHCIDriver
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*/
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class HCIDriver : public cordio::CordioHCIDriver {
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public:
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/**
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* Construction of the BlueNRG_MS HCIDriver.
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* @param transport: Transport of the HCI commands.
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* @param rst: Name of the reset pin
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*/
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HCIDriver(cordio::CordioHCITransportDriver &transport_driver, PinName rst) :
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cordio::CordioHCIDriver(transport_driver), rst(rst) { }
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/**
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* @see CordioHCIDriver::do_initialize
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*/
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virtual void do_initialize()
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{
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bluenrg_ms_reset();
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}
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/**
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* @see CordioHCIDriver::get_buffer_pool_description
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*/
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ble::vendor::cordio::buf_pool_desc_t get_buffer_pool_description()
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{
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// Use default buffer pool
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return ble::vendor::cordio::CordioHCIDriver::get_default_buffer_pool_description();
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}
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/**
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* @see CordioHCIDriver::start_reset_sequence
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*/
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virtual void start_reset_sequence()
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{
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reset_received = false;
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bluenrg_ms_initialized = false;
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enable_link_layer_mode_ongoing = false;
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/* send an HCI Reset command to start the sequence */
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HciResetCmd();
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}
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/**
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* @see CordioHCIDriver::do_terminate
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*/
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virtual void do_terminate()
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{
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}
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/**
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* @see CordioHCIDriver::handle_reset_sequence
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*/
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virtual void handle_reset_sequence(uint8_t *pMsg)
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{
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uint16_t opcode;
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static uint8_t randCnt;
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/* if event is a command complete event */
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if (*pMsg == HCI_CMD_CMPL_EVT) {
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/* parse parameters */
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pMsg += HCI_EVT_HDR_LEN;
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pMsg++; /* skip num packets */
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BSTREAM_TO_UINT16(opcode, pMsg);
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pMsg++; /* skip status */
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/* decode opcode */
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switch (opcode) {
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case HCI_OPCODE_RESET: {
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/* initialize rand command count */
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randCnt = 0;
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reset_received = true;
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// bluenrg_ms_initialized event has to come after the hci reset event
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bluenrg_ms_initialized = false;
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}
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break;
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// ACL packet
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case ACI_WRITE_CONFIG_DATA_OPCODE:
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if (enable_link_layer_mode_ongoing) {
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enable_link_layer_mode_ongoing = false;
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aciSetRole();
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} else {
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aciGattInit();
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}
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break;
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case ACI_GATT_INIT_OPCODE:
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aciGapInit();
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break;
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case ACI_GAP_INIT_OPCODE:
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aciReadConfigParameter(RANDOM_STATIC_ADDRESS_OFFSET);
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break;
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case ACI_READ_CONFIG_DATA_OPCODE:
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// note: will send the HCI command to send the random address
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set_random_static_address(pMsg);
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break;
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case HCI_OPCODE_LE_SET_RAND_ADDR:
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HciSetEventMaskCmd((uint8_t *) hciEventMask);
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break;
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case HCI_OPCODE_SET_EVENT_MASK:
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/* send next command in sequence */
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HciLeSetEventMaskCmd((uint8_t *) hciLeEventMask);
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break;
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case HCI_OPCODE_LE_SET_EVENT_MASK:
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// Note: the public address is not read because there is no valid public address provisioned by default on the target
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// You can enable it thanks to json "valid-public-bd-address" config value
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#if MBED_CONF_BLUENRG_MS_VALID_PUBLIC_BD_ADDRESS == 1
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/* send next command in sequence */
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HciReadBdAddrCmd();
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break;
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case HCI_OPCODE_READ_BD_ADDR:
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/* parse and store event parameters */
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BdaCpy(hciCoreCb.bdAddr, pMsg);
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/* send next command in sequence */
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#endif
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HciLeReadBufSizeCmd();
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break;
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case HCI_OPCODE_LE_READ_BUF_SIZE:
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/* parse and store event parameters */
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BSTREAM_TO_UINT16(hciCoreCb.bufSize, pMsg);
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BSTREAM_TO_UINT8(hciCoreCb.numBufs, pMsg);
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/* initialize ACL buffer accounting */
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hciCoreCb.availBufs = hciCoreCb.numBufs;
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/* send next command in sequence */
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HciLeReadSupStatesCmd();
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break;
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case HCI_OPCODE_LE_READ_SUP_STATES:
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/* parse and store event parameters */
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memcpy(hciCoreCb.leStates, pMsg, HCI_LE_STATES_LEN);
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/* send next command in sequence */
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HciLeReadWhiteListSizeCmd();
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break;
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case HCI_OPCODE_LE_READ_WHITE_LIST_SIZE:
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/* parse and store event parameters */
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BSTREAM_TO_UINT8(hciCoreCb.whiteListSize, pMsg);
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/* send next command in sequence */
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HciLeReadLocalSupFeatCmd();
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break;
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case HCI_OPCODE_LE_READ_LOCAL_SUP_FEAT:
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/* parse and store event parameters */
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BSTREAM_TO_UINT16(hciCoreCb.leSupFeat, pMsg);
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/* send next command in sequence */
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hciCoreReadResolvingListSize();
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break;
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case HCI_OPCODE_LE_READ_RES_LIST_SIZE:
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/* parse and store event parameters */
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BSTREAM_TO_UINT8(hciCoreCb.resListSize, pMsg);
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/* send next command in sequence */
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hciCoreReadMaxDataLen();
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break;
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case HCI_OPCODE_LE_READ_MAX_DATA_LEN: {
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uint16_t maxTxOctets;
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uint16_t maxTxTime;
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BSTREAM_TO_UINT16(maxTxOctets, pMsg);
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BSTREAM_TO_UINT16(maxTxTime, pMsg);
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/* use Controller's maximum supported payload octets and packet duration times
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* for transmission as Host's suggested values for maximum transmission number
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* of payload octets and maximum packet transmission time for new connections.
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*/
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HciLeWriteDefDataLen(maxTxOctets, maxTxTime);
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}
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break;
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case HCI_OPCODE_LE_WRITE_DEF_DATA_LEN:
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if (hciCoreCb.extResetSeq) {
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/* send first extended command */
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(*hciCoreCb.extResetSeq)(pMsg, opcode);
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} else {
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/* initialize extended parameters */
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hciCoreCb.maxAdvDataLen = 0;
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hciCoreCb.numSupAdvSets = 0;
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hciCoreCb.perAdvListSize = 0;
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/* send next command in sequence */
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HciLeRandCmd();
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}
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break;
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case HCI_OPCODE_LE_READ_MAX_ADV_DATA_LEN:
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case HCI_OPCODE_LE_READ_NUM_SUP_ADV_SETS:
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case HCI_OPCODE_LE_READ_PER_ADV_LIST_SIZE:
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if (hciCoreCb.extResetSeq) {
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/* send next extended command in sequence */
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(*hciCoreCb.extResetSeq)(pMsg, opcode);
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}
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break;
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case HCI_OPCODE_LE_RAND:
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/* check if need to send second rand command */
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if (randCnt < (HCI_RESET_RAND_CNT - 1)) {
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randCnt++;
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HciLeRandCmd();
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} else {
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signal_reset_sequence_done();
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}
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break;
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default:
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break;
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}
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} else {
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/**
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* vendor specific event
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*/
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if (pMsg[0] == VENDOR_SPECIFIC_EVENT) {
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/* parse parameters */
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pMsg += HCI_EVT_HDR_LEN;
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BSTREAM_TO_UINT16(opcode, pMsg);
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if (opcode == EVT_BLUENRG_MS_INITIALIZED) {
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if (bluenrg_ms_initialized) {
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return;
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}
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bluenrg_ms_initialized = true;
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if (reset_received) {
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aciEnableLinkLayerModeOnly();
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}
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}
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}
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}
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}
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private:
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void aciEnableLinkLayerModeOnly()
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{
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uint8_t data[1] = { 0x01 };
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enable_link_layer_mode_ongoing = true;
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aciWriteConfigData(LL_WITHOUT_HOST_OFFSET, data);
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}
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void aciSetRole()
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{
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// master and slave, simultaneous advertising and scanning
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// (up to 4 connections)
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uint8_t data[1] = { 0x04 };
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aciWriteConfigData(ROLE_OFFSET, data);
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}
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void aciGattInit()
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{
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uint8_t *pBuf = hciCmdAlloc(ACI_GATT_INIT_OPCODE, 0);
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if (!pBuf) {
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return;
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}
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hciCmdSend(pBuf);
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}
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void aciGapInit()
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{
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uint8_t *pBuf = hciCmdAlloc(ACI_GAP_INIT_OPCODE, 3);
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if (!pBuf) {
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return;
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}
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pBuf[3] = 0xF;
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pBuf[4] = 0;
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pBuf[5] = 0;
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hciCmdSend(pBuf);
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}
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void aciReadConfigParameter(uint8_t offset)
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{
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uint8_t *pBuf = hciCmdAlloc(ACI_READ_CONFIG_DATA_OPCODE, 1);
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if (!pBuf) {
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return;
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}
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pBuf[3] = offset;
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hciCmdSend(pBuf);
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}
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template<size_t N>
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void aciWriteConfigData(uint8_t offset, uint8_t (&buf)[N])
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{
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uint8_t *pBuf = hciCmdAlloc(ACI_WRITE_CONFIG_DATA_OPCODE, 2 + N);
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if (!pBuf) {
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return;
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}
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pBuf[3] = offset;
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pBuf[4] = N;
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memcpy(pBuf + 5, buf, N);
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hciCmdSend(pBuf);
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}
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void hciCoreReadResolvingListSize(void)
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{
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/* if LL Privacy is supported by Controller and included */
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if ((hciCoreCb.leSupFeat & HCI_LE_SUP_FEAT_PRIVACY) &&
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(hciLeSupFeatCfg & HCI_LE_SUP_FEAT_PRIVACY)) {
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/* send next command in sequence */
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HciLeReadResolvingListSize();
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} else {
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hciCoreCb.resListSize = 0;
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/* send next command in sequence */
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hciCoreReadMaxDataLen();
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}
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}
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void hciCoreReadMaxDataLen(void)
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{
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/* if LE Data Packet Length Extensions is supported by Controller and included */
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if ((hciCoreCb.leSupFeat & HCI_LE_SUP_FEAT_DATA_LEN_EXT) &&
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(hciLeSupFeatCfg & HCI_LE_SUP_FEAT_DATA_LEN_EXT)) {
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/* send next command in sequence */
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HciLeReadMaxDataLen();
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} else {
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/* send next command in sequence */
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HciLeRandCmd();
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}
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}
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void bluenrg_ms_reset()
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{
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/* Reset BlueNRG_MS SPI interface. Hold reset line to 0 for 1500ms */
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rst = 0;
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wait_us(1500);
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rst = 1;
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/* Wait for the radio to come back up */
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wait_us(100000);
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}
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mbed::DigitalOut rst;
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bool reset_received;
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bool bluenrg_ms_initialized;
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bool enable_link_layer_mode_ongoing;
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};
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/**
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* Transport driver of the ST BlueNRG_MS shield.
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* @important: With that driver, it is assumed that the SPI bus used is not shared
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* with other SPI peripherals. The reasons behind this choice are simplicity and
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* performance:
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* - Reading from the peripheral SPI can be challenging especially if other
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* threads access the same SPI bus. Indeed it is common that the function
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* spiRead yield nothings even if the chip has signaled data with the irq
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* line. Sharing would make the situation worse and increase the risk of
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* timeout of HCI commands / response.
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* - This driver can be used even if the RTOS is disabled or not present it may
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* may be usefull for some targets.
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*
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* If The SPI is shared with other peripherals then the best option would be to
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* handle SPI read in a real time thread woken up by an event flag.
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*
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* Other mechanisms might also be added in the future to handle data read as an
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* event from the stack. This might not be the best solution for all BLE chip;
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* especially this one.
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*/
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class TransportDriver : public cordio::CordioHCITransportDriver {
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public:
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/**
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* Construct the transport driver required by a BlueNRG_MS module.
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* @param mosi Pin of the SPI mosi
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* @param miso Pin of the SPI miso
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* @param sclk Pin of the SPI clock
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* @param irq Pin used by the module to signal data are available.
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*/
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TransportDriver(PinName mosi, PinName miso, PinName sclk, PinName ncs, PinName irq)
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: spi(mosi, miso, sclk), nCS(ncs), irq(irq), _spi_thread(osPriorityNormal, SPI_STACK_SIZE, _spi_thread_stack)
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{
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_spi_thread.start(mbed::callback(this, &TransportDriver::spi_read_cb));
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}
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virtual ~TransportDriver() { }
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/**
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* @see CordioHCITransportDriver::initialize
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*/
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virtual void initialize()
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{
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// Setup the spi for 8 bit data, low clock polarity,
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// 1-edge phase, with an 8MHz clock rate
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spi.format(8, 0);
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spi.frequency(8000000);
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// Deselect the BlueNRG_MS chip by keeping its nCS signal high
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nCS = 1;
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wait_us(500);
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// Set the interrupt handler for the device
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irq.mode(PullDown); // set irq mode
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irq.rise(mbed::callback(this, &TransportDriver::HCI_Isr));
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}
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/**
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* @see CordioHCITransportDriver::terminate
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*/
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virtual void terminate() { }
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/**
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* @see CordioHCITransportDriver::write
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*/
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virtual uint16_t write(uint8_t type, uint16_t len, uint8_t *pData)
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{
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// repeat write until successfull. A number of attempt or timeout might
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// be useful
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while (spiWrite(type, pData, len) == 0) { }
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return len;
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}
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private:
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uint16_t spiWrite(uint8_t type, const uint8_t *data, uint16_t data_length)
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{
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static const uint8_t header_master[] = {
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0x0A, 0x00, 0x00, 0x00, 0x00
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};
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uint8_t header_slave[] = { 0xaa, 0x00, 0x00, 0x00, 0x00 };
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uint16_t data_written = 0;
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uint16_t write_buffer_size = 0;
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_spi_mutex.lock();
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/* CS reset */
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nCS = 0;
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/* Exchange header */
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for (uint8_t i = 0; i < sizeof(header_master); ++i) {
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header_slave[i] = spi.write(header_master[i]);
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}
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if (header_slave[0] != 0x02) {
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goto exit;
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}
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write_buffer_size = header_slave[2] << 8 | header_slave[1];
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if (write_buffer_size == 0 || write_buffer_size < (data_length + 1)) {
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goto exit;
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}
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spi.write(type);
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data_written = data_length;
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for (uint16_t i = 0; i < data_length; ++i) {
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spi.write(data[i]);
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}
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exit:
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nCS = 1;
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_spi_mutex.unlock();
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return data_written;
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|
}
|
|
|
|
uint16_t spiRead(uint8_t *data_buffer, const uint16_t buffer_size)
|
|
{
|
|
static const uint8_t header_master[] = {0x0b, 0x00, 0x00, 0x00, 0x00};
|
|
uint8_t header_slave[5] = { 0xaa, 0x00, 0x00, 0x00, 0x00};
|
|
uint16_t read_length = 0;
|
|
uint16_t data_available = 0;
|
|
|
|
nCS = 0;
|
|
|
|
/* Read the header */
|
|
for (size_t i = 0; i < sizeof(header_master); i++) {
|
|
header_slave[i] = spi.write(header_master[i]);
|
|
}
|
|
|
|
if (header_slave[0] != 0x02) {
|
|
goto exit;
|
|
}
|
|
|
|
data_available = (header_slave[4] << 8) | header_slave[3];
|
|
read_length = data_available > buffer_size ? buffer_size : data_available;
|
|
|
|
for (uint16_t i = 0; i < read_length; ++i) {
|
|
data_buffer[i] = spi.write(0xFF);
|
|
}
|
|
|
|
exit:
|
|
nCS = 1;
|
|
|
|
return read_length;
|
|
}
|
|
|
|
/*
|
|
* might be split into two parts: the IRQ signaling a real time thread and
|
|
* the real time thread reading data from the SPI.
|
|
*/
|
|
void HCI_Isr(void)
|
|
{
|
|
_spi_read_sem.release();
|
|
}
|
|
|
|
void spi_read_cb()
|
|
{
|
|
uint8_t data_buffer[256];
|
|
while (true) {
|
|
_spi_read_sem.acquire();
|
|
|
|
_spi_mutex.lock();
|
|
while (irq == 1) {
|
|
uint16_t data_read = spiRead(data_buffer, sizeof(data_buffer));
|
|
on_data_received(data_buffer, data_read);
|
|
}
|
|
_spi_mutex.unlock();
|
|
}
|
|
}
|
|
|
|
/**
|
|
* Unsafe SPI, does not lock when SPI access happens.
|
|
*/
|
|
::mbed::SPI spi;
|
|
mbed::DigitalOut nCS;
|
|
mbed::InterruptIn irq;
|
|
rtos::Thread _spi_thread;
|
|
uint8_t _spi_thread_stack[SPI_STACK_SIZE];
|
|
rtos::Semaphore _spi_read_sem;
|
|
rtos::Mutex _spi_mutex;
|
|
};
|
|
|
|
} // namespace bluenrg_ms
|
|
} // namespace vendor
|
|
} // namespace ble
|
|
|
|
/**
|
|
* Cordio HCI driver factory
|
|
*/
|
|
ble::vendor::cordio::CordioHCIDriver &ble_cordio_get_hci_driver()
|
|
{
|
|
static ble::vendor::bluenrg_ms::TransportDriver transport_driver(
|
|
MBED_CONF_BLUENRG_MS_SPI_MOSI,
|
|
MBED_CONF_BLUENRG_MS_SPI_MISO,
|
|
MBED_CONF_BLUENRG_MS_SPI_SCK,
|
|
MBED_CONF_BLUENRG_MS_SPI_NCS,
|
|
MBED_CONF_BLUENRG_MS_SPI_IRQ
|
|
);
|
|
static ble::vendor::bluenrg_ms::HCIDriver hci_driver(
|
|
transport_driver,
|
|
MBED_CONF_BLUENRG_MS_SPI_RESET
|
|
);
|
|
return hci_driver;
|
|
}
|