mirror of https://github.com/ARMmbed/mbed-os.git
189 lines
11 KiB
C
189 lines
11 KiB
C
/**************************************************************************//**
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* @file eadc.c
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* @version V1.00
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* $Revision: 4 $
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* $Date: 14/10/07 4:46p $
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* @brief NUC472/NUC442 EADC driver source file
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*
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* @note
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* Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#include "NUC472_442.h"
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/** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
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@{
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*/
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/** @addtogroup NUC472_442_EADC_Driver EADC Driver
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@{
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*/
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/** @addtogroup NUC472_442_EADC_EXPORTED_FUNCTIONS EADC Exported Functions
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@{
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*/
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/**
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* @brief This function make EADC_module be ready to convert.
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* @param[in] eadc Base address of EADC module.
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* @param[in] u32InputMode This parameter is not used.
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* @return None
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* @details This function is used to set analog input mode and enable A/D Converter.
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* Before starting A/D conversion function, ADCEN bit (EADC_CTL[0]) should be set to 1.
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* @note
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*/
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void EADC_Open(EADC_T *eadc, uint32_t u32InputMode)
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{
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eadc->CTL |= EADC_CTL_ADCEN_Msk;
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}
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/**
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* @brief Disable EADC_module.
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* @param[in] eadc Base address of EADC module..
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* @return None
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* @details Clear ADCEN bit (EADC_CTL[0]) to disable A/D converter analog circuit power consumption.
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*/
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void EADC_Close(EADC_T *eadc)
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{
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eadc->CTL &= ~EADC_CTL_ADCEN_Msk;
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}
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/**
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* @brief Configure the sample control logic module.
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* @param[in] eadc Base address of EADC module.
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* @param[in] u32ModuleNum Decides the sample module number, valid values are:
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* - \ref EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0
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* - \ref EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1
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* - \ref EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2
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* - \ref EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3
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* - \ref EADC0_SAMPLE_MODULE4 : EADC0 SAMPLE module 4
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* - \ref EADC0_SAMPLE_MODULE5 : EADC0 SAMPLE module 5
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* - \ref EADC0_SAMPLE_MODULE6 : EADC0 SAMPLE module 6
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* - \ref EADC0_SAMPLE_MODULE7 : EADC0 SAMPLE module 7
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* - \ref EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0
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* - \ref EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1
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* - \ref EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2
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* - \ref EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3
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* - \ref EADC1_SAMPLE_MODULE4 : EADC1 SAMPLE module 4
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* - \ref EADC1_SAMPLE_MODULE5 : EADC1 SAMPLE module 5
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* - \ref EADC1_SAMPLE_MODULE6 : EADC1 SAMPLE module 6
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* - \ref EADC1_SAMPLE_MODULE7 : EADC1 SAMPLE module 7
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* @param[in] u32TriggerSrc Decides the trigger source. Valid values are:
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* - \ref EADC_SOFTWARE_TRIGGER : Disable trigger
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* - \ref EADC_STADC_TRIGGER : STADC pin trigger
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* - \ref EADC_ADINT0_TRIGGER : ADC ADINT0 interrupt EOC pulse trigger
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* - \ref EADC_ADINT1_TRIGGER : ADC ADINT1 interrupt EOC pulse trigger
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* - \ref EADC_TIMER0_TRIGGER : Timer0 overflow pulse trigger
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* - \ref EADC_TIMER1_TRIGGER : Timer1 overflow pulse trigger
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* - \ref EADC_TIMER2_TRIGGER : Timer2 overflow pulse trigger
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* - \ref EADC_TIMER3_TRIGGER : Timer3 overflow pulse trigger
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* - \ref EADC_EPWM0CH0_TRIGGER : EPWM0CH0 trigger
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* - \ref EADC_EPWM0CH2_TRIGGER : EPWM0CH2 trigger
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* - \ref EADC_EPWM0CH4_TRIGGER : EPWM0CH4 trigger
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* - \ref EADC_EPWM1CH0_TRIGGER : EPWM0CH0 trigger
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* - \ref EADC_EPWM1CH2_TRIGGER : EPWM0CH2 trigger
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* - \ref EADC_EPWM1CH4_TRIGGER : EPWM0CH4 trigger
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* - \ref EADC_PWM0CH0_TRIGGER : PWM0CH0 trigger
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* - \ref EADC_PWM0CH1_TRIGGER : PWM0CH1 trigger
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* @param[in] u32Channel Specifies the sample module channel, valid value are from 0 to 15.
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* @return None
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* @details Each of ADC control logic modules 0~15 which is configurable for ADC converter channel EADC_CH0~15 and trigger source.
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* sample module 16~18 is fixed for ADC channel 16, 17, 18 input sources as band-gap voltage, temperature sensor, and battery power (VBAT).
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*/
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void EADC_ConfigSampleModule(EADC_T *eadc, \
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uint32_t u32ModuleNum, \
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uint32_t u32TriggerSrc, \
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uint32_t u32Channel)
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{
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*(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) &= ~(EADC_AD0SPCTL0_TRGSEL_Msk | EADC_AD0SPCTL0_CHSEL_Msk);
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*(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) |= (u32TriggerSrc | u32Channel);
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if (u32TriggerSrc == EADC_STADC_TRIGGER)
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*(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) |= (EADC_AD0SPCTL0_EXTREN_Msk | EADC_AD0SPCTL0_EXTFEN_Msk);
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}
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/**
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* @brief Set trigger delay time.
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* @param[in] eadc Base address of EADC module.
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* @param[in] u32ModuleNum Decides the sample module number, valid values are:
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* - \ref EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0
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* - \ref EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1
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* - \ref EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2
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* - \ref EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3
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* - \ref EADC0_SAMPLE_MODULE4 : EADC0 SAMPLE module 4
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* - \ref EADC0_SAMPLE_MODULE5 : EADC0 SAMPLE module 5
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* - \ref EADC0_SAMPLE_MODULE6 : EADC0 SAMPLE module 6
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* - \ref EADC0_SAMPLE_MODULE7 : EADC0 SAMPLE module 7
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* - \ref EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0
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* - \ref EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1
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* - \ref EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2
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* - \ref EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3
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* - \ref EADC1_SAMPLE_MODULE4 : EADC1 SAMPLE module 4
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* - \ref EADC1_SAMPLE_MODULE5 : EADC1 SAMPLE module 5
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* - \ref EADC1_SAMPLE_MODULE6 : EADC1 SAMPLE module 6
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* - \ref EADC1_SAMPLE_MODULE7 : EADC1 SAMPLE module 7
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* @param[in] u32TriggerDelayTime Decides the trigger delay time, valid range are between 0~0xFF.
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* @param[in] u32DelayClockDivider Decides the trigger delay clock divider. Valid values are:
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* - \ref EADC_SPCTL_TRGDLYDIV_DIVIDER_1 : Trigger delay clock frequency is ADC_CLK/1
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* - \ref EADC_SPCTL_TRGDLYDIV_DIVIDER_2 : Trigger delay clock frequency is ADC_CLK/2
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* - \ref EADC_SPCTL_TRGDLYDIV_DIVIDER_4 : Trigger delay clock frequency is ADC_CLK/4
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* - \ref EADC_SPCTL_TRGDLYDIV_DIVIDER_16 : Trigger delay clock frequency is ADC_CLK/16
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* @return None
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* @details User can configure the trigger delay time by setting TRGDLYCNT (EADC_SCTLn[15:8], n=0~15) and TRGDLYDIV (EADC_SCTLn[7:6], n=8~15).
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* Trigger delay time = (u32TriggerDelayTime) x Trigger delay clock period.
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*/
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void EADC_SetTriggerDelayTime(EADC_T *eadc, \
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uint32_t u32ModuleNum, \
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uint32_t u32TriggerDelayTime, \
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uint32_t u32DelayClockDivider)
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{
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*(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) &= ~(EADC_AD0SPCTL0_TRGDLYDIV_Msk | EADC_AD0SPCTL0_TRGDLYCNT_Msk);
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*(__IO uint32_t *)(&eadc->AD0SPCTL0 + u32ModuleNum) |= ((u32TriggerDelayTime << EADC_AD0SPCTL0_TRGDLYCNT_Pos) | u32DelayClockDivider);
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}
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/**
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* @brief Set ADC extend sample time.
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* @param[in] eadc Base address of EADC module.
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* @param[in] u32ModuleNum Decides the sample module number, valid values are:
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* - \ref EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0
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* - \ref EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1
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* - \ref EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2
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* - \ref EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3
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* - \ref EADC0_SAMPLE_MODULE4 : EADC0 SAMPLE module 4
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* - \ref EADC0_SAMPLE_MODULE5 : EADC0 SAMPLE module 5
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* - \ref EADC0_SAMPLE_MODULE6 : EADC0 SAMPLE module 6
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* - \ref EADC0_SAMPLE_MODULE7 : EADC0 SAMPLE module 7
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* - \ref EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0
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* - \ref EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1
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* - \ref EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2
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* - \ref EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3
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* - \ref EADC1_SAMPLE_MODULE4 : EADC1 SAMPLE module 4
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* - \ref EADC1_SAMPLE_MODULE5 : EADC1 SAMPLE module 5
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* - \ref EADC1_SAMPLE_MODULE6 : EADC1 SAMPLE module 6
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* - \ref EADC1_SAMPLE_MODULE7 : EADC1 SAMPLE module 7
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* @param[in] u32ExtendSampleTime Decides the extend sampling time, the range is from 0~255 ADC clock. Valid value are from 0 to 0xFF.
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* @return None
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* @details When A/D converting at high conversion rate, the sampling time of analog input voltage may not enough if input channel loading is heavy,
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* user can extend A/D sampling time after trigger source is coming to get enough sampling time.
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*/
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void EADC_SetExtendSampleTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime)
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{
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if (u32ModuleNum < EADC1_SAMPLE_MODULE0) {
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eadc->EXTSMPT &= ~EADC_EXTSMPT_EXTSMPT0_Msk;
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eadc->EXTSMPT |= u32ExtendSampleTime;
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} else {
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eadc->EXTSMPT &= ~EADC_EXTSMPT_EXTSMPT1_Msk;
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eadc->EXTSMPT |= (u32ExtendSampleTime << EADC_EXTSMPT_EXTSMPT1_Pos);
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}
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}
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/*@}*/ /* end of group NUC472_442_EADC_EXPORTED_FUNCTIONS */
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/*@}*/ /* end of group NUC472_442_EADC_Driver */
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/*@}*/ /* end of group NUC472_442_Device_Driver */
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/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
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