mirror of https://github.com/ARMmbed/mbed-os.git
282 lines
9.7 KiB
C
282 lines
9.7 KiB
C
/*******************************************************************************
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*Copyright (c) 2013-2016 Realtek Semiconductor Corp, All Rights Reserved
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* SPDX-License-Identifier: LicenseRef-PBL
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*
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* Licensed under the Permissive Binary License, Version 1.0 (the "License");
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* you may not use this file except in compliance with the License.
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*
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* You may obtain a copy of the License at https://www.mbed.com/licenses/PBL-1.0
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*
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* See the License for the specific language governing permissions and limitations under the License.
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*******************************************************************************
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*/
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#ifndef _HAL_8195A_H_
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#define _HAL_8195A_H_
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#include "platform_autoconf.h"
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#include "basic_types.h"
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#include "section_config.h"
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#include "rtl8195a_sys_on.h"
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#include "rtl8195a_peri_on.h"
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#include "hal_platform.h"
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#include "hal_pinmux.h"
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#include "hal_api.h"
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#include "hal_peri_on.h"
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#include "hal_misc.h"
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#include "hal_irqn.h"
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#include "hal_vector_table.h"
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#include "hal_diag.h"
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#include "hal_spi_flash.h"
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#include "rtl8195a_spi_flash.h"
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#include "hal_util.h"
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#include "hal_efuse.h"
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#include "hal_soc_ps_monitor.h"
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#include "diag.h"
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#include "system_8195a.h"
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// from RDC team
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#ifdef CONFIG_MBED_ENABLED
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// Add for Mbed -OS
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#include <stdint.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include "rtl8195a_compiler.h"
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#include "rtl8195a_platform.h"
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#include "rtl8195a_crypto.h"
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#define REG32(reg) (*(volatile uint32_t *)(reg))
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#define REG16(reg) (*(volatile uint16_t *)(reg))
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#define REG08(reg) (*(volatile uint8_t *)(reg))
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#ifndef BIT
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#define BIT(x) (1 << (x))
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#endif
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x)))
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#define ABS(x) ((x > 0) ? x : -x)
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#define MAX(x,y) ((x) < (y) ? (y) : (x))
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#ifndef MIN
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#define MIN(x,y) ((x) > (y) ? (y) : (x))
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#endif
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#define __RTK_READ32(B,A) (REG32((B) + (A)))
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#define __RTK_READ16(B,A) (REG16((B) + (A)))
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#define __RTK_READ08(B,A) (REG08((B) + (A)))
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#define __RTK_WRITE32(B,A,V) (REG32((B) + (A)) = (V))
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#define __RTK_WRITE16(B,A,V) (REG32((B) + (A)) = (V))
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#define __RTK_WRITE08(B,A,V) (REG32((B) + (A)) = (V))
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#define __RTK_SETBIT(A,V) (REG32(A) |= V)
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#define __RTK_CLRBIT(A,V) (REG32(A) &= ~V)
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#define __RTK_SETMSK(A,M,V) (REG32(A) = ((REG32(A) & (~M)) | V))
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#define PERI_BASE 0x40000000
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#define __BUILD_MACRO(name,ctrl) \
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static inline uint32_t \
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__##name##_READ32(uint32_t addr) \
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{ \
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return __RTK_READ32(ctrl##_BASE,addr); \
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} \
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static inline uint16_t \
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__##name##_READ16(uint32_t addr) \
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{ \
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return __RTK_READ16(ctrl##_BASE,addr); \
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} \
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static inline uint8_t \
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__##name##_READ08(uint32_t addr) \
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{ \
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return __RTK_READ08(ctrl##_BASE,addr); \
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} \
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static inline void \
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__##name##_WRITE32(uint32_t addr, uint32_t val) \
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{ \
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__RTK_WRITE32(ctrl##_BASE,addr,val); \
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} \
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static inline void \
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__##name##_WRITE16(uint32_t addr, uint16_t val) \
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{ \
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__RTK_WRITE16(ctrl##_BASE,addr,val); \
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} \
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static inline void \
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__##name##_WRITE08(uint32_t addr, uint8_t val) \
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{ \
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__RTK_WRITE08(ctrl##_BASE,addr,val); \
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} \
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static inline void \
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__##name##_SETBIT(uint32_t addr, uint32_t val) \
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{ \
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__RTK_SETBIT(ctrl##_BASE+addr,val); \
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} \
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static inline void \
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__##name##_CLRBIT(uint32_t addr, uint32_t val) \
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{ \
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__RTK_CLRBIT(ctrl##_BASE+addr,val); \
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} \
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static inline void \
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__##name##_SETMSK(uint32_t addr, uint32_t msk, uint32_t val) \
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{ \
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__RTK_SETMSK(ctrl##_BASE+addr,msk,val); \
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} \
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//__BUILD_MACRO(RTK_CTRL, CTRL)
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//__BUILD_MACRO(RTK_PERI, PERI)
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//__BUILD_MACRO(RTK_VENDOR, VENDOR)
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//__BUILD_MACRO(RTK_SDRC, SDRC)
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__BUILD_MACRO(RTK_CTRL, SYSTEM_CTRL)
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__BUILD_MACRO(RTK_PERI, PERI)
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__BUILD_MACRO(RTK_SDRC, SDR_CTRL)
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__BUILD_MACRO(RTK_VENDOR, VENDOR_REG)
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#define __BUILD_FCTRL_MACRO(name,ctrl) \
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static inline void \
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__##name##_Enable(void) \
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{ \
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__RTK_PERI_SETBIT(ctrl, BIT_FCTRL_##name); \
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} \
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static inline void \
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__##name##_Disable(void) \
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{ \
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__RTK_READ32(name##_BASE, 0); \
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__RTK_PERI_CLRBIT(ctrl, BIT_FCTRL_##name); \
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}
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#include "rtl8195a_trap.h"
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#include "rtl8195a_clk.h"
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#include "rtl8195a_misc.h"
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#include "rtl8195a_sdio.h"
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#endif
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/* ----------------------------------------------------------------------------
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-- Cortex M3 Core Configuration
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---------------------------------------------------------------------------- */
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/*!
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* @addtogroup Cortex_Core_Configuration Cortex M0 Core Configuration
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* @{
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*/
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#define __CM3_REV 0x0200 /**< Core revision r0p0 */
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#define __MPU_PRESENT 1 /**< Defines if an MPU is present or not */
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#define __NVIC_PRIO_BITS 4 /**< Number of priority bits implemented in the NVIC */
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#define __Vendor_SysTickConfig 1 /**< Vendor specific implementation of SysTickConfig is defined */
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#include "core_cm3.h"
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#ifdef CONFIG_TIMER_EN
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#include "hal_timer.h"
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#endif
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#ifdef CONFIG_GDMA_EN
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#include "hal_gdma.h"
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#include "rtl8195a_gdma.h"
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#endif
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#ifdef CONFIG_GPIO_EN
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#include "hal_gpio.h"
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#include "rtl8195a_gpio.h"
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#endif
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#ifdef CONFIG_SPI_COM_EN
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#include "hal_ssi.h"
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#include "rtl8195a_ssi.h"
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#endif
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#ifdef CONFIG_UART_EN
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#include "hal_uart.h"
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#include "rtl8195a_uart.h"
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#endif
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#ifdef CONFIG_I2C_EN
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#include "hal_i2c.h"
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#include "rtl8195a_i2c.h"
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#endif
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#ifdef CONFIG_PWM_EN
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#include "hal_pwm.h"
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#include "rtl8195a_pwm.h"
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#endif
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#ifdef CONFIG_I2S_EN
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#include "hal_i2s.h"
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#include "rtl8195a_i2s.h"
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#endif
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#ifdef CONFIG_DAC_EN
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#include "hal_dac.h"
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#include "rtl8195a_dac.h"
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#endif
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#ifdef CONFIG_ADC_EN
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#include "hal_adc.h"
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#include "rtl8195a_adc.h"
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#endif
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#ifdef CONFIG_SDR_EN
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#endif
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#ifdef CONFIG_SPIC_EN
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#endif
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#ifdef CONFIG_SDIO_DEVICE_EN
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//#include "hal_sdio.h"
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#endif
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#ifdef CONFIG_NFC_EN
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//#include "hal_nfc.h"
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//#include "rtl8195a_nfc.h"
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#endif
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#ifdef CONFIG_WDG
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#include "rtl8195a_wdt.h"
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#endif
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#ifdef CONFIG_USB_EN
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//#include "hal_usb.h"
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//#include "rtl8195a_usb.h"
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#endif
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#include "hal_log_uart.h"
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#ifdef CONFIG_MII_EN
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//#include "hal_mii.h"
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//#include "rtl8195a_mii.h"
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#endif
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// firmware information, located at the header of Image2
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#define FW_VERSION (0x0100)
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#define FW_SUBVERSION (0x0001)
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#define FW_CHIP_ID (0x8195)
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#define FW_CHIP_VER (0x01)
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#define FW_BUS_TYPE (0x01) // the iNIC firmware type: USB/SDIO
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#define FW_INFO_RSV1 (0x00) // the firmware information reserved
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#define FW_INFO_RSV2 (0x00) // the firmware information reserved
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#define FW_INFO_RSV3 (0x00) // the firmware information reserved
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#define FW_INFO_RSV4 (0x00) // the firmware information reserved
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#define FLASH_RESERVED_DATA_BASE 0x8000 // reserve 32K for Image1
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#define FLASH_SYSTEM_DATA_ADDR 0x9000 // reserve 32K+4K for Image1 + Reserved data
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// Flash Map for Calibration data
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#define FLASH_CAL_DATA_BASE 0xA000
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#define FLASH_CAL_DATA_ADDR(_offset) (FLASH_CAL_DATA_BASE + _offset)
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#define FLASH_CAL_DATA_SIZE 0x1000
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#define FLASH_SECTOR_SIZE 0x1000
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// SPIC Calibration Data
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#define FLASH_SPIC_PARA_OFFSET 0x80
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#define FLASH_SPIC_PARA_BASE (FLASH_SYSTEM_DATA_ADDR+FLASH_SPIC_PARA_OFFSET)
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// SDRC Calibration Data
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#define FLASH_SDRC_PARA_OFFSET 0x180
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#define FLASH_SDRC_PARA_BASE (FLASH_SYSTEM_DATA_ADDR+FLASH_SDRC_PARA_OFFSET)
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// ADC Calibration Data
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#define FLASH_ADC_PARA_OFFSET 0x200
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#define FLASH_ADC_PARA_BASE (FLASH_SYSTEM_DATA_ADDR+FLASH_ADC_PARA_OFFSET)
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#endif //_HAL_8195A_H_
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