mirror of https://github.com/ARMmbed/mbed-os.git
192 lines
6.0 KiB
C
192 lines
6.0 KiB
C
/* mbed Microcontroller Library
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* Copyright (c) 2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <math.h>
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#include "mbed_assert.h"
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#include "spi_api.h"
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#if DEVICE_SPI
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#include "cmsis.h"
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#include "pinmap.h"
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#include "mbed_error.h"
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#include "fsl_spi.h"
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#include "PeripheralPins.h"
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/* Array of SPI peripheral base address. */
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static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
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{
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// determine the SPI to use
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uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
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uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
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uint32_t spi_sclk = pinmap_peripheral(sclk, PinMap_SPI_SCLK);
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uint32_t spi_ssel = pinmap_peripheral(ssel, PinMap_SPI_SSEL);
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uint32_t spi_data = pinmap_merge(spi_mosi, spi_miso);
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uint32_t spi_cntl = pinmap_merge(spi_sclk, spi_ssel);
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obj->instance = pinmap_merge(spi_data, spi_cntl);
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MBED_ASSERT((int)obj->instance != NC);
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// pin out the spi pins
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pinmap_pinout(mosi, PinMap_SPI_MOSI);
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pinmap_pinout(miso, PinMap_SPI_MISO);
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pinmap_pinout(sclk, PinMap_SPI_SCLK);
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if (ssel != NC) {
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pinmap_pinout(ssel, PinMap_SPI_SSEL);
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}
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}
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void spi_free(spi_t *obj)
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{
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SPI_Deinit(spi_address[obj->instance]);
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}
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void spi_format(spi_t *obj, int bits, int mode, int slave)
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{
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spi_master_config_t master_config;
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spi_slave_config_t slave_config;
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/* Bits: values between 4 and 16 are valid */
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MBED_ASSERT(bits >= 4 && bits <= 16);
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obj->bits = bits;
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if (slave) {
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/* Slave config */
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SPI_SlaveGetDefaultConfig(&slave_config);
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slave_config.dataWidth = (spi_data_width_t)(bits - 1);
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slave_config.polarity = (mode & 0x2) ? kSPI_ClockPolarityActiveLow : kSPI_ClockPolarityActiveHigh;
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slave_config.phase = (mode & 0x1) ? kSPI_ClockPhaseSecondEdge : kSPI_ClockPhaseFirstEdge;
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SPI_SlaveInit(spi_address[obj->instance], &slave_config);
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} else {
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/* Master config */
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SPI_MasterGetDefaultConfig(&master_config);
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master_config.dataWidth = (spi_data_width_t)(bits - 1);
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master_config.polarity = (mode & 0x2) ? kSPI_ClockPolarityActiveLow : kSPI_ClockPolarityActiveHigh;
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master_config.phase = (mode & 0x1) ? kSPI_ClockPhaseSecondEdge : kSPI_ClockPhaseFirstEdge;
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master_config.direction = kSPI_MsbFirst;
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switch (obj->instance) {
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case 0:
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0);
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RESET_PeripheralReset(kFC0_RST_SHIFT_RSTn);
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break;
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case 1:
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM1);
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RESET_PeripheralReset(kFC1_RST_SHIFT_RSTn);
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break;
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case 2:
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM2);
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RESET_PeripheralReset(kFC2_RST_SHIFT_RSTn);
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break;
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case 3:
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM3);
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RESET_PeripheralReset(kFC3_RST_SHIFT_RSTn);
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break;
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case 4:
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4);
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RESET_PeripheralReset(kFC4_RST_SHIFT_RSTn);
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break;
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case 5:
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM5);
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RESET_PeripheralReset(kFC5_RST_SHIFT_RSTn);
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break;
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case 6:
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM6);
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RESET_PeripheralReset(kFC6_RST_SHIFT_RSTn);
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break;
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case 7:
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM7);
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RESET_PeripheralReset(kFC7_RST_SHIFT_RSTn);
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break;
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#if (FSL_FEATURE_SOC_FLEXCOMM_COUNT > 8U)
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case 8:
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM8);
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RESET_PeripheralReset(kFC8_RST_SHIFT_RSTn);
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break;
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#endif
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#if (FSL_FEATURE_SOC_FLEXCOMM_COUNT > 9U)
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case 9:
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM9);
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RESET_PeripheralReset(kFC9_RST_SHIFT_RSTn);
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break;
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#endif
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}
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SPI_MasterInit(spi_address[obj->instance], &master_config, 12000000);
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}
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}
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void spi_frequency(spi_t *obj, int hz)
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{
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SPI_MasterSetBaud(spi_address[obj->instance], (uint32_t)hz, 12000000);
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}
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static inline int spi_readable(spi_t * obj)
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{
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return (SPI_GetStatusFlags(spi_address[obj->instance]) & kSPI_RxNotEmptyFlag);
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}
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int spi_master_write(spi_t *obj, int value)
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{
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uint32_t rx_data;
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SPI_WriteData(spi_address[obj->instance], (uint16_t)value, kSPI_FrameAssert);
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// wait rx buffer full
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while (!spi_readable(obj));
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rx_data = SPI_ReadData(spi_address[obj->instance]);
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return rx_data & 0xffff;
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}
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int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
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char *rx_buffer, int rx_length, char write_fill) {
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int total = (tx_length > rx_length) ? tx_length : rx_length;
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for (int i = 0; i < total; i++) {
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char out = (i < tx_length) ? tx_buffer[i] : write_fill;
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char in = spi_master_write(obj, out);
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if (i < rx_length) {
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rx_buffer[i] = in;
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}
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}
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return total;
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}
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int spi_slave_receive(spi_t *obj)
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{
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return spi_readable(obj);
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}
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int spi_slave_read(spi_t *obj)
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{
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uint32_t rx_data;
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while (!spi_readable(obj));
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rx_data = SPI_ReadData(spi_address[obj->instance]);
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return rx_data & 0xffff;
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}
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void spi_slave_write(spi_t *obj, int value)
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{
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SPI_WriteData(spi_address[obj->instance], (uint16_t)value, 0);
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}
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#endif
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