mirror of https://github.com/ARMmbed/mbed-os.git
113 lines
3.4 KiB
C
113 lines
3.4 KiB
C
/***************************************************************************//**
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* @file watchdog_api.c
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*******************************************************************************
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* @section License
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* <b>(C) Copyright 2018 Silicon Labs, http://www.silabs.com</b>
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*******************************************************************************
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************/
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#include "device.h"
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#include "watchdog_api.h"
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#if DEVICE_WATCHDOG
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#include "clocking.h"
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#include "em_cmu.h"
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#include "em_wdog.h"
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watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
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{
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if (config == 0 || config->timeout_ms > 262145 || config->timeout_ms == 0) {
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return WATCHDOG_STATUS_INVALID_ARGUMENT;
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}
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uint32_t timeout = config->timeout_ms;
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if (timeout <= 9) {
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timeout = 0;
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} else {
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timeout -= 2;
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/* get bit position of highest bit set */
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timeout = 31 - __CLZ(timeout);
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/* need to go one over */
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timeout += 1;
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/* convert to wdog setting. if bit 4 is the highest, then the
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* watchdog setting == 1. That means watchdog setting 0xF == 2^18 = 256k */
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if (timeout > 18) {
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return WATCHDOG_STATUS_INVALID_ARGUMENT;
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}
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timeout -= 3;
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}
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WDOG_Init_TypeDef wdog_init = WDOG_INIT_DEFAULT;
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wdog_init.clkSel = wdogClkSelULFRCO;
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wdog_init.em2Run = true;
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wdog_init.em3Run = true;
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wdog_init.perSel = timeout;
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WDOGn_Init(DEFAULT_WDOG, &wdog_init);
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return WATCHDOG_STATUS_OK;
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}
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void hal_watchdog_kick(void)
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{
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WDOGn_Feed(DEFAULT_WDOG);
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}
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watchdog_status_t hal_watchdog_stop(void)
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{
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WDOGn_Enable(DEFAULT_WDOG, false);
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return WATCHDOG_STATUS_OK;
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}
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uint32_t hal_watchdog_get_reload_value(void)
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{
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uint32_t period = (DEFAULT_WDOG->CTRL & _WDOG_CTRL_PERSEL_MASK) >> _WDOG_CTRL_PERSEL_SHIFT;
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if (period == 0) {
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return 9;
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} else {
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period += 3;
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return (1U << period) + 1;
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}
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}
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watchdog_features_t hal_watchdog_get_platform_features(void)
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{
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watchdog_features_t feat = {
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.max_timeout = 262145,
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.update_config = true,
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.disable_watchdog = true,
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#if defined(TARGET_EFM32GG) || defined(TARGET_EFM32HG) || defined(TARGET_EFM32LG) || defined(TARGET_EFM32WG) || defined(TARGET_EFM32ZG)
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.clock_typical_frequency = 1000,
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.clock_max_frequency = 1750
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#elif defined(TARGET_EFM32GG11)
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.clock_typical_frequency = 1000,
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.clock_max_frequency = 1120
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#elif defined(TARGET_EFM32PG) || defined(TARGET_EFM32PG12) || defined(TARGET_EFR32MG1) || defined(TARGET_EFR32MG12)
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.clock_typical_frequency = 1000,
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.clock_max_frequency = 1070
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#else
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#error "unsupported target"
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#endif
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};
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return feat;
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}
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#endif /* DEVICE_WATCHDOG */
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