mbed-os/TESTS/mbed_hal_fpga_ci_test_shield
Steven Cooreman 54de9fa1df Increase ADC test tolerance to 5%
During the SiP workshop, we discovered that 3% is too narrow due to a combination of:
Voltage rail differences between target and FPGA
Extension of lesser-resolution ADC's to 16-bit results
2019-07-25 15:18:27 +01:00
..
analogin Increase ADC test tolerance to 5% 2019-07-25 15:18:27 +01:00
gpio FPGA test shield: Allow any defined form factor 2019-07-11 11:41:30 +01:00
gpio_irq FPGA test shield: Allow any defined form factor 2019-07-11 11:41:30 +01:00
i2c FPFA I2C: correct init bloc number 2019-07-25 15:18:27 +01:00
pwm FPGA PWM: wait 1 period before measurement 2019-07-25 15:18:27 +01:00
spi FPGA SPI: ASYNC issue 2019-07-25 15:18:27 +01:00
uart Test: HAL: serial: Add DEVICE_SERIAL_FC guards 2019-07-25 15:18:27 +01:00