mirror of https://github.com/ARMmbed/mbed-os.git
500 lines
18 KiB
C
500 lines
18 KiB
C
/**
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*******************************************************************************
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* @file adc.h
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* @brief This file provides all the functions prototypes for ADC driver.
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* @version V1.0.0.0
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* $Date:: 2017-09-12 13:52:12 #$
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*
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* DO NOT USE THIS SOFTWARE WITHOUT THE SOFTWARE LICENSE AGREEMENT.
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*
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* (C)Copyright TOSHIBA MICROELECTRONICS CORPORATION 2017 All rights reserved
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*******************************************************************************
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*/
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/*------------------------------------------------------------------------------*/
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/* Define to prevent recursive inclusion */
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/*------------------------------------------------------------------------------*/
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#ifndef __ADC_H
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#define __ADC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*------------------------------------------------------------------------------*/
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/* Includes */
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/*------------------------------------------------------------------------------*/
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#include "txz_driver_def.h"
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#include "adc_ch.h"
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/**
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* @addtogroup Periph_Driver Peripheral Driver
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* @{
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*/
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/**
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* @defgroup ADC ADC
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* @brief ADC Driver.
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* @{
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*/
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/*------------------------------------------------------------------------------*/
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/* Macro Definition */
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/*------------------------------------------------------------------------------*/
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/**
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* @defgroup ADC_Exported_define ADC Exported Define
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* @{
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*/
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/**
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* @defgroup ADC_ChannelMax Channel Num Max
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* @brief Max Num of channel.
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* @{
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*/
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#define ADC_NUM_MAX ((uint32_t)24) /*!< Max Num of conversion. */
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/**
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* @}
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*/ /* End of group ADC_ChannelMax */
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/**
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* @}
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*/ /* End of group ADC_Exported_define */
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/*------------------------------------------------------------------------------*/
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/* Enumerated Type Definition */
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/*------------------------------------------------------------------------------*/
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/**
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@defgroup ADC_Exported_define ADC Exported Define
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@{
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*/
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/** @enum adc_sampling_period0_t
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@brief Outside AIN sampling period.
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*/
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typedef enum
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{
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ADC_SAMPLING_PERIOD0_XN = 0x00, /*!< SCLK Period (1/SCLK)xN */
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ADC_SAMPLING_PERIOD0_X2N = 0x08, /*!< SCLK Period (1/SCLK)x2N */
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ADC_SAMPLING_PERIOD0_X3N = 0x10, /*!< SCLK Period (1/SCLK)x3N */
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ADC_SAMPLING_PERIOD0_X4N = 0x18, /*!< SCLK Period (1/SCLK)x4N */
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ADC_SAMPLING_PERIOD0_X16N = 0x28, /*!< SCLK Period (1/SCLK)x16N */
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ADC_SAMPLING_PERIOD0_X64N = 0x38, /*!< SCLK Period (1/SCLK)x64N */
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}adc_sampling_period0_t;
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/** @enum adc_sampling_period1_t
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@brief Outside AIN sampling period.
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*/
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typedef enum
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{
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ADC_SAMPLING_PERIOD1_XN = 0x000, /*!< SCLK Period (1/SCLK)xN */
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ADC_SAMPLING_PERIOD1_X2N = 0x100, /*!< SCLK Period (1/SCLK)x2N */
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ADC_SAMPLING_PERIOD1_X3N = 0x200, /*!< SCLK Period (1/SCLK)x3N */
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ADC_SAMPLING_PERIOD1_X4N = 0x300, /*!< SCLK Period (1/SCLK)x4N */
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ADC_SAMPLING_PERIOD1_X16N = 0x500, /*!< SCLK Period (1/SCLK)x16N */
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ADC_SAMPLING_PERIOD1_X64N = 0x700, /*!< SCLK Period (1/SCLK)x64N */
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}adc_sampling_period1_t;
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/*! @enum adc_sclk_t
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@brief Select AD prescaler output (SCLK).
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*/
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typedef enum
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{
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ADC_SCLK_1 = (0x00000000U), /*!< ADCLK/1 */
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ADC_SCLK_2 = (0x00000001U), /*!< ADCLK/2 */
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ADC_SCLK_4 = (0x00000002U), /*!< ADCLK/4 */
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ADC_SCLK_8 = (0x00000003U), /*!< ADCLK/8 */
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ADC_SCLK_16 = (0x00000004U), /*!< ADCLK/16 */
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}adc_sclk_t;
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/*! @enum adc_mod1_t
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@brief Select SCLK Frequency Band (MOD1).
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*/
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typedef enum
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{
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ADC_MOD1_SCLK_1 = (0x00001000U), /*!< SCLK =< 40MHz > */
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ADC_MOD1_SCLK_2 = (0x00003000U), /*!< 40MHz < SCLK =< 50MHz > */
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ADC_MOD1_SCLK_3 = (0x00004000U), /*!< 50MHz < SCLK =< 60MHz > */
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ADC_MOD1_SCLK_4 = (0x00106011U), /*!< 60MHz < SCLK =< 80MHz > */
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}adc_mod1_t;
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/*! @enum adc_mod2_t
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@brief Select ADC Product Setting Value (MOD2).
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*/
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typedef enum
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{
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ADC_MOD2_TMPM4G9 = (0x00000000U), /*!< TMPM4G9 */
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ADC_MOD2_CLEAR = (0x00000000U), /*!< Reset Value */
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}adc_mod2_t;
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/*! @enum adc_int_t
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@brief Select Interrupt Enable/Disable.
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*/
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typedef enum
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{
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ADC_INT_DISABLE = (0x00000000U), /*!< Disable. */
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ADC_INT_ENABLE = (0x00000080U), /*!< Enable. */
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}adc_int_t;
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/*! @enum adc_conversion_t
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@brief Select conversion method.
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*/
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typedef enum
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{
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ADC_CONVERSION_DISABLE = (0x00000000U), /*!< Disable. */
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ADC_CONVERSION_CNT = (0x00000100U), /*!< Continuation. */
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ADC_CONVERSION_SGL = (0x00000200U), /*!< Single. */
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ADC_CONVERSION_TRG = (0x00000300U), /*!< Universal Trigger. */
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ADC_CONVERSION_HPTG = (0x00000400U), /*!< High Priority Trigger. */
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}adc_conversion_t;
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/*! @enum adc_dma_int_t
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@brief Select DMA interrupt method.
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*/
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typedef enum
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{
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ADC_DMA_INT_SGL_DISABLE = (0x00000000U), /*!< Disable. */
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ADC_DMA_INT_SGL_ENABLE = (0x00000020U), /*!< DMA Single interrupt Enable. */
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ADC_DMA_INT_CNT_DISABLE = (0x00000000U), /*!< Disable. */
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ADC_DMA_INT_CNT_ENABLE = (0x00000040U), /*!< DMA Continuation interrupt Enable. */
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ADC_DMA_INT_TRG_DISABLE = (0x00000000U), /*!< Disable. */
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ADC_DMA_INT_TRG_ENABLE = (0x00000010U), /*!< DMA Universal Trigger interrupt Enable. */
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ADC_TRG_DISABLE = (0x00000000U), /*!< Universal Trigger Disable. */
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ADC_TRG_ENABLE = (0x00000001U), /*!< Universal Trigger Enable. */
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ADC_HPTG_DISABLE = (0x00000000U), /*!< High Priority Trigger Disable. */
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ADC_HPTG_ENABLE = (0x00000002U), /*!< High Priority Trigger Enable. */
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}adc_dma_int_t;
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/*! @enum adc_ain_range_t
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@brief Range of AIN Macro Definisiton.
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Range of AIN be set "(ADC_AIN_RANGE_MIN <= Value <= ADC_AIN_RANGE_MAX)".
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*/
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typedef enum
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{
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ADC_AIN_RANGE_MIN = (0x00000000U), /*!< Minimum Value :AINx00 */
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ADC_AIN_RANGE_MAX = (0x00000017U), /*!< Maximum Value :AINx23 */
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}adc_ain_range_t;
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/*! @enum adc_status_t
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@brief AD Running Status.
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*/
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typedef enum
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{
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ADC_STATUS_MASK = (0x00000080U), /*!< for Mask. */
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ADC_STATUS_SLEEP = (0x00000000U), /*!< Sleep. */
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ADC_STATUS_RUNNING = (0x00000080U), /*!< Running. */
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}adc_status_t;
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/*! @enum adc_cnt_status_t
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@brief Continuity Conversion Running Status.
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*/
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typedef enum
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{
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ADC_CNT_STATUS_MASK = (0x00000008U), /*!< for Mask. */
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ADC_CNT_STATUS_SLEEP = (0x00000000U), /*!< Sleep. */
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ADC_CNT_STATUS_RUNNING = (0x00000008U), /*!< Running. */
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}adc_cnt_status_t;
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/*! @enum adc_sgl_status_t
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@brief Single Conversion Running Status.
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*/
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typedef enum
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{
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ADC_SGL_STATUS_MASK = (0x00000004U), /*!< for Mask. */
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ADC_SGL_STATUS_SLEEP = (0x00000000U), /*!< Sleep. */
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ADC_SGL_STATUS_RUNNING = (0x00000004U), /*!< Running. */
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}adc_sgl_status_t;
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/*! @enum adc_trg_status_t
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@brief Trigger Conversion Running Status.
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*/
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typedef enum
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{
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ADC_TRG_STATUS_MASK = (0x00000002U), /*!< for Mask. */
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ADC_TRG_STATUS_SLEEP = (0x00000000U), /*!< Sleep. */
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ADC_TRG_STATUS_RUNNING = (0x00000002U), /*!< Running. */
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}adc_trg_status_t;
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/*! @enum adc_hpri_status_t
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@brief Trigger Conversion Running Status.
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*/
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typedef enum
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{
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ADC_HPTG_STATUS_MASK = (0x00000001U), /*!< for Mask. */
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ADC_HPTG_STATUS_SLEEP = (0x00000000U), /*!< Sleep. */
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ADC_HPTG_STATUS_RUNNING = (0x00000001U), /*!< Running. */
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}adc_hpri_status_t;
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/*! @enum adcmpxen_t
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@brief Select Enable, Disable setting(ADxCMPEN).
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*/
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typedef enum
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{
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ADCMP3EN_DISABLE = (0x00000000U), /*!< Disable. */
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ADCMP3EN_ENABLE = (0x00000008U), /*!< Enable. */
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ADCMP2EN_DISABLE = (0x00000000U), /*!< Disable. */
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ADCMP2EN_ENABLE = (0x00000004U), /*!< Enable. */
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ADCMP1EN_DISABLE = (0x00000000U), /*!< Disable. */
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ADCMP1EN_ENABLE = (0x00000002U), /*!< Enable. */
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ADCMP0EN_DISABLE = (0x00000000U), /*!< Disable. */
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ADCMP0EN_ENABLE = (0x00000001U), /*!< Enable. */
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}adcmpxen_t;
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/*! @enum adcmpcnt_t
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@brief Select Compare count num.
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*/
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typedef enum
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{
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ADCMPCNT_1 = (0x00000000U), /*!< 1 time */
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ADCMPCNT_2 = (0x00000100U), /*!< 2 times */
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ADCMPCNT_3 = (0x00000200U), /*!< 3 times */
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ADCMPCNT_4 = (0x00000300U), /*!< 4 times */
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ADCMPCNT_5 = (0x00000400U), /*!< 5 times */
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ADCMPCNT_6 = (0x00000500U), /*!< 6 times */
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ADCMPCNT_7 = (0x00000600U), /*!< 7 times */
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ADCMPCNT_8 = (0x00000700U), /*!< 8 times */
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ADCMPCNT_9 = (0x00000800U), /*!< 9 times */
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ADCMPCNT_10 = (0x00000900U), /*!< 10 times */
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ADCMPCNT_11 = (0x00000a00U), /*!< 11 times */
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ADCMPCNT_12 = (0x00000b00U), /*!< 12 times */
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ADCMPCNT_13 = (0x00000c00U), /*!< 13 times */
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ADCMPCNT_14 = (0x00000d00U), /*!< 14 times */
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ADCMPCNT_15 = (0x00000e00U), /*!< 15 times */
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ADCMPCNT_16 = (0x00000f00U), /*!< 16 times */
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}adcmpcnt_t;
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/*! @enum adcmpcond_t
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@brief Compare condition
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*/
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typedef enum
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{
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ADCMPCond_CNT = (0x00000000U), /*!< Continuous */
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ADCMPCond_ACC = (0x00000040U), /*!< Accumulation */
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}adcmpcond_t;
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/*! @enum adcmpbigsml_t
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@brief Compare Big, Small condition
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*/
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typedef enum
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{
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ADCMPBigSml_Big = (0x00000000U), /*!< Big */
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ADCMPBigSml_Sml = (0x00000020U), /*!< Small */
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}adcmpbigsml_t;
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/*! @enum adcmpstr_t
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@brief Select Compare Store register
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*/
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typedef enum
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{
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ADCMPStr_Reg0 = (0x00000000U), /*!< ADxREG0 */
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ADCMPStr_Reg1 = (0x00000001U), /*!< ADxREG1 */
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ADCMPStr_Reg2 = (0x00000002U), /*!< ADxREG2 */
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ADCMPStr_Reg3 = (0x00000003U), /*!< ADxREG3 */
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ADCMPStr_Reg4 = (0x00000004U), /*!< ADxREG4 */
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ADCMPStr_Reg5 = (0x00000005U), /*!< ADxREG5 */
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ADCMPStr_Reg6 = (0x00000006U), /*!< ADxREG6 */
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ADCMPStr_Reg7 = (0x00000007U), /*!< ADxREG7 */
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ADCMPStr_Reg8 = (0x00000008U), /*!< ADxREG8 */
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ADCMPStr_Reg9 = (0x00000009U), /*!< ADxREG9 */
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ADCMPStr_Reg10 = (0x0000000aU), /*!< ADxREG10 */
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ADCMPStr_Reg11 = (0x0000000bU), /*!< ADxREG11 */
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ADCMPStr_Reg12 = (0x0000000cU), /*!< ADxREG12 */
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ADCMPStr_Reg13 = (0x0000000dU), /*!< ADxREG13 */
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ADCMPStr_Reg14 = (0x0000000eU), /*!< ADxREG14 */
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ADCMPStr_Reg15 = (0x0000000fU), /*!< ADxREG15 */
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ADCMPStr_Reg16 = (0x00000010U), /*!< ADxREG16 */
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ADCMPStr_Reg17 = (0x00000011U), /*!< ADxREG17 */
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ADCMPStr_Reg18 = (0x00000012U), /*!< ADxREG18 */
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ADCMPStr_Reg19 = (0x00000013U), /*!< ADxREG19 */
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ADCMPStr_Reg20 = (0x00000014U), /*!< ADxREG20 */
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ADCMPStr_Reg21 = (0x00000015U), /*!< ADxREG21 */
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ADCMPStr_Reg22 = (0x00000016U), /*!< ADxREG22 */
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ADCMPStr_Reg23 = (0x00000017U), /*!< ADxREG23 */
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}adcmpstr_t;
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/*! @enum adcexazain_t
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@brief Select AIN no.
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*/
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typedef enum
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{
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ADCEXAZSEL_AIN0 = 0, /*!< AIN0 */
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ADCEXAZSEL_AIN1, /*!< AIN1 */
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ADCEXAZSEL_AIN2, /*!< AIN2 */
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ADCEXAZSEL_AIN3, /*!< AIN3 */
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ADCEXAZSEL_AIN4, /*!< AIN4 */
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ADCEXAZSEL_AIN5, /*!< AIN5 */
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ADCEXAZSEL_AIN6, /*!< AIN6 */
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ADCEXAZSEL_AIN7, /*!< AIN7 */
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ADCEXAZSEL_AIN8, /*!< AIN8 */
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ADCEXAZSEL_AIN9, /*!< AIN9 */
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ADCEXAZSEL_AIN10, /*!< AIN10 */
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ADCEXAZSEL_AIN11, /*!< AIN11 */
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ADCEXAZSEL_AIN12, /*!< AIN12 */
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ADCEXAZSEL_AIN13, /*!< AIN13 */
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ADCEXAZSEL_AIN14, /*!< AIN14 */
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ADCEXAZSEL_AIN15, /*!< AIN15 */
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ADCEXAZSEL_AIN16, /*!< AIN16 */
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ADCEXAZSEL_AIN17, /*!< AIN17 */
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ADCEXAZSEL_AIN18, /*!< AIN18 */
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ADCEXAZSEL_AIN19, /*!< AIN19 */
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ADCEXAZSEL_AIN20, /*!< AIN20 */
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ADCEXAZSEL_AIN21, /*!< AIN21 */
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ADCEXAZSEL_AIN22, /*!< AIN22 */
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ADCEXAZSEL_AIN23, /*!< AIN23 */
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}adcexazain_t;
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/*! @enum adcexazsel_t
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@brief Select sampling period, EXAS0 or EXAS1.
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*/
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typedef enum
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{
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ADCEXAZSEL_EXAZ0 = (0x00000000), /*< EXAZ0 */
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ADCEXAZSEL_EXAZ1 = (0x00000001), /*< EXAZ1 */
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}adcexazsel_t;
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/*!
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@}
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*/ /* End of group ADC_Exported_define */
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/*------------------------------------------------------------------------------*/
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/* Structure Definition */
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/*------------------------------------------------------------------------------*/
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/*!
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@defgroup ADC_Exported_typedef ADC Exported Typedef
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@{
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*/
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/*----------------------------------*/
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/*! @struct adc_clock_t
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@brief Clock information structure definenition.
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*/
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/*----------------------------------*/
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typedef struct
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{
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adc_sampling_period0_t exaz0; /*!< Outside AIN0 Sampling period.
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: Use @ref adc_sampling_period0_t. */
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adc_sampling_period1_t exaz1; /*!< Outside AIN1 Sampling period.
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: Use @ref adc_sampling_period1_t. */
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adc_sclk_t vadcld; /*!< Select AD prescaler output (SCLK).
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: Use @ref adc_sclk_t. */
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uint32_t sampling_select; /*!< Sampling period select. : bit0-bit23 */
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} adc_clock_t;
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/*----------------------------------*/
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/*! @struct adc_cmpx_t
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@brief Clock information structure definenition.
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*/
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/*----------------------------------*/
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typedef struct
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{
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uint32_t CMPEN; /*!< Enable Register status */
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uint32_t CMPCNT; /*!< Compare count num. */
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uint32_t CMPCond; /*!< Compare condition */
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uint32_t CMPBigSml; /*!< Compare Big/Small condition */
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uint32_t StrReg; /*!< Compare Store register */
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uint32_t ADComp; /*!< ADxCMP0 register data */
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void (*handle)(uint32_t id, TXZ_Result result); /*!< Notity Compare Done. */
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} adc_cmpx_t;
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/*----------------------------------*/
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/*! @struct adc_initial_setting_t
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@brief Initial setting structure definenition.
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*/
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/*----------------------------------*/
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typedef struct
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{
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uint32_t id; /*!< ID: User value. */
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adc_clock_t clk; /*!< Clock setting.
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: Use @ref adc_clock_t. */
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uint32_t mod1; /*!< AVDD3 voltage band setting.
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: Use @ref adc_mod1_t. */
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uint32_t mod2; /*!< Product info setting.
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: Use @ref adc_mod2_t. */
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adc_cmpx_t CMPxEN[4]; /*!< adc_cmpx_t. */
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} adc_initial_setting_t;
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/*----------------------------------*/
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/*! @struct adc_channel_setting_t
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@brief Channel Setting. \n
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*/
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/*----------------------------------*/
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typedef struct
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{
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uint32_t interrupt; /*!< Interrupt Enable/Disable.
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: Use @ref adc_dma_int_t. */
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uint32_t type; /*!< Conversion Type.
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: Use @ref adc_conversion_t. */
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uint32_t ain; /*!< AIN. */
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} adc_channel_setting_t;
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/*----------------------------------*/
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/*! @struct adc_internal_info_t
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@brief Driver internal information structure definenition.
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*/
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/*----------------------------------*/
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typedef struct
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{
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adc_ch_t ch[ADC_NUM_MAX]; /*!< Channel Instance. */
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} adc_internal_info_t;
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/*----------------------------------*/
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/*! @struct adc_t
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@brief ADC handle structure definenition.
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*/
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/*----------------------------------*/
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typedef struct
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{
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TSB_AD_TypeDef *p_instance; /*!< Registers base address. */
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adc_initial_setting_t init; /*!< Initial setting. */
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adc_internal_info_t info; /*!< Driver internal information. */
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struct
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{
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void (*single)(uint32_t id, TXZ_Result result); /*!< Notity Single Conversion Done. */
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void (*continuity)(uint32_t id, TXZ_Result result); /*!< Notity Continuity Conversion Done. */
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void (*trigger)(uint32_t id, TXZ_Result result); /*!< Notity Trigger Conversion Done. */
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void (*highpriority)(uint32_t id, TXZ_Result result); /*!< Notity HighPriority Conversion Done. */
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} handler; /*!< Handler structure. */
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} adc_t;
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/**
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* @}
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*/ /* End of group ADC_Exported_typedef */
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/*------------------------------------------------------------------------------*/
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/* Functions */
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/*------------------------------------------------------------------------------*/
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/**
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* @defgroup ADC_Exported_functions ADC Exported Functions
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* @{
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*/
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TXZ_Result adc_init(adc_t *p_obj);
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TXZ_Result adc_deinit(adc_t *p_obj);
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TXZ_Result adc_mode1_setting(void);
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TXZ_Result adc_channel_setting(adc_t *p_obj, uint32_t ch, adc_channel_setting_t *p_setting);
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TXZ_Result adc_channel_clear(adc_t *p_obj, uint32_t ch);
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TXZ_Result adc_cmp_init(adc_t *p_obj, adc_cmpx_t *p_cmpx_t);
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TXZ_Result adc_cmp_deinit(adc_t *p_obj, adc_cmpx_t *p_cmpx_t);
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TXZ_Result adc_channel_get_value(adc_t *p_obj, uint32_t ch, uint32_t *p_value);
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TXZ_Result adc_start(adc_t *p_obj);
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TXZ_Result adc_stop(adc_t *p_obj);
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TXZ_Result adc_get_status(adc_t *p_obj, uint32_t *p_status);
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TXZ_WorkState adc_poll_conversion(adc_t *p_obj, uint32_t timeout);
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void adc_compa_irq_handler( void );
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void adc_compb_irq_handler( void );
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void adc_single_irq_handler( void );
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void adc_continuity_irq_handler( void );
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void adc_trigger_irq_handler( void );
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/**
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* @}
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*/ /* End of group ADC_Exported_functions */
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/**
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* @}
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*/ /* End of group ADC */
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/**
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* @}
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*/ /* End of group Periph_Driver */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __ADC_H */
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