mirror of https://github.com/ARMmbed/mbed-os.git
227 lines
10 KiB
C
Executable File
227 lines
10 KiB
C
Executable File
/****************************************************************************
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*
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* Copyright 2020 Samsung Electronics All Rights Reserved.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing,
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* software distributed under the License is distributed on an
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* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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* either express or implied. See the License for the specific
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* language governing permissions and limitations under the License.
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*
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****************************************************************************/
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#ifndef _SFLASH_DRV_H
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#define _SFLASH_DRV_H
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//#include "fcache_api.h"
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#ifdef __cplusplus
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extern "C" {
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#else
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#include <stdio.h>
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#endif
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#define S5JS100_FLASH_PAGE_SIZE 256
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#define S5JS100_FLASH_BLOCK_SIZE 4096
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#define S5JS100_FLASH_PADDR (0x40000000)
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#define S5JS100_FLASH_FS_PADDR 0x40EF5000
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#define S5JS100_FLASH_FS_SIZE 256*1024
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#define S5JS100_FLASH_SIZE (16 * 1024 * 1024)
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#define S5JS100_OS_ENV_OFFSET_16MB (0x2E000)
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#define S5JS100_OS_ENV_OFFSET_8MB (0x3B000)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define S5JS100_SFLASH_BASE (0x85020000)
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#define S5JS100_SFLASH_SFCON ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x0004))
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#define S5JS100_SFLASH_ERASE_ADDRESS ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x0010))
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#define S5JS100_SFLASH_USER_COMMAND ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x0018))
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#define S5JS100_SFLASH_COMMAND1 ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x001C))
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#define S5JS100_SFLASH_COMMAND2 ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x0020))
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#define S5JS100_SFLASH_COMMAND3 ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x0024))
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#define S5JS100_SFLASH_COMMAND4 ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x0028))
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#define S5JS100_SFLASH_COMMAND5 ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x002C))
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#define S5JS100_SFLASH_USER_INSTRUCTION ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x0059))
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#define S5JS100_SFLASH_SE ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x005E))
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#define S5JS100_SFLASH_IO_MODE ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x0074))
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#define S5JS100_SFLASH_PERF_MODE ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x0078))
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#define S5JS100_SFLASH_RDID ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x00AC))
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#define S5JS100_SFLASH_BE ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x00BE))
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#define S5JS100_SFLASH_CE ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x00CE))
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#define S5JS100_SFLASH_RDSR ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x00DC))
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#define S5JS100_SFLASH_WRDI ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x00DD))
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#define S5JS100_SFLASH_WRSR ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x00E0))
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#define S5JS100_SFLASH_WREN ((volatile unsigned int *)(S5JS100_SFLASH_BASE + 0x00EE))
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/* Register Bitfield Definitions ********************************************/
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/* Control Register */
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#define SFLASH_SFCON_WP_SHIFT 31
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#define SFLASH_SFCON_WP_MASK (0x1 << SFLASH_SFCON_WP_SHIFT)
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#define SFLASH_SFCON_WP_ENABLE (0x0 << SFLASH_SFCON_WP_SHIFT)
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#define SFLASH_SFCON_WP_DISABLE (0x1 << SFLASH_SFCON_WP_SHIFT)
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#define SFLASH_SFCON_MEMORY_VENDOR_SHIFT 16
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#define SFLASH_SFCON_MEMORY_VENDOR_MASK (0x3f << SFLASH_SFCON_MEMORY_VENDOR_SHIFT)
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#define SFLASH_SFCON_MEMORY_VENDOR_WINBOND (0x20 << SFLASH_SFCON_MEMORY_VENDOR_SHIFT)
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#define SFLASH_SFCON_MEMORY_VENDOR_MACRONIX (0x10 << SFLASH_SFCON_MEMORY_VENDOR_SHIFT)
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#define SFLASH_SFCON_MEMORY_VENDOR_ATMEL (0x08 << SFLASH_SFCON_MEMORY_VENDOR_SHIFT)
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#define SFLASH_SFCON_MEMORY_VENDOR_AMD (0x04 << SFLASH_SFCON_MEMORY_VENDOR_SHIFT)
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#define SFLASH_SFCON_MEMORY_VENDOR_STMICRO (0x02 << SFLASH_SFCON_MEMORY_VENDOR_SHIFT)
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#define SFLASH_SFCON_MEMORY_VENDOR_SST (0x01 << SFLASH_SFCON_MEMORY_VENDOR_SHIFT)
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#define SFLASH_SFCON_PAGE_EN_SHIFT 15
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#define SFLASH_SFCON_PAGE_EN_MASK (0x1 << SFLASH_SFCON_PAGE_EN_SHIFT)
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#define SFLASH_SFCON_PAGE_EN_BYTEPROG (0x0 << SFLASH_SFCON_PAGE_EN_SHIFT)
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#define SFLASH_SFCON_PAGE_EN_PAGEPROG (0x1 << SFLASH_SFCON_PAGE_EN_SHIFT)
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#define SFLASH_SFCON_PAGE_SHIFT 8
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#define SFLASH_SFCON_PAGE_MASK (0xf << SFLASH_SFCON_PAGE_SHIFT)
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#define SFLASH_SFCON_PAGE_4BYTES (0x0 << SFLASH_SFCON_PAGE_SHIFT)
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#define SFLASH_SFCON_PAGE_8BYTES (0x1 << SFLASH_SFCON_PAGE_SHIFT)
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#define SFLASH_SFCON_PAGE_16BYTES (0x2 << SFLASH_SFCON_PAGE_SHIFT)
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#define SFLASH_SFCON_PAGE_32BYTES (0x3 << SFLASH_SFCON_PAGE_SHIFT)
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#define SFLASH_SFCON_PAGE_64BYTES (0x4 << SFLASH_SFCON_PAGE_SHIFT)
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#define SFLASH_SFCON_PAGE_128BYTES (0x5 << SFLASH_SFCON_PAGE_SHIFT)
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#define SFLASH_SFCON_PAGE_256BYTES (0x6 << SFLASH_SFCON_PAGE_SHIFT)
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#define SFLASH_SFCON_PAGE_RESERVED (0x7 << SFLASH_SFCON_PAGE_SHIFT)
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#define SFLASH_SFCON_HALF_DELAY_SHIFT 7
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#define SFLASH_SFCON_HALF_DELAY_MASK (0x1 << SFLASH_SFCON_HALF_DELAY_SHIFT)
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#define SFLASH_SFCON_HALF_DELAY_OFF (0x0 << SFLASH_SFCON_HALF_DELAY_SHIFT)
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#define SFLASH_SFCON_HALF_DELAY_ON (0x1 << SFLASH_SFCON_HALF_DELAY_SHIFT)
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#define SFLASH_SFCON_ERASE_WAIT_SHIFT 4
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#define SFLASH_SFCON_ERASE_WAIT_MASK (0x1 << SFLASH_SFCON_ERASE_WAIT_SHIFT)
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#define SFLASH_SFCON_ERASE_WAIT_OFF (0x0 << SFLASH_SFCON_ERASE_WAIT_SHIFT)
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#define SFLASH_SFCON_ERASE_WAIT_ON (0x1 << SFLASH_SFCON_ERASE_WAIT_SHIFT)
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#define SFLASH_SFCON_PRE_CHARGE_SHIFT 0
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#define SFLASH_SFCON_PRE_CHARGE_MASK (0xf << SFLASH_SFCON_PRE_CHARGE_SHIFT)
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/* Flash I/O Mode */
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#define SFLASH_IO_MODE_MASK 0xf
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#define SFLASH_IO_MODE_READ 0x0
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#define SFLASH_IO_MODE_FAST_READ 0x1
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#define SFLASH_IO_MODE_DUAL_FAST_READ 0x2
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#define SFLASH_IO_MODE_QUAD_FAST_READ 0x4
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/* Flash Performance Mode */
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#define SFLASH_PERF_MODE_MASK 0x8
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#define SFLASH_PERF_MODE_NORMAL 0x0
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#define SFLASH_PERF_MODE_DUAL_QUAD 0x8
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#define SFLASH_DUMMY_DATA 0x1
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#define SFLASH_SECTOR_OFFSET (12)
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#define SFLASH_BLOCK32K_OFFSET (15)
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#define SFLASH_BLOCK64K_OFFSET (16)
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#define SFLASH_SIZE_64KB (1<<SFLASH_BLOCK64K_OFFSET)
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#define SFLASH_SIZE_32KB (1<<SFLASH_BLOCK32K_OFFSET)
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#define SFLASH_SIZE_4KB (1<<SFLASH_SECTOR_OFFSET)
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#define COMMAND_ERASE_32KB (0x52)
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#define COMMAND_ERASE_64KB (0xD8)
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#define S5JS100_SFLASH_WOFFSET 0x50000000 /* FLASH Mirror Offset */
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typedef enum {
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TYPE_ERR = 0,
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TYPE_4KB = 1,
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TYPE_32KB = 2,
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TYPE_64KB = 3,
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} eERASE_UNIT;
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typedef enum {
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SFLASH_SINGLE_IO,
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SFLASH_DUAL_FAST,
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SFLASH_DUAL_IO,
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SFLASH_QUAD_FAST,
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SFLASH_QUAD_IO,
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} eQSPI_MODE;
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typedef enum {
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SFLASH_VENDOR_SST = 0x1,
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SFLASH_VENDOR_STMICRO = 0x2,
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SFLASH_VENDOR_AMD = 0x4,
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SFLASH_VENDOR_ATMEL = 0x8,
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SFLASH_VENDOR_MACRONIX = 0x10,
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SFLASH_VENDOR_WINBOND = 0x20,
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} eQSPI_VENDOR;
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typedef enum {
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SFLASH_PAGE_4BYTES = 0x0,
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SFLASH_PAGE_8BYTES = 0x1,
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SFLASH_PAGE_16BYTES = 0x2,
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SFLASH_PAGE_32BYTES = 0x3,
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SFLASH_PAGE_64BYTES = 0x4,
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SFLASH_PAGE_128BYTES = 0x5,
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SFLASH_PAGE_256BYTES = 0x6,
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} eQSPI_PAGE_SIZE;
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typedef struct _status_register_t {
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unsigned char rdsr;
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struct {
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unsigned WIP: 1;
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unsigned WEL: 1;
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unsigned BP0: 1;
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unsigned BP1: 1;
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unsigned BP2: 1;
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unsigned BP3: 1;
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unsigned QE: 1; //Quad enable
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unsigned SRWD: 1; //Status Register Write Disable
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} b;
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} sRead_Status_Register;
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typedef enum {
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SFLASH_PROTECTION_NONE = 0x0,
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SFLASH_PROTECTION_BOTTOM_256KB = 0x1, /* 0xFC0000 ~ 0xFFFFFF */
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SFLASH_PROTECTION_BOTTOM_512KB = 0x2, /* 0xF80000 ~ 0xFFFFFF */
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SFLASH_PROTECTION_BOTTOM_1MB = 0x3, /* 0xF00000 ~ 0xFFFFFF */
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SFLASH_PROTECTION_BOTTOM_2MB = 0x4, /* 0xE00000 ~ 0xFFFFFF */
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SFLASH_PROTECTION_BOTTOM_4MB = 0x5, /* 0xC00000 ~ 0xFFFFFF */
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SFLASH_PROTECTION_BOTTOM_8MB = 0x6, /* 0x800000 ~ 0xFFFFFF */
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SFLASH_PROTECTION_ALL = 0x7, /* 0x000000 ~ 0xFFFFFF */
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SFLASH_PROTECTION_TOP_256KB = 0x9, /* 0x000000 ~ 0x03FFFF */
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SFLASH_PROTECTION_TOP_512KB = 0xA, /* 0x000000 ~ 0x07FFFF */
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SFLASH_PROTECTION_TOP_1MB = 0xB, /* 0x000000 ~ 0x0FFFFF */
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SFLASH_PROTECTION_TOP_2MB = 0xC, /* 0x000000 ~ 0x1FFFFF */
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SFLASH_PROTECTION_TOP_4MB = 0xD, /* 0x000000 ~ 0x3FFFFF */
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SFLASH_PROTECTION_TOP_8MB = 0xE, /* 0x000000 ~ 0x7FFFFF */
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SFLASH_PROTECTION_BOTTOM_4KB = 0x11, /* 0xFFF000 ~ 0xFFFFFF */
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SFLASH_PROTECTION_BOTTOM_8KB = 0x12, /* 0xFFE000 ~ 0xFFFFFF */
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SFLASH_PROTECTION_BOTTOM_16KB = 0x13, /* 0xFFC000 ~ 0xFFFFFF */
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SFLASH_PROTECTION_BOTTOM_32KB = 0x14, /* 0xFF8000 ~ 0xFFFFFF */
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SFLASH_PROTECTION_TOP_4KB = 0x19, /* 0x000000 ~ 0x000FFF */
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SFLASH_PROTECTION_TOP_8KB = 0x1A, /* 0x000000 ~ 0x001FFF */
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SFLASH_PROTECTION_TOP_16KB = 0x1B, /* 0x000000 ~ 0x003FFF */
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SFLASH_PROTECTION_TOP_32KB = 0x1C, /* 0x000000 ~ 0x007FFF */
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} eQSPI_PROTECTION_AREA;
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extern void SFlash_DriverInitialize(void);
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extern int sflash_write(unsigned int addr, unsigned char *buf, int const);
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extern int sflash_erase(unsigned int addr);
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extern void sflash_os_env_parser(void);
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extern char *get_env(const char *name);
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extern int up_progmem_erasepage(unsigned int page);
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extern unsigned int up_progmem_blocksize(void);
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extern unsigned int up_progmem_write(unsigned int addr, const void *buf, unsigned int count);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _FCACHE_DRV_H */
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