mirror of https://github.com/ARMmbed/mbed-os.git
561 lines
19 KiB
C++
561 lines
19 KiB
C++
/*
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* Copyright (c) 2018 ARM Limited
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <stdio.h>
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#include "ble/driver/CordioHCIDriver.h"
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#include "hci_api.h"
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#include "hci_cmd.h"
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#include "hci_core.h"
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#include "dm_api.h"
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#include "bstream.h"
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#include <stdbool.h>
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#include "hci_mbed_os_adaptation.h"
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#include "CyH4TransportDriver.h"
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#include "platform/mbed_power_mgmt.h"
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#include "rtos/ThisThread.h"
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using namespace std::chrono_literals;
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extern const int brcm_patch_ram_length;
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extern const uint8_t brcm_patchram_buf[];
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#ifndef BT_UART_NO_3M_SUPPORT
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static const uint8_t pre_brcm_patchram_buf[] = {
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// RESET followed by update uart baudrate
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0x03, 0x0C, 0x00,
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0x18, 0xFC, 0x06, 0x00, 0x00, 0xC0, 0xC6, 0x2D, 0x00, //update uart baudrate 3 mbp
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};
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#else /* BT_UART_NO_3M_SUPPORT */
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static const uint8_t pre_brcm_patchram_buf[] = {
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// RESET cmd
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0x03, 0x0C, 0x00,
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};
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#endif /* BT_UART_NO_3M_SUPPORT */
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static const uint8_t pre_brcm_patchram_buf2[] = {
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//download mini driver
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0x2E, 0xFC, 0x00,
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};
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static const uint8_t post_brcm_patchram_buf[] = {
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// RESET cmd
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0x03, 0x0C, 0x00,
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};
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static const int pre_brcm_patch_ram_length = sizeof(pre_brcm_patchram_buf);
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static const int pre_brcm_patch_ram_length2 = sizeof(pre_brcm_patchram_buf2);
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static const int post_brcm_patch_ram_length = sizeof(post_brcm_patchram_buf);
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#define HCI_RESET_RAND_CNT 4
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#define HCI_VS_CMD_UPDATE_UART_BAUD_RATE 0xFC18
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#define HCI_VS_CMD_SET_SLEEP_MODE 0xFC27
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extern "C" uint32_t Set_GPIO_Clock(uint32_t port_idx);
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namespace ble {
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namespace vendor {
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namespace cypress {
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class HCIDriver : public CordioHCIDriver {
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public:
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HCIDriver(
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ble::vendor::cypress_ble::CyH4TransportDriver& transport_driver,
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PinName bt_power_name,
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bool ps_enabled,
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uint8_t host_wake_irq,
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uint8_t dev_wake_irq
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) : CordioHCIDriver(transport_driver),
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bt_power_name(bt_power_name),
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bt_power(bt_power_name, PIN_OUTPUT, PullUp, 0),
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is_powersave_enabled(ps_enabled),
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host_wake_irq(host_wake_irq),
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dev_wake_irq(dev_wake_irq),
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service_pack_index(0),
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service_pack_ptr(0),
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service_pack_length(0),
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service_pack_next(),
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service_pack_transfered(false),
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cy_transport_driver(transport_driver) {
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}
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virtual buf_pool_desc_t get_buffer_pool_description()
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{
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// Use default buffer pool
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return CordioHCIDriver::get_default_buffer_pool_description();
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}
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virtual void do_initialize()
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{
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//Prevent PSoC6 to enter deep-sleep till BT initialization is complete
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sleep_manager_lock_deep_sleep();
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rtos::ThisThread::sleep_for(500ms);
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bt_power = 1;
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rtos::ThisThread::sleep_for(500ms);
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}
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virtual void do_terminate() { }
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virtual void start_reset_sequence()
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{
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prepare_service_pack_transfert();
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}
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virtual void handle_reset_sequence(uint8_t *pMsg)
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{
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uint16_t opcode;
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static uint8_t randCnt;
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/* if event is a command complete event */
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if (*pMsg == HCI_CMD_CMPL_EVT) {
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/* parse parameters */
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pMsg += HCI_EVT_HDR_LEN;
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pMsg++; /* skip num packets */
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BSTREAM_TO_UINT16(opcode, pMsg);
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pMsg++; /* skip status */
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if (service_pack_transfered == false) {
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randCnt = 0;
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ack_service_pack_command(opcode, pMsg);
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return;
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}
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/* decode opcode */
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switch (opcode) {
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case HCI_VS_CMD_UPDATE_UART_BAUD_RATE:
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#ifndef BT_UART_NO_3M_SUPPORT
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cy_transport_driver.update_uart_baud_rate(DEF_BT_3M_BAUD_RATE);
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#endif /* BT_UART_NO_3M_SUPPORT */
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#ifdef CY_DEBUG
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HciReadLocalVerInfoCmd();
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#else
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set_sleep_mode();
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#endif
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break;
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#ifdef CY_DEBUG
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case HCI_OPCODE_READ_LOCAL_VER_INFO:
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uint8_t hci_version;
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uint8_t hci_revision;
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uint8_t lmp_revision;
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uint16_t manufacturer_name;
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BSTREAM_TO_UINT8(hci_version, pMsg);
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BSTREAM_TO_UINT8(hci_revision, pMsg);
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BSTREAM_TO_UINT8(lmp_revision, pMsg);
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BSTREAM_TO_UINT16(manufacturer_name, pMsg);
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if(hci_revision == 0 || manufacturer_name == 0xF)
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{
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printf("bt firmware download failed, rom code is being used\n");
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}
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else
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{
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printf("bt firmware download success\n");
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}
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set_sleep_mode();
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break;
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#endif
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// Note: Reset is handled by ack_service_pack.
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case HCI_VS_CMD_SET_SLEEP_MODE:
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HciWriteLeHostSupport();
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sleep_manager_unlock_deep_sleep();
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break;
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case HCI_OPCODE_WRITE_LE_HOST_SUPPORT:
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randCnt = 0;
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/* send next command in sequence */
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HciSetEventMaskCmd((uint8_t *) hciEventMask);
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break;
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case HCI_OPCODE_SET_EVENT_MASK:
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randCnt = 0;
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/* send next command in sequence */
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HciLeSetEventMaskCmd((uint8_t *) hciLeEventMask);
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break;
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case HCI_OPCODE_LE_SET_EVENT_MASK:
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/* send next command in sequence */
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HciSetEventMaskPage2Cmd((uint8_t *) hciEventMaskPage2);
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break;
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case HCI_OPCODE_SET_EVENT_MASK_PAGE2:
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/* send next command in sequence */
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HciReadBdAddrCmd();
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break;
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case HCI_OPCODE_READ_BD_ADDR:
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/* parse and store event parameters */
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BdaCpy(hciCoreCb.bdAddr, pMsg);
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HciLeReadBufSizeCmd();
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break;
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case HCI_OPCODE_LE_READ_BUF_SIZE:
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/* parse and store event parameters */
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BSTREAM_TO_UINT16(hciCoreCb.bufSize, pMsg);
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BSTREAM_TO_UINT8(hciCoreCb.numBufs, pMsg);
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// FixMe: The number of ACL buffer returned by the chip is
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// incorrect. If more than two ACL packets are present in
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// the controller, it may block the controller.
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// Important: The ACL overflow event is **not** reported
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// by the controller.
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hciCoreCb.numBufs = 2;
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/* initialize ACL buffer accounting */
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hciCoreCb.availBufs = hciCoreCb.numBufs;
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/* send next command in sequence */
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HciLeReadSupStatesCmd();
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break;
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case HCI_OPCODE_LE_READ_SUP_STATES:
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/* parse and store event parameters */
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memcpy(hciCoreCb.leStates, pMsg, HCI_LE_STATES_LEN);
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/* send next command in sequence */
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HciLeReadWhiteListSizeCmd();
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break;
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case HCI_OPCODE_LE_READ_WHITE_LIST_SIZE:
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/* parse and store event parameters */
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BSTREAM_TO_UINT8(hciCoreCb.whiteListSize, pMsg);
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/* send next command in sequence */
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HciLeReadLocalSupFeatCmd();
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break;
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case HCI_OPCODE_LE_READ_LOCAL_SUP_FEAT:
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/* parse and store event parameters */
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BSTREAM_TO_UINT16(hciCoreCb.leSupFeat, pMsg);
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/* send next command in sequence */
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hciCoreReadResolvingListSize();
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break;
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case HCI_OPCODE_LE_READ_RES_LIST_SIZE:
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/* parse and store event parameters */
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BSTREAM_TO_UINT8(hciCoreCb.resListSize, pMsg);
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/* send next command in sequence */
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hciCoreReadMaxDataLen();
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break;
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case HCI_OPCODE_LE_READ_MAX_DATA_LEN: {
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uint16_t maxTxOctets;
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uint16_t maxTxTime;
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BSTREAM_TO_UINT16(maxTxOctets, pMsg);
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BSTREAM_TO_UINT16(maxTxTime, pMsg);
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/* use Controller's maximum supported payload octets and packet duration times
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* for transmission as Host's suggested values for maximum transmission number
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* of payload octets and maximum packet transmission time for new connections.
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*/
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HciLeWriteDefDataLen(maxTxOctets, maxTxTime);
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} break;
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case HCI_OPCODE_LE_WRITE_DEF_DATA_LEN:
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if (hciCoreCb.extResetSeq) {
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/* send first extended command */
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(*hciCoreCb.extResetSeq)(pMsg, opcode);
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} else {
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/* initialize extended parameters */
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hciCoreCb.maxAdvDataLen = 0;
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hciCoreCb.numSupAdvSets = 0;
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hciCoreCb.perAdvListSize = 0;
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/* send next command in sequence */
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HciLeRandCmd();
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}
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break;
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case HCI_OPCODE_LE_READ_MAX_ADV_DATA_LEN:
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case HCI_OPCODE_LE_READ_NUM_SUP_ADV_SETS:
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case HCI_OPCODE_LE_READ_PER_ADV_LIST_SIZE:
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if (hciCoreCb.extResetSeq) {
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/* send next extended command in sequence */
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(*hciCoreCb.extResetSeq)(pMsg, opcode);
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}
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break;
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case HCI_OPCODE_LE_RAND:
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/* check if need to send second rand command */
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if (randCnt < (HCI_RESET_RAND_CNT-1)) {
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randCnt++;
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HciLeRandCmd();
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} else {
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uint8_t addr[6] = { 0 };
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memcpy(addr, pMsg, sizeof(addr));
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DM_RAND_ADDR_SET(addr, DM_RAND_ADDR_STATIC);
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// note: will invoke set rand address
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set_random_static_address(addr);
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}
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break;
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case HCI_OPCODE_LE_SET_RAND_ADDR:
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/* send next command in sequence */
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signal_reset_sequence_done();
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break;
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default:
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break;
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}
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}
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}
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private:
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// send pre_brcm_patchram_buf issue hci reset and update baud rate on 43012
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void prepare_service_pack_transfert(void)
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{
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service_pack_ptr = pre_brcm_patchram_buf;
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service_pack_length = pre_brcm_patch_ram_length;
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service_pack_next = &HCIDriver::prepare_service_pack_transfert2;
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service_pack_index = 0;
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service_pack_transfered = false;
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send_service_pack_command();
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}
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// Called one pre_brcm_patchram_buf has been transferred; send pre_brcm_patchram_buf2 update uart baudrate
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// on PSoC6 to send hci download minidriver
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void prepare_service_pack_transfert2(void)
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{
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#ifndef BT_UART_NO_3M_SUPPORT
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cy_transport_driver.update_uart_baud_rate(DEF_BT_3M_BAUD_RATE);
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#endif /* BT_UART_NO_3M_SUPPORT */
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service_pack_ptr = pre_brcm_patchram_buf2;
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service_pack_length = pre_brcm_patch_ram_length2;
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service_pack_next = &HCIDriver::start_service_pack_transfert;
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service_pack_index = 0;
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service_pack_transfered = false;
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send_service_pack_command();
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}
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// Called once pre_brcm_patchram_buf2 has been transferred; send brcm_patchram_buf
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void start_service_pack_transfert(void)
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{
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service_pack_ptr = brcm_patchram_buf;
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service_pack_length = brcm_patch_ram_length;
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service_pack_next = &HCIDriver::post_service_pack_transfert;
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service_pack_index = 0;
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service_pack_transfered = false;
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send_service_pack_command();
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}
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// Called once brcm_patchram_buf has been transferred; send post_brcm_patchram_buf
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void post_service_pack_transfert(void)
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{
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cy_transport_driver.update_uart_baud_rate(DEF_BT_BAUD_RATE);
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service_pack_ptr = post_brcm_patchram_buf;
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service_pack_length = post_brcm_patch_ram_length;
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service_pack_next = &HCIDriver::terminate_service_pack_transfert;;
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service_pack_index = 0;
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service_pack_transfered = false;
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rtos::ThisThread::sleep_for(1s);
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send_service_pack_command();
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}
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// Called once post_brcm_patchram_buf has been transferred; start regular initialization.
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void terminate_service_pack_transfert(void)
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{
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service_pack_ptr = NULL;
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service_pack_length = 0;
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service_pack_next = NULL;
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service_pack_index = 0;
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service_pack_transfered = true;
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#ifndef BT_UART_NO_3M_SUPPORT
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HciUpdateUartBaudRate();
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#else /* BT_UART_NO_3M_SUPPORT */
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set_sleep_mode();
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#endif /* BT_UART_NO_3M_SUPPORT */
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}
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void send_service_pack_command(void)
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{
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uint16_t cmd_len = service_pack_ptr[service_pack_index + 2];
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uint16_t cmd_opcode = (service_pack_ptr[service_pack_index + 1] << 8) | service_pack_ptr[service_pack_index + 0];
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uint8_t *pBuf = hciCmdAlloc(cmd_opcode, cmd_len);
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if (pBuf) {
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memcpy(pBuf + HCI_CMD_HDR_LEN, service_pack_ptr + service_pack_index + HCI_CMD_HDR_LEN, cmd_len);
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hciCmdSend(pBuf);
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} else {
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}
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}
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void ack_service_pack_command(uint16_t opcode, uint8_t* msg)
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{
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uint16_t cmd_opcode = (service_pack_ptr[service_pack_index + 1] << 8) | service_pack_ptr[service_pack_index + 0];
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if (cmd_opcode != opcode) {
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// DO something in case of error
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while (true);
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}
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// update service pack index
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service_pack_index += (HCI_CMD_HDR_LEN + service_pack_ptr[service_pack_index + 2]);
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if (service_pack_index < (size_t)service_pack_length) {
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send_service_pack_command();
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} else {
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(this->*service_pack_next)();
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}
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}
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void set_sleep_mode()
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{
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uint8_t *pBuf;
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if ((pBuf = hciCmdAlloc(HCI_VS_CMD_SET_SLEEP_MODE, 12)) != NULL)
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{
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if (is_powersave_on()) {
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pBuf[HCI_CMD_HDR_LEN] = 0x01; // sleep
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} else {
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pBuf[HCI_CMD_HDR_LEN] = 0x00; // no sleep
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}
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pBuf[HCI_CMD_HDR_LEN + 1] = 0x00; // no idle threshold host (N/A)
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if (is_powersave_on()) {
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pBuf[HCI_CMD_HDR_LEN + 2] = 0x05; // no idle threshold HC (N/A)
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} else {
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pBuf[HCI_CMD_HDR_LEN + 2] = 0x00; // no idle threshold HC (N/A)
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}
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if (is_powersave_on()) {
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pBuf[HCI_CMD_HDR_LEN + 3] = dev_wake_irq; // BT WAKE
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} else {
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pBuf[HCI_CMD_HDR_LEN + 3] = 0x00; // BT WAKE
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}
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if (is_powersave_on()) {
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pBuf[HCI_CMD_HDR_LEN + 4] = host_wake_irq; // HOST WAKE
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} else {
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pBuf[HCI_CMD_HDR_LEN + 4] = 0x00; // HOST WAKE
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}
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pBuf[HCI_CMD_HDR_LEN + 5] = 0x00; // Sleep during SCO
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pBuf[HCI_CMD_HDR_LEN + 6] = 0x00; // Combining sleep mode and SCM
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pBuf[HCI_CMD_HDR_LEN + 7] = 0x00; // Tristate TX
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pBuf[HCI_CMD_HDR_LEN + 8] = 0x00; // Active connection handling on suspend
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pBuf[HCI_CMD_HDR_LEN + 9] = 0x00; // resume timeout
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pBuf[HCI_CMD_HDR_LEN + 10] = 0x00; // break to host
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pBuf[HCI_CMD_HDR_LEN + 11] = 0x00; // Pulsed host wake
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hciCmdSend(pBuf);
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}
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}
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// 0x18, 0xFC, 0x06, 0x00, 0x00, 0xC0, 0xC6, 0x2D, 0x00, //update uart baudrate 3 mbp
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void HciUpdateUartBaudRate()
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{
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uint8_t *pBuf;
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if ((pBuf = hciCmdAlloc(HCI_VS_CMD_UPDATE_UART_BAUD_RATE, 6)) != NULL)
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{
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pBuf[HCI_CMD_HDR_LEN] = 0x00; // encoded_baud_rate
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pBuf[HCI_CMD_HDR_LEN + 1] = 0x00; // use_encoded_form
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pBuf[HCI_CMD_HDR_LEN + 2] = 0xC0; // explicit baud rate bit 0-7
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pBuf[HCI_CMD_HDR_LEN + 3] = 0xC6; // explicit baud rate bit 8-15
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pBuf[HCI_CMD_HDR_LEN + 4] = 0x2D; // explicit baud rate bit 16-23
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pBuf[HCI_CMD_HDR_LEN + 5] = 0x00; // explicit baud rate bit 24-31
|
|
hciCmdSend(pBuf);
|
|
}
|
|
}
|
|
|
|
static const uint16_t HCI_OPCODE_WRITE_LE_HOST_SUPPORT = 0x0C6D;
|
|
|
|
void HciWriteLeHostSupport()
|
|
{
|
|
uint8_t *pBuf;
|
|
if ((pBuf = hciCmdAlloc(HCI_OPCODE_WRITE_LE_HOST_SUPPORT, 2)) != NULL)
|
|
{
|
|
pBuf[HCI_CMD_HDR_LEN] = 0x01;
|
|
pBuf[HCI_CMD_HDR_LEN + 1] = 0x00;
|
|
hciCmdSend(pBuf);
|
|
}
|
|
}
|
|
|
|
void hciCoreReadResolvingListSize(void)
|
|
{
|
|
/* if LL Privacy is supported by Controller and included */
|
|
if ((hciCoreCb.leSupFeat & HCI_LE_SUP_FEAT_PRIVACY) &&
|
|
(hciLeSupFeatCfg & HCI_LE_SUP_FEAT_PRIVACY))
|
|
{
|
|
/* send next command in sequence */
|
|
HciLeReadResolvingListSize();
|
|
}
|
|
else
|
|
{
|
|
hciCoreCb.resListSize = 0;
|
|
|
|
/* send next command in sequence */
|
|
hciCoreReadMaxDataLen();
|
|
}
|
|
}
|
|
|
|
void hciCoreReadMaxDataLen(void)
|
|
{
|
|
/* if LE Data Packet Length Extensions is supported by Controller and included */
|
|
if ((hciCoreCb.leSupFeat & HCI_LE_SUP_FEAT_DATA_LEN_EXT) &&
|
|
(hciLeSupFeatCfg & HCI_LE_SUP_FEAT_DATA_LEN_EXT))
|
|
{
|
|
/* send next command in sequence */
|
|
HciLeReadMaxDataLen();
|
|
}
|
|
else
|
|
{
|
|
/* send next command in sequence */
|
|
HciLeRandCmd();
|
|
}
|
|
}
|
|
|
|
bool is_powersave_on(void)
|
|
{
|
|
return (is_powersave_enabled);
|
|
}
|
|
|
|
PinName bt_power_name;
|
|
mbed::DigitalInOut bt_power;
|
|
|
|
bool is_powersave_enabled;
|
|
uint8_t host_wake_irq;
|
|
uint8_t dev_wake_irq;
|
|
|
|
size_t service_pack_index;
|
|
const uint8_t* service_pack_ptr;
|
|
int service_pack_length;
|
|
void (HCIDriver::*service_pack_next)();
|
|
bool service_pack_transfered;
|
|
ble::vendor::cypress_ble::CyH4TransportDriver& cy_transport_driver;
|
|
|
|
};
|
|
|
|
} // namespace cypress
|
|
} // namespace vendor
|
|
} // namespace ble
|
|
|
|
ble::CordioHCIDriver& ble_cordio_get_hci_driver()
|
|
{
|
|
static ble::vendor::cypress_ble::CyH4TransportDriver& transport_driver =
|
|
ble_cordio_get_h4_transport_driver();
|
|
static ble::vendor::cypress::HCIDriver hci_driver(
|
|
transport_driver,
|
|
/* bt_power */ CYBSP_BT_POWER,
|
|
transport_driver.get_enabled_powersave(),
|
|
transport_driver.get_host_wake_irq_event(),
|
|
transport_driver.get_dev_wake_irq_event()
|
|
);
|
|
return hci_driver;
|
|
}
|