mirror of https://github.com/ARMmbed/mbed-os.git
405 lines
15 KiB
C
405 lines
15 KiB
C
/***********************************************************************************************//**
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* \file SDIO_HOST.h
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*
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* \brief
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* This file provides types definition, constants and function definition for
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* the SDIO driver.
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*
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***************************************************************************************************
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* \copyright
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* Copyright 2016-2020 Cypress Semiconductor Corporation
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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**************************************************************************************************/
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/**
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* \defgroup group_bsp_pin_state Pin States
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* \defgroup group_bsp_pins Pin Mappings
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* \defgroup group_bsp_macros Macros
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* \defgroup group_bsp_functions Functions
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*
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* \defgroup group_udb_sdio UDB_SDIO
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* \{
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* SDIO - Secure Digital Input Output is a standard for communicating with various
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external devices such as Wifi and bluetooth devices.
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* <p>
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* The driver is currently designed to only support communication with certain
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* Cypress Wifi and Bluetooth chipsets, it is not designed to work with a general
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* SDIO card, or even and SD card. It is only intended to be used by the WiFi
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* driver for communication.
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* <p>
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* This is not intended to be used as a general purpose API.
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*
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* \section group_udb_sdio_section_configuration_considerations Configuration Considerations
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* Features:
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* * Always Four Wire Mode
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* * Supports Card Interrupt
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* * Uses DMA for command and data transfer
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*
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* \defgroup group_udb_sdio_macros Macros
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* \defgroup group_udb_sdio_functions Functions
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* \defgroup group_udb_sdio_data_structures Data Structures
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*/
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#pragma once
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#if defined(CYHAL_UDB_SDIO)
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#include "SDIO_HOST_cfg.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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//==================================================================================================
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// API Constants
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//==================================================================================================
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/**
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* \addtogroup group_udb_sdio_macros
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* \{
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*/
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#define SDIO_CMD_TIMEOUT (100000u) /**< Value used for firmware timeout*/
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#define SDIO_DAT_TIMEOUT (500000u) /**< Value used for firmware timeout*/
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#define SDIO_DAT_BUSY_TIMEOUT_MS (500u) /**< Value used for firmware timeout*/
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#define SDIO_SRC_CLK_FREQ_HZ (10000000u) /**< Frequency of CLK_PERI*/
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#define SDIO_ENABLE_CNT (0x20u) /**< Bit to set in Aux Ctrl reg to enable 7
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bit counters*/
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/*!
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\defgroup group_sdio_cmd_constants Constants for the command channel
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*/
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/* @{*/
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#define SDIO_HOST_DIR (0x40u) /**< Direction bit set in command */
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#define SDIO_CMD_END_BIT (0x01u) /**< End bit set in command*/
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#define SDIO_NUM_CMD_BYTES (6u) /**< Number of command bytes to send*/
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#define SDIO_NUM_RESP_BYTES (6u) /**< Number of response bytes to receive*/
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/*@} group_sdio_cmd_constants */
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/*!
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\defgroup group_sdio_ctrl_reg SDIO control register bits
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*/
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/* @{*/
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#define SDIO_CTRL_INT_CLK (0x01u) /**< Enable the internal clock running the SDIO
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block*/
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#define SDIO_CTRL_SD_CLK (0x02u) /**< Enable the the SD Clock*/
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#define SDIO_CTRL_ENABLE_WRITE (0x04u) /**< Enable a write, should not be set if
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ENABLE_READ is set*/
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#define SDIO_CTRL_ENABLE_READ (0x08u) /**< Enable a read, should not be set if
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ENABLE_WRITE is set*/
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#define SDIO_CTRL_SKIP_RESPONSE (0x10u) /**< If set no response is required for the
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command*/
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#define SDIO_CTRL_RESET (0x20u) /**< If set the SDIO interface is reset*/
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#define SDIO_CTRL_RESET_DP (0x40u) /**< If set the SDIO interface is reset*/
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#define SDIO_CTRL_ENABLE_INT (0x80u) /**< Enables logic to detect card interrupt*/
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/*@} group_sdio_ctrl_reg */
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/*!
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\defgroup group_sdio_status_reg SDIO status register bits
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*/
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/* @{*/
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#define SDIO_STS_CMD_DONE (0x01u) /**< The command is done*/
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#define SDIO_STS_WRITE_DONE (0x02u) /**< All data for a write has been sent*/
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#define SDIO_STS_READ_DONE (0x04u) /**< All data for a read has been read*/
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#define SDIO_STS_CRC_ERR (0x08u) /**< A CRC error was detected during a read or
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write*/
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#define SDIO_STS_CMD_IDLE (0x10u) /**< The command channel is idle*/
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#define SDIO_STS_DAT_IDLE (0x20u) /**< The data channel is idle*/
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#define SDIO_STS_CARD_INT (0x40u) /**< The SDIO card indicated an interrupt by
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driving DAT[1] low*/
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/*@} group_sdio_status_reg */
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/*!
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\defgroup group_sdio_crc Constants for 7bit CRC for command
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*/
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/* @{*/
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#define SDIO_CRC7_POLY (0x12u) /**< Value of CRC polynomial*/
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#define SDIO_CRC_UPPER_BIT (0x80u) /**< Upper bit to test if it is high*/
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/*@} group_sdio_crc */
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/** \} group_udb_sdio_macros */
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//==================================================================================================
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// Type Definitions
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//==================================================================================================
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/**
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* \addtogroup group_udb_sdio_data_structures
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* \{
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*/
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/**
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* Create a type for the card interrupt call back
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*/
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typedef void (* sdio_card_int_cb_t)(void);
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/**
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* \brief This enum is used when checking for specific events
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*/
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typedef enum en_sdio_event
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{
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SdCmdEventCmdDone = (1u), /**< Check to see if a command is done*/
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SdCmdEventTransferDone = (2u) /**< Check to see if a transfer is done*/
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} en_sdio_event_t;
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/**
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* \brief Used to indicate the result of a function
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*/
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typedef enum en_sdio_result
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{
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Ok = 0x00, /**< No error*/
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Error = 0x01, /**< Non-specific error code*/
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CommandCrcError = 0x02, /**< There was a CRC error on the Command/Response*/
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CommandIdxError = 0x04, /**< The index for the command didn't match*/
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CommandEndError = 0x08, /**< There was an end bit error on the command*/
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DataCrcError = 0x10, /**< There was a data CRC Error*/
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CMDTimeout = 0x20, /**< The command didn't finish before the timeout period
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was over*/
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DataTimeout = 0x40, /**< The data didn't finish before the timeout period
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was over*/
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ResponseFlagError = 0x80 /**< There was an error in the response flag for command 53*/
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} en_sdio_result_t;
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/**
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* \brief Flags used to indicate an event occurred, set in the interrupt, cleared in the check
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* events function
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*/
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typedef struct stc_sdcmd_event_flag
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{
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uint8_t u8CmdComplete; /**< If non-zero a command has completed*/
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uint8_t u8TransComplete; /**< If non-zero a transfer has completed*/
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uint8_t u8CRCError; /**< If non-zero a CRC error was detected in a data
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transfer*/
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} stc_sdio_event_flag_t;
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/**
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* \brief Holds pointers to callback functions
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*/
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typedef struct stc_sdio_irq_cb
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{
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sdio_card_int_cb_t pfnCardIntCb; /**< Pointer to card interrupt callback function*/
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} stc_sdio_irq_cb_t;
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/**
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* \brief Global structure used to hold data from interrupt and other functions
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*/
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typedef struct stc_sdio_gInternalData
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{
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stc_sdio_irq_cb_t pstcCallBacks; /**< Holds pointers to all the call back functions*/
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stc_sdio_event_flag_t stcEvents; /**< Holds all of the event count flags, set in
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interrupt used in check events*/
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} stc_sdio_gInternalData_t;
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/**
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* \brief structure used for configuring command
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*/
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typedef struct stc_sdio_cmd_config
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{
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uint8_t u8CmdIndex; /**< Command index*/
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uint32_t u32Argument; /**< The argument of command */
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uint8_t bResponseRequired; /**< TRUE: A Response is required*/
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uint8_t* pu8ResponseBuf; /**< Pointer to location to store response*/
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} stc_sdio_cmd_config_t;
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/**
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* \brief structure used for the data channel
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*/
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typedef struct stc_sdio_data_config
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{
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uint8_t bRead; /**< TRUE: Read, FALSE: write*/
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uint16_t u16BlockSize; /**< Block size*/
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uint16_t u16BlockCount; /**< Holds the number of blocks to send*/
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uint8_t* pu8Data; /**< Pointer data buffer*/
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} stc_sdio_data_config_t;
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/**
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* \brief structure used for configuring command and data
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*/
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typedef struct stc_sdio_cmd
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{
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uint32_t u32CmdIdx; /**< Command index*/
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uint32_t u32Arg; /**< The argument of command*/
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uint32_t* pu32Response; /**< Pointer to location to store response*/
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uint8_t* pu8Data; /**< Pointer data buffer*/
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uint8_t bRead; /**< TRUE: Read, FALSE: write*/
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uint16_t u16BlockCnt; /**< Number of blocks to send*/
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uint16_t u16BlockSize; /**< Block size*/
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} stc_sdio_cmd_t;
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/** \} group_udb_sdio_data_structures */
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//==================================================================================================
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// Function Prototypes
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//==================================================================================================
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/**
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* \addtogroup group_udb_sdio_functions
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* \{
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*/
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// Main functions
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void SDIO_Init(stc_sdio_irq_cb_t* pfuCb);
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en_sdio_result_t SDIO_SendCommandAndWait(stc_sdio_cmd_t* pstcCmd);
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void SDIO_EnableIntClock(void);
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void SDIO_DisableIntClock(void);
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void SDIO_EnableSdClk(void);
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void SDIO_DisableSdClk(void);
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void SDIO_SetSdClkFrequency(uint32_t u32SdClkFreqHz);
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void SDIO_Reset(void);
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void SDIO_EnableChipInt(void);
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void SDIO_DisableChipInt(void);
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void SDIO_Free(void);
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// Low Level Functions
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void SDIO_SendCommand(stc_sdio_cmd_config_t* pstcCmdConfig);
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en_sdio_result_t SDIO_GetResponse(uint8_t bCmdIndexCheck, uint8_t bCmdCrcCheck, uint8_t u8CmdIdx,
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uint32_t* pu32Response, uint8_t* pu8ResponseBuf);
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void SDIO_InitDataTransfer(stc_sdio_data_config_t* pstcDataConfig);
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en_sdio_result_t SDIO_CheckForEvent(en_sdio_event_t enEventType);
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uint8_t SDIO_CalculateCrc7(uint8_t* pu8Data, uint8_t pu8Size);
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void SDIO_SetBlockSize(uint8_t u8ByteCount);
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void SDIO_SetNumBlocks(uint8_t u8BlockCount);
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// DMA setup function
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void SDIO_SetupDMA(void);
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// Interrupt Function
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void SDIO_IRQ(void);
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void SDIO_READ_DMA_IRQ(void);
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void SDIO_WRITE_DMA_IRQ(void);
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void SDIO_Crc7Init(void);
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cy_en_syspm_status_t SDIO_DeepSleepCallback(cy_stc_syspm_callback_params_t* params,
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cy_en_syspm_callback_mode_t mode);
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/** \endcond */
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/** \} group_udb_sdio_functions */
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//==================================================================================================
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// Hardware Registers
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//==================================================================================================
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/** \cond INTERNAL */
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#define SDIO_CONTROL_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_CtrlReg__CONTROL_REG)
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#define SDIO_CONTROL_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_CtrlReg__CONTROL_REG)
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#define SDIO_STATUS_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_StatusReg__STATUS_REG)
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#define SDIO_STATUS_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_StatusReg__STATUS_REG)
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#define SDIO_STATUS_INT_MSK (* (reg8*) \
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SDIO_HOST_bSDIO_StatusReg__MASK_REG)
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#define SDIO_STATUS_AUX_CTL (* (reg8 *) \
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SDIO_HOST_bSDIO_StatusReg__STATUS_AUX_CTL_REG)
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#define SDIO_CMD_BIT_CNT_CONTROL_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_cmdBitCounter__CONTROL_AUX_CTL_REG)
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#define SDIO_CMD_BIT_CNT_CONTROL_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_cmdBitCounter__CONTROL_AUX_CTL_REG)
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#define SDIO_WRITE_CRC_CNT_CONTROL_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_writeCrcCounter__CONTROL_AUX_CTL_REG)
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#define SDIO_WRITE_CRC_CNT_CONTROL_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_writeCrcCounter__CONTROL_AUX_CTL_REG)
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#define SDIO_BYTE_CNT_CONTROL_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_byteCounter__CONTROL_AUX_CTL_REG)
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#define SDIO_BYTE_CNT_CONTROL_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_byteCounter__CONTROL_AUX_CTL_REG)
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#define SDIO_CRC_BIT_CNT_CONTROL_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_crcBitCounter__CONTROL_AUX_CTL_REG)
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#define SDIO_CRC_BIT_CNT_CONTROL_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_crcBitCounter__CONTROL_AUX_CTL_REG)
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#define SDIO_DATA_BLOCK_COUNTER_A0_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_blockCounter_u0__A0_REG)
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#define SDIO_DATA_BLOCK_COUNTER_A0_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_blockCounter_u0__A0_REG)
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#define SDIO_DATA_BLOCK_COUNTER_D0_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_blockCounter_u0__D0_REG)
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#define SDIO_DATA_BLOCK_COUNTER_D0_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_blockCounter_u0__D0_REG)
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#define SDIO_DATA_BLOCK_COUNTER_A1_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_blockCounter_u0__A1_REG)
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#define SDIO_DATA_BLOCK_COUNTER_A1_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_blockCounter_u0__A1_REG)
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#define SDIO_DATA_BLOCK_COUNTER_D1_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_blockCounter_u0__D1_REG)
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#define SDIO_DATA_BLOCK_COUNTER_D1_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_blockCounter_u0__D1_REG)
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#define SDIO_CMD_COMMAND_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_CMD__F0_REG)
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#define SDIO_CMD_COMMAND_A0_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_CMD__A0_REG)
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#define SDIO_CMD_COMMAND_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_CMD__F0_REG)
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#define SDIO_CMD_RESPONSE_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_CMD__F1_REG)
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#define SDIO_CMD_RESPONSE_PTR ( (reg8 *) \
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SDIO_HOST_bSDIO_CMD__F1_REG)
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#define SDIO_DAT_WRITE_REG (* (reg16 *) \
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SDIO_HOST_bSDIO_Write_DP__F0_F1_REG)
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#define SDIO_DAT_WRITE_PTR ( (reg16 *) \
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SDIO_HOST_bSDIO_Write_DP__F0_F1_REG)
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#define SDIO_DAT_READ_REG (* (reg16 *) \
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SDIO_HOST_bSDIO_Read_DP__F0_F1_REG)
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#define SDIO_DAT_READ_PTR ( (reg16 *) \
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SDIO_HOST_bSDIO_Read_DP__F0_F1_REG)
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#define SDIO_BYTE_COUNT_REG (* (reg8 *) \
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SDIO_HOST_bSDIO_byteCounter__PERIOD_REG)
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/** \endcond */
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#if defined(__cplusplus)
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}
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#endif
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#endif // defined(CYHAL_UDB_SDIO)
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/** \} group_udb_sdio */
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