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3366 Commits (mbed-os-5.9.6)

Author SHA1 Message Date
Deepika 42b713cab2 Removed device name, till device patch is added to IAR/Keil 2018-07-27 13:30:05 -05:00
Deepika f1336c9f85 Set SAU Region present flag for M2351 device and include security header file. 
As per SAU documents, SAU is always present if the security extension is
available. The functionality differs if the SAU contains SAU regions.
If SAU regions are available it is configured with the macro __SAUREGION_PRESENT
 2018-07-27 13:30:05 -05:00
Deepika 0468bf2b6b Added xx_ticker_fire_interrupt function for M2351 device 2018-07-27 13:30:05 -05:00
Deepika 5876114f23 Use Cortex M23 specific header files and interrupts 
1. Update use of correct header files
2. Added missing entry of M2351 device in IAR defines.
3. Removed support of ARM toolchain in targets.json
 2018-07-27 13:30:04 -05:00
cyliangtw eff7974e48 Revise nu_bitutil.h for M23 2018-07-27 13:30:04 -05:00
cyliangtw a7723c4b73 Modify Nuvoton common files to avoid conflicting with master 2018-07-27 13:30:04 -05:00
cyliangtw 984576408e Add partition header file for CMSE feature 2018-07-27 13:30:04 -05:00
cyliangtw a05d449de4 Remove mbed_sdk_init_forced 1. mbed_sdk_init is called before C++ global obj constructor in OS 5 2. Refine startup file with GCC_ARM toolchain related to this modification. 2018-07-27 13:30:04 -05:00
cyliangtw 7208455b8f remove progen, not used any more 2018-07-27 13:30:04 -05:00
cyliangtw e1a9492e75 Support __vector_table instead of __vector_handlers in IAR 2018-07-27 13:30:04 -05:00
cyliangtw db10dc0207 Support GCC & IAR toolchain 2018-07-27 13:30:04 -05:00
cyliangtw d67d32d3af Sync SDH_CardDetection type to avoid GCC compiler error 2018-07-27 13:30:04 -05:00
cyliangtw 949c330229 Add one new target M2351, regard as M0+ with some V8M CPU control at first 2018-07-27 13:30:04 -05:00
Steven Cooreman f86bb29914 Add EFM32GG11_STK3701 support 2018-07-27 13:29:55 -05:00
bcostm f1550aea7a stm32 lpuart: enable lse and hsi if not done 2018-07-15 22:54:26 -05:00
jeromecoutant ddc39b33b9 STM32 LPTICKER with LPTIM minor update 
Code cleaning (L0 Cube update, comment precision)
 2018-07-15 22:54:26 -05:00
Naveen Kaje 9b224fe98f NRF52832 linker script: formatting fix 2018-07-15 22:54:26 -05:00
Naveen Kaje 31db58a6a4 Fix linker script for NRF52840/ARM 2018-07-15 22:54:26 -05:00
Martin Kojtal 3950834e51 Raytac: target removal 
No files to build - should not be in targets
Reverts part of the https://github.com/ARMmbed/mbed-os/pull/6178
 2018-07-15 22:54:25 -05:00
Mirela Chirica e900d42cdf Cellular: HSI set to be source clock for WISE_1570 2018-07-15 22:53:58 -05:00
Marcus Chang 5b3f54f0ef Fix linker script for NRF52840/IAR 
Add missing noinit section.
 2018-07-15 22:53:58 -05:00
Marcus Chang c94bab0e6b Allow STDIO pins to be NC in NRF52 series 
Prevent ASSERT from triggering when one of the STDIO pins is not
connected.
 2018-07-15 22:53:45 -05:00
jeromecoutant e95291858c STM32 RTC : bypass shadow registers 
- RTC_SSR for the subseconds
- RTC_TR for the time
- RTC_DR for the date

These registers were accessed through shadow registers which are synchronized with PCLK1 (APB1 clock).
They are now accessed directly in order to avoid waiting for the synchronization duration.
 2018-07-15 22:53:45 -05:00
bcostm 9f73ba13e9 stm32 ticker: change th eplace where timer init in done, fix overflow issue with 16-bit timer 
- Move back the 16/32bit timer initialization in HAL_InitTick() and not in us_ticker_init()
- Use ticker_read_us() and us_ticker_read() in HAL_GetTick() to fix potential overflow issue with the 16bit timer

==> These corrections allow timer, rtc, sleep, tick tests to PASS
 2018-07-15 22:53:45 -05:00
bcostm fcad2a6f0a stm32 ticker: corrections in order to pass tests 2018-07-15 22:53:45 -05:00
bcostm d3e35ab118 stm32 ticker: typo corrections 2018-07-15 22:53:45 -05:00
bcostm ccb538562f stm32 ticker: change license 2018-07-15 22:53:45 -05:00
bcostm 9a480e3260 stm32 ticker: rename hal_tick.h in us_ticker_data.h 2018-07-15 22:53:45 -05:00
bcostm 92fe07f02f stm32 ticker: rename macro and update ST HAL Tick functions 
- rename TIM_MST_16BIT in TIM_MST_BIT_WIDTH in order to use it directly in ticker info structure
- change HAL_InitTick() and HAL_GetTick()
 2018-07-15 22:53:45 -05:00
bcostm 609ade7130 stm32 ticker: rename files and move functions 
- rename hal_tick_common.c in hal_tick_overrides.c
- move 16 and 32bits timer functions in us_ticker.c
 2018-07-15 22:53:45 -05:00
Karl Zhang 7474daea2d Flash API: Enable Flash api on CM3DS 
Implement flash_api.c for CM3DS on MPS2+.
Because MPS2+ board has no physical flash chip, the implementation emulates
flash over SRAM.
 2018-07-15 22:53:45 -05:00
Marcus Chang e44efbb68e Change NRF52 series UART to only use one SWI channel 
This fixes conflicts with the SoftDevice.
 2018-07-15 22:53:45 -05:00
Marcus Chang 542d7841cb Fix inconsistent SWI configuration in NRF52 series 
All SWI channels except SWI0 is being used by the SoftDevice and
not only SWI1.
 2018-07-15 22:53:45 -05:00
Marcus Chang a2e7424063 Remove white space in config files for NRF52 series 2018-07-15 22:53:45 -05:00
Kimmo Vaisanen 4deeb4c18b Disable LSE for MTB_USI_WM_BN_BM_22 
Current MTB_USI_WM_BN_BM_22 modules do not have OSC32_IN connected, so
external xtal is not in use.
 2018-07-15 22:53:45 -05:00
bcostm 0f9a956799 save/restore timer registers before/after deepsleep 2018-07-15 22:53:31 -05:00
bcostm c6ad478492 Use elapsed time only for 16bit timer 2018-07-15 22:53:31 -05:00
bcostm f2d824adb4 Re-enable IT CC1 after deepsleep 2018-07-15 22:53:31 -05:00
bcostm 5bfabde855 HAL_GetTick returns elapsed time 2018-07-15 22:53:31 -05:00
bcostm 878ce6f72a Use us_ticker_read while SDK is not ready 2018-07-15 22:53:31 -05:00
Mahesh Mahadevan fa73e7db49 MXRT1050: Ensure the pins are in input mode for analogin 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-15 22:53:31 -05:00
ccli8 98b0621377 Change PLL clock source to HIRC instead of HXT 
This change is to reduce delay of wake-up from power-down to pass Greentea test.
Because HIRC's accuracy is worse than HXT's, we must switch back to HXT for e.g. USBD application.
This can be done through setting NU_CLOCK_PLL to NU_HXT_PLL.
 2018-07-15 22:53:31 -05:00
Mahesh Mahadevan 94a36b5a01 MIMXRT1050_EVK: Move clock enable after check of pin 
Enable clock could return an error if pin is NC

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-15 22:53:31 -05:00
Mahesh Mahadevan d8f9c98590 MIMXRT1050_EVK: Fix the GPIO IRQ number assignements 
Use the GPIO_Combined IRQ array

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-15 22:53:31 -05:00
Mika Leppänen 6cc1de13eb Modified Wiced drivers EMAC instance get 
Removed EMAC get_default_instance() since WLAN drivers are not default EMAC drivers.
Moved EMAC static declaration inside get_instance().
 2018-07-15 22:53:31 -05:00
Marcus Chang dc297a3d0e Fix target definition for NRF52 series 
* Removed RTC, NRF52840 doesn't support RTC API.
 * Reorganized DEVICE_HAS order for NRF52832.
 2018-07-15 22:53:31 -05:00
Marcus Chang 7b7d9ccca6 Fix interrupt initialization for NRF52 series 
In some cases the UARTE interrupt would be enabled with pending
interrupts. This commit ensures that interrupts are only enabled
from a known state.
 2018-07-15 22:53:31 -05:00
jeromecoutant b77da51c2f DISCO STM32L4 : Add TWO_RAM_REGIONS macro 2018-07-15 22:53:31 -05:00
PHST 9d1b292e8f Make clock source changeable over mbed_app.json 
By adding the missing include the clock source for EFM32-Targets is changeable over mbed_app.json.
 2018-07-15 22:53:31 -05:00
bcostm 57762fbab8 DISCO_L496AG: update LEDs comments in PeripheralPins.c 2018-07-15 22:53:30 -05:00
bcostm 1c26b2efc2 DISCO_L496AG: change LED1 and LED2 pins 2018-07-15 22:53:30 -05:00
Mahesh Mahadevan 8cb0baf73b LPC546XX: Fix UART mux setting in the LPCXpresso board 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-15 22:53:30 -05:00
ccli8 e80622b60d Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-07-15 22:53:19 -05:00
ccli8 70a1e3ab1e Remove special handling for dummy interrupt in lp_ticker 
It is because dummy interrupt is very rare or pending time caused by it
is very short.
 2018-07-15 22:53:19 -05:00
ccli8 afe5c7d4af Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-07-15 22:53:19 -05:00
ccli8 acef3f6375 Fix trap in lp_ticker ISR with non-blocking "clear interrupt flag" 2018-07-15 22:53:19 -05:00
ccli8 e20d259ddf Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-07-15 22:53:19 -05:00
ccli8 6e808c7668 Reduce blocking code in lp_ticker 
1. Introduce S/W interrupt enable/disable to reduce calls to TIMER_EnableInt/TIMER_DisableInt.
2. Allow dummy interrupt because clear interrupt flag is not synchronized.
3. Enable LPTICKER_DELAY_TICKS to make lp_ticker_set_interrupt non-blocking.
 2018-07-15 22:53:19 -05:00
ccli8 3034630f20 Adjust static/dynamic memory allocation for IAR toolchain to pass Greentea test 2018-07-15 22:53:03 -05:00
ccli8 3bacccb42f Fix CLK_Idle incorrectly enters into deep sleep mode 
This can happen with CLK_PowerDown() called first and then CLK_Idle() called.
 2018-07-15 22:53:03 -05:00
ccli8 95d0e51fce Meet new lp_ticker HAL spec (Mbed OS 5.9) 
1. Add LPTICKER in device_has option of targets.json file.
2. Disable ticker interrupt in lp_ticker_init
3. Add lp_ticker_free
4. Enable interrupt in lp_ticker_set_interrupt
 2018-07-15 22:53:03 -05:00
ccli8 ae68c9a707 Meet new us_ticker HAL spec (Mbed OS 5.9) 
1. Add USTICKER in device_has option of targets.json file.
2. Disable ticker interrupt in us_ticker_init
3. Add us_ticker_free
4. Enable interrupt in us_ticker_set_interrupt
 2018-07-15 22:52:48 -05:00
Marcus Chang 6166005eaa Fix typo in NRF52 series README.md 
UART configuration parameters mispelled.
 2018-07-15 22:48:50 -05:00
Marcus Chang e409f48bba Fix race condition in serial_api.c for NRF52 series 
* Elevate RTC2 interrupt priority to same level as UARTE to prevent
race condition on shared variables.
* Remove unused TXDRDY event code.
* Fix typo in macro.
 2018-07-15 22:48:50 -05:00
bcostm 21fe483b71 astyle 2018-07-15 22:48:50 -05:00
bcostm ca4fd714a1 STM32: add lpuart_clock_source config 
Keep same clock configuration as done before this PR (LSE and PCLK1).
Use a JSON file to change it.
 2018-07-15 22:48:50 -05:00
Przemyslaw Stekiel 126bf17ff4 NRF_52840: Fix us ticker counter size 
It has been noticed that there is a problem with us ticker on NRF_52840 board after 32 bit counter has been used for us ticker on NRF52 family boards.
Currently NRF52 symbol is defined only for MCU_NRF52832 (not for MCU_NRF52840) and based on this symbol 16 or 32 bit counter is selected (16 bit for NRF51 family and 32 for NRF52 family).
Since MCU_NRF52840 defines NRF52840_XXAA and provides 32 bit counters, 32 bit counter should be selected also when NRF52840_XXAA symbol is defined.
 2018-06-29 17:11:50 +01:00
jeromecoutant 6eb564f434 STM32 serial RX/TX active patch 
In serial_tx_active and serial_rx_active functions,
we check the internal state value with

HAL_UART_STATE_BUSY_TX = 0x21U,
HAL_UART_STATE_BUSY_RX = 0x22U,

It seems that value can also be :
HAL_UART_STATE_BUSY_TX_RX = 0x23U,
 2018-06-29 17:11:50 +01:00
jeromecoutant 77cb1ccc03 TARGET_STM32L4 astyle 2018-06-29 17:11:50 +01:00
jeromecoutant 2e54baa03d TARGET_STM32L1 astyle 2018-06-29 17:11:50 +01:00
jeromecoutant 91e7db00a6 TARGET_STM32L0 astyle 2018-06-29 17:11:50 +01:00
jeromecoutant 7fa433d75d TARGET_STM32F7 astyle 2018-06-29 17:11:50 +01:00
jeromecoutant b6cbec8a30 TARGET_STM32F4 astyle 2018-06-29 17:11:50 +01:00
jeromecoutant f5830bf143 TARGET_STM32F3 astyle 2018-06-29 17:11:50 +01:00
jeromecoutant b3292e2b2a TARGET_STM32F2 astyle 2018-06-29 17:11:50 +01:00
jeromecoutant 56975a54fe TARGET_STM32F1 astyle 2018-06-29 17:11:50 +01:00
jeromecoutant a4970221bf TARGET_STM32F0 astyle 2018-06-29 17:11:50 +01:00
jeromecoutant 91c3b4dc8f TARGET_STM astyle 2018-06-29 17:11:50 +01:00
Kari Haapalehto f01cd413fa Cleaning MTB_USI_WM_BN_BM_22, MTB_ADV_WISE_1530 and MTB_MXCHIP_EMW3166 targets These wiced targets are not supported at mbed-os 2 release, so removing "2" from release_versions. LWIP feature flag removed, since it isn't needed anymore. EMAC removed from device_has_add, since it isn't needed with these targets. "network-default-interface-type": "WIFI" has been added. 2018-06-29 17:11:50 +01:00
Marcus Chang 00a0c81217 Improve serial performance for NRF52 series 
Time sensitive user callbacks are called through lowest priority
SWI handlers instead of the highest priority UART handler.
 2018-06-29 17:10:17 +01:00
Marcus Chang f4aa4ff082 Make serial_putc non-blocking for the NRF52 series 
Previous implementation would block until character had been
completely sent, which is not what the API specifies.
 2018-06-29 17:10:17 +01:00
Marcus Chang e2ab561e3d Remove whitespace from NRF52 serial_api.c 2018-06-29 17:10:17 +01:00
Boting Ren 5570782b04 fix LED_RED mapping on NUCLEO_F429ZI 2018-06-29 17:10:17 +01:00
TomoYamanaka 8528353acc Modify RAM size definition of ARMCC for GR-LYCHEE 
I modified RAM size of ARMCC compiler for GR-LYCHEE.
In case of GR-LYCHEE, RAM size is 3M Byte(including Non-Cache area), but there was a typo at MACRO definition.
 2018-06-29 17:10:17 +01:00
TomoYamanaka 16f09712ee Support Bootloader for GR-PEACH and GR-LYCHEE 
The mainly changes is below:
- Update scatter file, linker file for bootloader support
- Update the file for RZ/A1 serial flash boot loader
- Add "device name" and "bootloader_supported" in targets.json
 2018-06-29 17:10:17 +01:00
TomoYamanaka a08c3ec5db Support Flash iAP for GR-PEACH and GR-LYCHEE 
The mainly changes is below:
- Add flash_api.c
- Add the definition of SPI multi I/O Bus controller that is used for flash access
- Add "FLASH" as device feature
- Add the macro regarding information of the incorporated Flash
- Add the processing to expand code to RAM
 2018-06-29 17:10:17 +01:00
Kari Haapalehto b955eb7e49 Add binary drivers for MTB_USI_WM_BN_BM_22 and MTB_ADV_WISE_1530 2018-06-29 17:10:17 +01:00
Mahesh Mahadevan f3207adac1 MIMXRT1050: Update to EVK Rev B 
1. Add the IVT header to the binary as this is required for boot up
   This was earlier added by the DAPLink firmware. As it is no longer
   handled in DAPLink, the header needs to be added inside mbed.
2. Update drivers

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-06-29 17:10:17 +01:00
aqib nasim 27a5e47b8e adding USTICKER label for C027 2018-06-29 17:10:17 +01:00
Melvin van den berg 4d84c0329c - Fixed coding style - Set default pull mode to PullNone in gpio_irq_init 2018-06-29 17:10:17 +01:00
Melvin van den berg f59655629e Fixed broken InterruptIn.mode() in NRF5x target which didn't do anything: interruptIn always remained with pullup resistor enabled. 2018-06-29 17:10:17 +01:00
Marcus Chang 4a5e6a9d7d Fix SPI initialization for NRF52 series 
New changes to Mbed error reporting in 5.9 exposed bug in SPI
driver where an instance was uninitialized twice which triggered
an ASSERT.

This fix keeps track of which instance has been initialized and
only calls uninit when it is safe.
 2018-06-29 17:10:17 +01:00
Przemyslaw Stekiel 6048944f98 us_ticker_set_interrupt: fix bit-shift operation 2018-06-29 17:10:17 +01:00
Przemyslaw Stekiel 6b9f91a519 Use lp_ticker.c for NRF51 and NRF52 boards 2018-06-29 17:10:17 +01:00
Przemyslaw Stekiel b3de87b62e Use common_rtc.h for NRF51 and NRF52 boards 2018-06-29 17:10:17 +01:00
Przemyslaw Stekiel 1f0f9c2257 NRF5x: Increase lp us ticker interrupt priority 
Set the second highest user level, leaving the highest for UART (we are having constant overflows) and two levels below for everything else.
This should increase the timer accuracy.
 2018-06-29 17:10:17 +01:00
Przemyslaw Stekiel 1e49e4d45c NRF5x: Add bug fix for the first timer read. 
It has been noticed that first read value can not be trusted.
 2018-06-29 17:10:17 +01:00
Przemyslaw Stekiel d6b7367bac Use common us_ticker.c for NRF51 and NRF52 boards 2018-06-29 17:10:17 +01:00
Przemyslaw Stekiel 80b100eef5 NRF51, NRF52: Implement us_ticker_free() function. 2018-06-29 17:10:17 +01:00
Przemyslaw Stekiel 9ecbc5b02b common_rtc_set_interrupt: Wrap <ticks_count> before comparisons 
RTC counter is 24-bit. Upper layer handles counter size and wraps ticks count when interrupt is to be fired before passing it to common_rtc_set_interrupt(), but for consistency and safety reasons we can wrap it again in the NRF driver.
 2018-06-29 17:10:17 +01:00
Przemyslaw Stekiel 97b4f65216 NRF5x: Remove duplicate lp ticker initialization from I2C, flash, trng. 2018-06-29 17:10:17 +01:00
Przemyslaw Stekiel ae5848e29a NRF52_DK: Use 32 bit counter for us ticker (instead 16 bit counter) 2018-06-29 17:10:17 +01:00
Qinghao Shi fa8ceef3bb add comments about TIMER modes and set TIMER2 off by default 2018-06-29 17:10:17 +01:00
Qinghao Shi e23bde94ac change us_ticker_inited to static 2018-06-29 17:10:17 +01:00
Qinghao Shi 341f4b45e3 add disable interrupt function in us_ticker_free() 2018-06-29 17:10:17 +01:00
Qinghao Shi e6c3ad43bb update us_ticker driver and revert CMSDK headers changes 2018-06-29 17:10:17 +01:00
Qinghao Shi 537afa388c Enable new HAL us_ticker API on fast model MPS2 platform 2018-06-29 17:10:17 +01:00
Kari Haapalehto 1b18393b21 Add binary drivers for MTB_MXCHIP_EMW3166 2018-06-29 17:10:17 +01:00
Laurent MEUNIER 207dbb2ee2 STM32: Reduce HAL_deepsleep stack usage 
There are cases where a call hal_deepsleep would overflow the idle task
stack, especially in developper or debug profile.

In order to avoid this case, we split ForceClockOutofDeepSleep
into two separate functions the two structure RCC_ClkInitStruct and
RCC_OscInitStruct are not allocated at the same time.
 2018-06-29 17:10:17 +01:00
bcostm 9cd91a6868 fix hash alignment of F2, F7, L4 2018-06-29 17:10:17 +01:00
Mika Leppänen 787ea51bad K64F, K66F: Update the ENET PHY driver 
PHY init and autonegotation is split into own functions.
 2018-06-29 17:10:17 +01:00
Seppo Takalo 0b7e21a793 Provide default WiFi interface for Ublox EVK ODIN W2 2018-06-29 17:10:17 +01:00
Seppo Takalo e858b98073 Provide default WiFI interface for REALTEK_RTL8195AM 2018-06-29 17:10:17 +01:00
David Saada 38e8ac4617 Rename text region in ARM linker file for a few NXP CPUs 2018-06-29 17:10:17 +01:00
Juho Eskeli 5dcd26503a Make MTB_ADV_WISE_1570 respect MBED_APP_START & enable bootloader 2018-06-29 17:10:17 +01:00
Keyur Hariya a7b8ccc65d Rename files to fix warning 
"aes.c" file name conflict in Maxim platform and mbedtls.
 2018-06-29 17:10:17 +01:00
bcostm de5985b4da Remove text related to channel2 2018-06-29 17:10:17 +01:00
bcostm 4094ebc8a6 Add comments for HAL_InitTick function 2018-06-29 17:10:17 +01:00
Edmund Hsu de135d727a Enable COG boards flash algo 2018-06-29 17:10:17 +01:00
Edmund Hsu 6e9d1ac78d Enable COG boards instruction cache 2018-06-29 17:10:17 +01:00
Mahesh Mahadevan fa42c72f90 LPC54628: Update the ADC clock divider based on the input clock source 
1. Problems were seen on the LPC54628 as the ADC clock source was too
   high
2. Moved the pin configuration to set Analog mode to the end of the
   function

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-06-29 17:10:17 +01:00
Maciej Bocianski cecd0c3171 NRF52_DK: SLEEP enable 2018-06-29 17:10:17 +01:00
Mika Leppänen a784da9fd1 Added EMAC configuration for UBLOX_C027 2018-06-15 13:34:21 +01:00
Mika Leppänen b744b50dca Ported NXP LPCxx ethernet driver to unified EMAC 2018-06-15 13:34:21 +01:00
David Saada 688268328d Fix flash_program_page API in LPC boards. 
This API allocates a program buffer of 256 on the stack to ensure alignment.
However, FlashIAP driver already ensures this alignment of the user data.
 2018-06-15 13:30:56 +01:00
Yoshihiro TSUBOI b3ebb5229a Changed suggested points 
Changed accessibility cellular features member functions, fixed minor target issues
 2018-06-15 13:30:56 +01:00
ytsuboi 4b1d0875b7 Adding platform 2018-06-15 13:30:56 +01:00
Przemyslaw Stekiel b49aa213d2 K64F CRC driver: Fix coding style 2018-06-15 13:30:56 +01:00
Przemyslaw Stekiel 904e3f05a7 K64F CRC driver: Fix handling of CRC final XOR value 
According to the test results final XOR was incorrectly handled by the CRC driver.
This patch fixes this issue.
 2018-06-15 13:30:56 +01:00
Przemyslaw Stekiel fcaf166bf4 K64F CRC driver: hal_crc_is_supported() - fix condition which validates CRC width 
It looks like the intention was to return false when CRC width is different than: {16, 32} bits.
 2018-06-15 13:30:56 +01:00
Przemyslaw Stekiel 07773fe312 STM CRC driver: hal_crc_compute_partial() - validate input paramaters. 2018-06-15 13:30:56 +01:00
Michael Coulter 8fbdaa9bd2 Fixes for RZ_A1H issue 6543 Removed debugging code, fixed errors indicated in the comments. 2018-06-15 13:30:56 +01:00
Kari Haapalehto 9f8321fb16 Fix data aligment problem at STM32F4 hash write 2018-06-15 13:30:56 +01:00
jeromecoutant 01fe512daa STM32 ETH : remove TX RX locking interrupt perforation 2018-06-15 13:30:56 +01:00
jeromecoutant 7c0f54cc16 Dual Bank Flash support update 2018-06-15 13:30:56 +01:00
bcostm 9be9d97b06 Add support of Flash dual bank mode on DISCO_F769NI 2018-06-15 13:30:56 +01:00
bcostm fb639a47e2 Add support of Flash dual bank mode on NUCLEO_767ZI 2018-06-15 13:30:56 +01:00
bcostm 9e915556a7 Add license 2018-06-15 13:30:56 +01:00
bcostm 8b7e62bf65 Remove HAL_TICK_DELAY (no more used) 2018-06-15 13:30:56 +01:00
bcostm 075e445036 Cleanup 
- Remove calls to HAL_SuspendTick and HAL_ResumeTick
- Rename stm_common.c in hal_tick_common.c
 2018-06-15 13:30:56 +01:00
bcostm 869b47ddb3 Remove code related to timer channel 2 2018-06-15 13:30:56 +01:00
bcostm f3ea877f3a Replace HAL_GetTick 2018-06-15 13:30:56 +01:00
Vincent Coubard b80471a005 Nordic: Fix nrf sections on ARMCC 
The nrf section features has different implementations for each compilers supported by mbed-os. The header guard was ruling out compiler other than GCC by checking if __GNUC__ is defined. This check is not applicable on mbed os as the ARM compiler compile sources with gnu compatibility.

This patch makes sure that the right implementation is selected for the right compiler . The previous patch has been reverted as it is not reliable.
 2018-06-15 13:30:56 +01:00
Andrew Leech 5d751dfb8f Move mbed_lib.json from targets folder to feature_ble folder The functionality added all affects BLE features in use so this location is a better fit. 2018-06-15 13:30:56 +01:00
Andrew Leech 4dc172b875 Expose softdevice configurations via new nordic-ble library definition file 2018-06-15 13:30:56 +01:00
jeromecoutant 00e3e4165f STM32 : few targets does not support LPTICKER 2018-06-15 13:30:56 +01:00
Andrew Leech 2ba88ba8f6 Redirect NRF asserts to mbed error() in TARGET_NRF5x and SDK 14.2 Add related details to TARGET_NRF5x Readme's 2018-06-15 13:30:56 +01:00
Andrew Leech cee87d9cef Comment out the assert test that requires non-existent symbols from linker 2018-06-15 13:30:56 +01:00
Andrew Leech 5759e17a85 Only enable DEBUG_NRF_USER when NDEBUG is not set 2018-06-15 13:30:56 +01:00
Andrew Leech 2615631a4b Address known typo in nrf sdk 11 
ref: https://devzone.nordicsemi.com/f/nordic-q-a/14000/nrf_drv_adc-c-doesn-t-compile-with--ddebug_nrf
 2018-06-15 13:30:56 +01:00
Andrew Leech 97ba13b773 Enable ASSERTS's in nrf sdk to catch coding errors. 
These will now flow through to mbed standard error handling.
 2018-06-15 13:30:56 +01:00
jeromecoutant 87c14d3659 DISCO_F413ZH : pin value error 2018-06-15 13:30:56 +01:00
jeromecoutant f2901a42c3 DISCO_F413ZH : map SPI3 to WIFI module 2018-06-15 13:30:56 +01:00
jeromecoutant f1f2bb4df4 STM32L4 ADC internal channels update 2018-06-15 13:30:56 +01:00
jeromecoutant 587c6d9e60 STM32L1 ADC internal channels update 2018-06-15 13:30:56 +01:00
jeromecoutant 720a5b6cd4 STM32L0 ADC internal channels update 2018-06-15 13:30:56 +01:00
jeromecoutant 11817b7db3 STM32F7 ADC internal channels update 2018-06-15 13:30:56 +01:00
jeromecoutant a95bdd8caf STM32F3 ADC internal channels update 2018-06-15 13:30:56 +01:00
jeromecoutant aa84af280c STM32F2 ADC internal channels update 2018-06-15 13:30:56 +01:00
jeromecoutant 525eb1ec6e STM32F1 ADC internal channels update 2018-06-15 13:30:56 +01:00
jeromecoutant 08d8df33c6 STM32F0 ADC internal channels update 2018-06-15 13:30:56 +01:00
jeromecoutant c4698a5bde STM32F4 ADC internal channels update 2018-06-15 13:30:56 +01:00
Alan Chuang 467a994bc7 make uart console port configurable via mbed_app.json 2018-06-15 13:30:56 +01:00
Karl Zhang da400af894 FPGAIO: Add MISC IO initialization support 2018-06-15 13:30:56 +01:00
ccli8 9ab170483f Fix RTC cannot cross reset cycle 2018-06-15 13:30:56 +01:00
ccli8 3eaaf65203 Add back RTC to device_has target configuration 2018-06-15 13:30:56 +01:00
ccli8 d2e415871b Power down RTC access from CPU domain in rtc_free 
After rtc_free, RTC gets inaccessible from CPU domain but keeps counting.
 2018-06-15 13:30:56 +01:00
TomoYamanaka 875c0ebdad Fix redeclaration of type name "bool_t" 
I fixed redeclaration of type name "bool_t" for target Renesas because this typedef has been defined in rtx_core_ca.h by #6273.
 2018-06-15 13:30:56 +01:00
Marcus Chang 28060c1b63 Fix array overflow in gpio configuration code for NRF5x 
Reintroduce PR #6021

https://github.com/ARMmbed/mbed-os/pull/6021

which was accidentally removed by PR #6711

https://github.com/ARMmbed/mbed-os/pull/6711
 2018-06-15 13:30:56 +01:00
amq a87d40396f EFM32: make mbed_rtx.h depend of families instead of targets 2018-06-15 13:30:56 +01:00
Steven 31ef22180c EFM32 IRQ handling fix 
* IRQ handling got updated previously to a non-functional state when both callbacks were registered (it'd fire a fall callback for both rise and fall events). With this update, that faulty behaviour is corrected. Due to delays between the detection of the edge and the handling of the interrupt (and the fact that information about which edge you received on the pin is not stored anywhere), there is no way to be absolutely sure which edge got triggered on the pin. Therefore, we make a best-guess effort by looking at the pin state at the time of IRQ handling, and fire a callback as if that was the end state of the event. This will usually work out fine, except in cases were the signal is toggling faster than the IRQ handler's response time. In that case, a user won't get both callbacks (as expected for a pulse), but only the last event.
* Stripped some dead code.
 2018-06-15 13:30:56 +01:00
Steven 41e08d7232 Fix to flash API on EFM32 
* Since mbed does not overwrite itself, make the flashing routines run out of flash by default
* Report a writeable size of 4 bytes (previously erroneously reported a full eraseable page as the minimum write size)
 2018-06-15 13:30:56 +01:00
Steven 6207b90726 Update pinout of TB_SENSE_12 to production revision 
* Updated pinout of EXP header from pre-production to production
* Move assignment of PF7 to SPI_2 to be compatible with the new SPI flash routing
 2018-06-15 13:30:56 +01:00
PHST 40de17a345 EFM32PG12_STK3402 - Correct wrong Expansion header Pin naming 
Referencing to "UG257: EFM32 Pearl Gecko PG12 Starter Kit User's Guide - Chapter 4" (https://www.silabs.com/documents/public/user-guides/ug257-stk3402-usersguide.pdf) it should be like in this commit.
 2018-06-15 13:30:56 +01:00
Vincent Coubard 3fc2d33946 Nordic FIX: place observers sequentially in flash. 2018-06-05 15:05:18 +01:00
Wilfried Chauveau 998b4b8f0a us_ticker is not yet initialised at this stage 2018-06-05 15:05:18 +01:00
Bartek Szatkowski a1ff22d439 Disable FLASH algo for AD boards 2018-05-27 23:31:20 -05:00
Bartek Szatkowski dc6ad34994 Disable FLASH for AD boards as they fail the tests intermittently 2018-05-27 23:31:20 -05:00
Bartek Szatkowski 1224b3894d Disable RTC on MAX32630FTHR due to failing tests 2018-05-27 23:31:20 -05:00
Bartek Szatkowski 195ef38618 Fix missmatch between targets.son 2018-05-25 13:59:04 -05:00
Jesse Marroquin 11d418b749 mbed-os v5.9 RTC implementation 2018-05-25 13:06:56 -05:00
Bartek Szatkowski 7624a6625c Sleep was not ported to MAX32630FTHR 2018-05-25 13:06:56 -05:00
Bartek Szatkowski 7dbd025ba1 NRF52 is not compatible with new RTC HAL spec 2018-05-25 13:06:56 -05:00
Bartek Szatkowski a305d849a8 Rename LOWPOWERTIMER to LPTICKER 2018-05-25 13:06:56 -05:00
Martin Kojtal e1fc81dc41 max32600: fix lp ticker functions - do not inline 
Wrong linkage specified, causing build to fail.
 2018-05-25 13:04:23 -05:00
Martin Kojtal 73de4e6e48 efm32: remove unused undefined function from rtc 2018-05-25 13:04:23 -05:00
Martin Kojtal 6781ee88cd maxim: fix rtc if lp ticker not defined 
lp ticker handler defined only if lp ticker is defined. In case not,
use only overflow, rtc0 not used.
 2018-05-25 13:04:23 -05:00
Bartek Szatkowski 9b53c1e9e1 Fix target definition for Odin boards 2018-05-25 13:04:23 -05:00
Edmund Hsu e2fe49d403 Preserve RTC counter value while re-initialization 2018-05-25 13:04:23 -05:00
Edmund Hsu 8d670001f2 Remove trailing spaces of adi_rtc.c 2018-05-25 13:04:23 -05:00
Edmund Hsu dbebc71d95 ADI: Re-enable DEVICE_RTC for EV_COG_AD3029LZ and EV_COG_AD4050LZ 2018-05-25 13:04:23 -05:00
Mahesh Mahadevan f7c6e555f3 MCUXpresso: Enable RTC on LPC54114 and LPC546XX 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 13:03:46 -05:00
Mahesh Mahadevan a17cf07a35 MCUXpresso: Enable RTC support 
Same MCUXpresso SDK driver used for Kinetis devices

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 13:03:16 -05:00
Bartek Szatkowski 2826e4e416 Disable platforms not supporting new RTC 2018-05-25 13:01:19 -05:00
Steven Cooreman 81e6c96014 Code style fixes requested by @0xc0170 
Tests still passing
 2018-05-25 12:59:19 -05:00
Steven Cooreman 4b3bde1082 Re-implement RTC for Silicon Labs targets 
mbed RTC specifications now dictate that the RTC needs to retain and keep on counting through reset. On Silicon Labs parts, this means the RTC API can not be backed by the Silicon Labs RTC peripheral, since that doesn't provide retention functionality.
Therefore:
* On EFM32GG, EFM32WG, EFM32LG: mbed RTC API is now backed by BURTC.
* On EFM32PG, EFR32MG, EFM32PG12, EFR32MG12: mbed RTC API is now backed by RTCC.
* On EFM32ZG, EFM32HG: mbed RTC API is sadly no longer supported, since these chips don't have retained memory.
 2018-05-25 12:57:30 -05:00
TomoYamanaka f55becef9a Implement of RTC feature for Renesas mbed boards 
I implemented the RTC feature.
The mainly changing is here.
- rtc_init()
  Previously, I have initialized the time information register in the function, so the time count was cleaned by every calling rtc_init().
  Currently, rtc_init() doesn't stop RTC from counting, and rtc_init() is safe to call repeatedly.
  Therefore in order to satisfy specifications,I removed the initialization process of the time information register in the function.

- rtc_free()
  Previously, I have initialized the RTC related register same as rtc_init(), so the time count was cleaned by calling rtc_free().
  Currently, rtc_free() doesn't stop RTC from counting.
  Therefore in order to satisfy specifications,I removed the process and decided not to do anything in the function.
  If powerdown the RTC, Supply of the clock to the RTC is stopped, cannot keeping the count.
 2018-05-25 12:53:06 -05:00
Przemyslaw Stekiel 1e46895f75 K64F: adapt RTC drivers to the new standards (is_enabled function) 
Make rtc_isenabled() to return 1 if the RTC is initialized and the time has been set; 0 otherwise.
Disable clock gate on exit from this function if RTC was initialized.
 2018-05-25 12:52:40 -05:00
Przemyslaw Stekiel 377db73100 K64F: adapt RTC drivers to the new standards (free function) 
rtc_free() does not stop the RTC from counting. Only disables clock gate since processor no longer needs to read RTC registers.
 2018-05-25 12:52:40 -05:00
Przemyslaw Stekiel 4fc3d07bd0 Enable RTC support for K64F board. 2018-05-25 12:52:39 -05:00