`handle_error` calls `MBED_CALLER_ADDR()`, but this is always a location from within platform/mbed_error.c. This is because `handle_error` is declared static. This does not cause the function to be inlined however. Instead, it is called by each function within mbed_error.c. For example, mbed_error yields this code:
```
000625c8 <mbed_error>:
625c8: b510 push {r4, lr}
625ca: 460c mov r4, r1
625cc: 4611 mov r1, r2
625ce: 461a mov r2, r3
625d0: 9b02 ldr r3, [sp, #8]
625d2: f7ff feff bl 623d4 <handle_error>
625d6: b968 cbnz r0, 625f4 <mbed_error+0x2c>
625d8: 4620 mov r0, r4
625da: f7ff ff67 bl 624ac <print_error_report.constprop.0>
625de: f7ff fea8 bl 62332 <core_util_is_isr_active>
625e2: b910 cbnz r0, 625ea <mbed_error+0x22>
625e4: f7ff fe9f bl 62326 <core_util_are_interrupts_enabled>
625e8: b908 cbnz r0, 625ee <mbed_error+0x26>
625ea: bf30 wfi
625ec: e7fd b.n 625ea <mbed_error+0x22>
625ee: 2001 movs r0, #1
625f0: f000 f948 bl 62884 <__wrap_exit>
625f4: 4800 ldr r0, [pc, #0] ; (625f8 <mbed_error+0x30>)
625f6: bd10 pop {r4, pc}
625f8: 80ff010f .word 0x80ff010f
```
Note that at `625d2` there is a bl to handle error. That replaces the LR, which means that ALL calls to mbed_error will report a location of 0x625d6 or 0x625d7 (user vs. supervisor). I do not expect that this was the intention of the code. The simplest fix is to change line 99:
```C
static inline mbed_error_status_t handle_error(mbed_error_status_t error_status, unsigned int error_value, const char *filename, int line_number)
```
Since `handle_error()` will be inlined, the link register will be kept the same, so `MBED_CALLER_ADDR()` will yield the expected result. However, there is no guarantee that the compiler will respect the `inline` keyword in all circumstances.
The result is that each function that wishes to report its caller must extract its caller. This code cannot be centralised.
I have modified `mbed_error.c` to report the caller of each error reporting function, rather than the error reporting function itself.
I added the powerdown func by GIC in mbed_application because Cortex-A9 use GIC instead of NVIC.
This process prevent unexpected interrupt when updating software by using bootloader.
I added the process for Cortex-A in mbed_application.c because this process was for only Cortex-M.
Also I enabled the macro of MBED_APPLICATION_SUPPORT for Cortex-A.
With "mov r2, #0", compile OK with GCC_ARM, but failed with ARMC6.
With "ldr r2, =0", compile OK with ARMC6, but failed with GCC_ARM.
Finally, with "movw r2, #0"/"movt r2, #0", compile OK with both ARMC6 and GCC_ARM.
The errno.h header file defines the type error_t, unfortunately this
is a common type name that may be defined in user code. For at least GCC
we can work around this by telling errno that the error_t is already
defined.
Unfortunately, some toolchains don't define the same errno codes that
are used fairly consistently on Linux based platforms, which means they
also don't match the errno codes used in the retarget layer.
If a user includes errno.h after mbed.h, the errno codes can be
redefined incorrectly.
Adding an include of errno.h in mbed.h forces the order to be fixed.
CPUID base register is available for Cortex-M processors only.
Cortex-A devices have Main ID Register, which can be used in future to
get processor info.
adbridge
Cruz Monrreal II
Brendan Moran
ccli8
Senthil Ramakrishnan
Deepika
TomoYamanaka
Martin Kojtal
Bartek Szatkowski
Christopher Haster