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1236 Commits (mbed-os-5.8.5)

Author SHA1 Message Date
bcostm a000474b89 F3 ST CUBE V1.9.0: remove pcd patch 
The Lock field is no more available in PCD structure.
 2018-05-18 12:37:11 +01:00
bcostm 65e66b98a6 F3 ST CUBE V1.9.0: fix build errors with legacy macros 2018-05-18 12:37:11 +01:00
bcostm 2b80c5ff00 F3 ST CUBE V1.9.0 2018-05-18 12:37:11 +01:00
Paul Thompson 8fe8f0e04f Drop locking around TX and RX. The DMA channels are independent of each other 2018-05-18 12:37:11 +01:00
Jammu Kekkonen 716d646285 Add bootloader support for NUCLEO_F411RE target 2018-05-04 12:22:29 +01:00
jeromecoutant 4ec0bc693f STM32 RTC Init minor update 2018-05-04 12:22:29 +01:00
bcostm 1be48dc5f6 L0 ST CUBE V1.10.0: change adc sampling time 2018-05-04 12:22:29 +01:00
bcostm bd54fa4b10 L0 ST CUBE V1.10.0: spi and i2c corrections 2018-05-04 12:22:29 +01:00
bcostm f5aa8b33dc L0 ST CUBE V1.10.0 2018-05-04 12:22:29 +01:00
jeromecoutant d9f97502f4 STM32L4 : correct compilation warnings 2018-04-20 15:31:55 +01:00
jeromecoutant cc5b9575c5 STM32L1 : correct compilation warnings 2018-04-20 15:31:55 +01:00
jeromecoutant 8fb7cbe041 STM32L0 : correct compilation warnings 2018-04-20 15:31:55 +01:00
jeromecoutant 452dbbc538 STM32F7 : correct compilation warnings 2018-04-20 15:31:55 +01:00
jeromecoutant 3fdee88dc6 STM32F4 : correct compilation warnings 2018-04-20 15:31:55 +01:00
jeromecoutant d5054250b6 STM32F3 : correct compilation warnings 2018-04-20 15:31:55 +01:00
jeromecoutant 48a56ba898 STM32F2 : correct compilation warnings 2018-04-20 15:31:55 +01:00
jeromecoutant 7e68d28904 STM32F1 : correct compilation warnings 2018-04-20 15:31:55 +01:00
jeromecoutant ad99b88d5d STM32F0 : correct compilation warnings 2018-04-20 15:31:55 +01:00
Paul Thompson 9a2b701a75 STM32 : correct compilation warnings 2018-04-20 15:31:55 +01:00
Kari Haapalehto 684671ce69 Add new target MTB_ADV_WISE_1530. 
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 includes same usi chip,
so common USI_WM_BN_BM_22 target has been created.
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 are inheting the common usi target
 2018-04-20 15:31:55 +01:00
Paul Thompson e9d510b26f Extend changes to other STM32 devices that have the PCD_WriteEmptyTxFifo() function 2018-04-20 15:31:55 +01:00
Paul Thompson 59e09ed988 Make the atomic_clr_u32 conditional use raw values rather than computed, remove need for guards 2018-04-20 15:31:55 +01:00
Paul Thompson fe2d60a0ae Drop usage of ilen, just use len and cast it to int32_t as appropriate 2018-04-20 15:31:55 +01:00
Paul Thompson 7166aa7baf Revert to original fix concentrating on type correctness 2018-04-20 15:31:55 +01:00
Paul Thompson d224665519 Initial work was for unsigned-signed comparison fix. Current work fixes negative number issues 
Compile: stm32f7xx_hal_pcd.c
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c: In function 'PCD_WriteEmptyTxFifo':
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1310:11: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if (len > ep->maxpacket)
           ^
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1325:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     if (len > ep->maxpacket)
             ^
 2018-04-20 15:31:55 +01:00
Wilfried Chauveau 12eaf402c9 add ADC_AN0-2 mapped on PA_0-2 2018-04-20 15:31:55 +01:00
Jimmy Brisson 0e49953dc3 Correct armc6 detection logic 2018-04-20 15:31:55 +01:00
Laurent MEUNIER 49468021e0 Style fix 2018-04-20 15:31:55 +01:00
Laurent MEUNIER 55f1851199 Add delay to let clock stabilize when out of deep sleep 
Tests have shown that there is hich-up on MSI clock during the setup phase.
If this stabilization phase happens when application has restarted again
this can have side effects, like grambled UART characters typically.

So we're adding a delay before hading-over back to application.

With this modification, on NCULEO_L476RG, the wake-up time is increased
from 2ms to 2,5ms.
If possible this should be improved in the future to save 500 microseconds
of wak-up time.  See TODO
 2018-04-20 15:31:55 +01:00
Laurent MEUNIER ad411b99f8 Use temporarily MSI or HSI when exiting Deep Sleep 
There are cases where HW registers are found in unpexcepted state when
exiting Deep Sleep only few micro-seconds after it was entered.

By using an internal clock that does not depend on anythin and clocking
the system without using PLL, this allows SetSysClock default configuration
to run fine whatever possible configuration we find the HW in when
exiting Deep Sleep.

Also we shall restore interrupts only after all cloks are back to
expected running state.
 2018-04-20 15:31:55 +01:00
Ashok Rao 4dbd77a166 Remove irrelevant comments 2018-04-20 15:31:55 +01:00
Ashok Rao bb56e152d3 Adding USI WM-BN-BM-22 as a new target 2018-04-20 15:31:55 +01:00
bcostm 6d8cb38aad Update stm32l151xba.h 2018-04-09 15:00:48 +01:00
bcostm e513e64e42 STM32L1: allow redefinition of FLASH_SIZE macro 2018-04-09 15:00:48 +01:00
bcostm 97676e40cd Fix typos causing ARM build error 2018-04-09 15:00:48 +01:00
bcostm 54045323fc L1 ST CUBE V1.8.1 2018-04-09 15:00:48 +01:00
Wilfried Chauveau 14558c6793 add IAR to the supported toolchain 2018-04-09 15:00:48 +01:00
Wilfried Chauveau c9e37d984e switch to stm32l151cb-a & work around flash size field width. 2018-04-09 15:00:48 +01:00
Wilfried Chauveau 9602e1d2ec add RF_TXCO_EN on PH1 and set HSI calibration to its default value 2018-04-09 15:00:48 +01:00
Wilfried Chauveau 14892d9f1d add support for the RAK811 2018-04-09 15:00:48 +01:00
jeromecoutant 0b866b7d29 STM32L4 ADC correct internal channel management 2018-03-26 18:52:24 +01:00
jeromecoutant c9a727e1a5 STM32L4 ADC Internal Channel : correct sampling time 2018-03-26 18:52:24 +01:00
bcostm c5650d847a NUCLEO_L433RC_P: fix LEDs pin assignment 2018-03-26 18:52:24 +01:00
jeromecoutant f2db21f71d STM32 LPTICKER : optimize RTC wake up timer init 
Division in a while loop is removed
 2018-03-26 18:52:24 +01:00
bcostm b33c5240a6 DISCO_L496AG: add entry in mbed_rtx.h 2018-03-26 18:52:24 +01:00
bcostm ed63943fc4 DISCO_L496AG: add system clock file (same as Nucleo) 2018-03-26 18:52:24 +01:00
bcostm 1bbcd08dc3 DISCO_L496AG: add other pins related files 2018-03-26 18:52:24 +01:00
bcostm 615ac588a4 DISCO_L496AG: remove QSPI2 
Base adress not found in registers map file but found in CubeMX xml file.
 2018-03-26 18:52:24 +01:00
bcostm b4ac1a5a03 DISCO_L496AG: add PeripheralPins.c 2018-03-26 18:52:24 +01:00
jeromecoutant 322fe96440 STM32 RTC init 
When LSE is configured for RTC, LSI is not affected
 2018-03-26 18:52:24 +01:00