Commit Graph

714 Commits (mbed-os-5.5.4)

Author SHA1 Message Date
lordguilly f148046ad8 Change HSE for blupill,can only be XTAL
The BLUEPILL board does have XTAL soldered, cannot be used with an external oscillator
2017-07-28 14:46:26 +01:00
Deepika 84d14ee788 Closed review comments
1. Doxygen and Grammar related
2. Change dummy to spi_fill
3. Remove NXP driver and add default loop in spi block read (same as all
other drivers)
2017-07-28 14:46:22 +01:00
jeromecoutant 82176e16ee NUCLEO_F767ZI : boot issue with GCC 2017-07-28 14:46:21 +01:00
jeromecoutant 653b0e9499 STM32 I2C : correct async issue 2017-07-28 14:46:21 +01:00
jeromecoutant a8461992c3 STM32F0 : remove unavailable pins
Pins used for STDIO_UART_TX and STDIO_UART_RX are not available
2017-07-28 14:46:20 +01:00
jeromecoutant 7f9f279ef3 DISCO_L475VG_IOT: remove unavailable pins 2017-07-28 14:46:20 +01:00
jeromecoutant 70c5407697 STM32L4 AnalogIn init issue with _ALT pins 2017-07-28 14:46:20 +01:00
Laurent MEUNIER 5c652685e0 STM32: Serial - use TXE as tx_irq instead of TC
TXE indicates that a byte can be written to UART register for sending,
while TC indicates that last byte was completely sent. So the TXE flag
can be used in case of interrupt based Serial communication, to allow
faster and efficient application buffer emptying.

Also TXE flag will be erased from the interrupt when writing to register.
In case there is nothing to write in the register, the application is
expected to disable the interrupt.
2017-07-28 14:46:19 +01:00
Laurent MEUNIER 603188986b STM32: Serial - do no clear RXNE flag
The RXNE flag is getting cleared when reading Data Register so it should
not be cleared here. Especially in case of high data rate, another byte of
data could have received during irq_handler call and clearing the flag
would read and discard this data which would be lost for application.
2017-07-28 14:46:19 +01:00
Bradley Scott 8697d92e91 STM32: Remove i2c_read() and i2c_write() redirects to HAL_I2C_IsDeviceReady()
Some I2C devices require specific zero length read/write sequences which
the HAL_I2C_IsDeviceReady() redirect interferes with.  After Removing
these redirects, it was confirmed that zero length reads and writes
would both still work correctly for detecting presence/absence of an
I2C device on a bus.
2017-07-28 14:46:18 +01:00
jeromecoutant 605562f382 STM32L4 : json clock source configuration
- default value is the same as before patch
- system_stm32l4xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
- nvic_addr.h file is now in TARGET_STM level
2017-07-28 14:46:16 +01:00
jeromecoutant 254fb39838 STM32L1 : json clock source configuration
- default value is the same as before patch
- system_stm32l1xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-28 14:46:16 +01:00
jeromecoutant 36431bda95 STM32L0 : json clock source configuration
- default value is the same as before patch
- system_stm32l0xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-28 14:46:16 +01:00
jeromecoutant c659a0dfc3 STM32F7 : json clock source configuration
- default value is the same as before patch
- system_stm32f7xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-28 14:46:16 +01:00
jeromecoutant 9a41fd72ad STM32F3 : json clock source configuration
- default value is the same as before patch
- system_stm32f3xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-28 14:46:16 +01:00
jeromecoutant f3ce2751d8 STM32F2 : json clock source configuration
- default value is the same as before patch
- system_stm32f2xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-28 14:46:16 +01:00
jeromecoutant 93e16788d8 STM32F1 : json clock source configuration
- default value is the same as before patch
- system_stm32f1xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-28 14:46:16 +01:00
jeromecoutant 2bf0882adf STM32F0 : json clock source configuration
- default value is the same as before patch
- system_stm32f0xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-28 14:46:15 +01:00
andreas.larsson 11c34533e9 Remove redundant ODIN-W2 target folder 2017-07-28 14:46:15 +01:00
Rob Meades 5c4178ef03 UBLOX_C030: correct UART 3 Tx & Rx pins (they were the wrong way around) and add the flow control lines for UART 3. 2017-07-28 14:46:15 +01:00
Jimmy Brisson f7ad960cad Correct DAC pin assignment 2017-07-28 14:46:15 +01:00
bcostm 1015105b24 STM: cleanup mbed_rtx.h file 2017-07-28 14:46:14 +01:00
Laurent MEUNIER 933d7b55b3 Fix alignement 2017-07-28 14:46:14 +01:00
Laurent MEUNIER 7384257bfc STM32: Store and restore rising falling config of gpio_irq
Now that rising / falling edge detection is disabled in the
gpio_irq_disable function, we also need to restore it when gpio_irq_enable
gets called.
2017-07-28 14:46:14 +01:00
Laurent MEUNIER f939edc323 STM32: Raise error in case of spurious interrupt
In case we've run through the entire GPIOs loop, withouth finding a
matching interrupt, we're in the case of a spurious interrupt, let's
raise an error to track it down.
2017-07-28 14:46:14 +01:00
Laurent MEUNIER b9a4ae2d04 STM32 Fuly disable GPIO irq settings
When disabling GPIO irq, also the falling / rising edge settings need
to be reset (EXTI_RTSR and EXTI_FTSR registers).

If not reset, the same EXTI line can be later enabled again with a wrong
Rising / Falling configuration. This was especially seen and reported in
ci-test tests-api-interruptin on NUCLEO_F446RE target where DIO2=PA_10 and
DIO6=PB_10 were successively tested: as they are sharing the same EXTI_LINE
(EXTI_10), this resulted in calling the irq_handler with wrong
IRQ_FALL/IRQ_RAISE parameter and donothing being called in loop.
2017-07-28 14:46:14 +01:00
Brad Perry 5c74203b10 Fixing the problem where the CAN is initialized to the wrong frequency at startup regardless of the value set in the constructor. Issue #3863 2017-07-28 14:46:14 +01:00
Chris 901246173f Tidy from rebase 2017-07-28 14:46:14 +01:00
Chris c8b0692fbb Code tidy 2017-07-28 14:46:14 +01:00
Chris 8c3a5fd17b Incorrect comments removed. 2017-07-28 14:46:13 +01:00
Chris a2852e7b91 GCC Bootloader support 2017-07-28 14:46:13 +01:00
Chris adb6246336 IAR Bootloader support 2017-07-28 14:46:13 +01:00
Chris b5ce1d2325 uArm Bootloader support 2017-07-28 14:46:13 +01:00
Chris 9ee4ab49e7 Formatting tidy up. 2017-07-28 14:46:13 +01:00
Chris df779909e1 added missing FLASH_FLAG_OPTVERR 2017-07-28 14:46:13 +01:00
Chris db5f6790fe clear additional flags on erase to prevent errors 2017-07-28 14:46:13 +01:00
Chris 4b4c70fdcd GCC_ARM VTOR fixed, doesnt fit in the bootloader region though.. 2017-07-28 14:46:13 +01:00
Chris 229e19f4be VTOR bootloader aware Attempt to add flash API but not working properly 2017-07-28 14:46:13 +01:00
Chris 7e1ce93f3d added flash algorithm 2017-07-28 14:46:13 +01:00
Chris 5e23ff2809 initial commit of xDot bootloader 2017-07-28 14:46:12 +01:00
adustm 47b81255c6 Replase CMSIS flash driver by SDK flash driver 2017-07-14 15:51:14 +01:00
adustm 03aa77a700 Allow UBLOX to use SDK flash driver 2017-07-14 15:49:07 +01:00
adustm 0b9855ebc7 Rebase: 0d1c6c2d34
This commit completely rewrote flash_api.c in a few places so kicked out changes from Master and accepted the branch changes.

F429 + F439 : changes after code review
GetSector has been rewritten
2017-07-14 15:48:51 +01:00
adustm 5b0dbbd780 Rebase of: dfd0cf63e9
fix STM32F439 flash HAL
2017-07-14 15:47:57 +01:00
adustm 5ea3730ed2 Rebase of: cb3907ef70
typo in flash_s struct
2017-07-14 15:43:56 +01:00
bcostm 6d0badf8f8 NUCLEO_F429ZI: comments corrections 2017-07-14 15:13:31 +01:00
bcostm 99f87ab93c DISCO_F429ZI: Typo correction 2017-07-14 15:13:31 +01:00
bcostm 1e8ba708f3 NUCLEO_F429ZI: Add alternate pins and enable all pins 2017-07-14 15:13:31 +01:00
bcostm be5ae8b409 DISCO_F429ZI: Typo corrections + add missing ALT pins 2017-07-14 15:13:31 +01:00
bcostm 4615906e4c DISCO_F429ZI: Add missing ADC alternate pins 2017-07-14 15:13:31 +01:00