Commit Graph

5731 Commits (mbed-os-5.14.1)

Author SHA1 Message Date
adbridge a4715aab32 "Update secure binaries for ARM_MUSCA_A1_S (ARMC6)" 2019-10-16 13:00:44 +01:00
adbridge 455bb9ec68 "Update secure binaries for LPC55S69_S (ARMC6)" 2019-10-16 12:31:35 +01:00
adbridge 070269295f Add OKDO platform
Manually ported from PR11407
2019-10-16 12:10:38 +01:00
jeromecoutant 19b641bb66 STM32L151: update calibration memory address 2019-10-16 11:58:32 +01:00
jeromecoutant 82f2b72777 DISCO_L4R9I: update default STMOD+ pin 2019-10-16 11:58:32 +01:00
Kyle Kearney 1dc74090a7 Add target for CY8CPROTO-063-BLE 2019-10-16 11:58:32 +01:00
Kyle Kearney 65e726eb9e Fix possible negative QSPI alt count on STM
Remove an extraneous decrement operation in cases where the alt
bits size is a multiple of 8.
2019-10-16 11:58:32 +01:00
Matthew Macovsky 08a2709993 Allow for arbitrary QSPI alt sizes
The QSPI spec allows alt to be any size that is a multiple of the
number of data lines. For example, Micron's N25Q128A uses only a
single alt cycle for all read modes (1, 2, or 4 bits depending on
how many data lines are in use).
2019-10-16 11:58:32 +01:00
Chun-Chieh Li 03affe94d8 Remove TRNG support
Reasons to remove TRNG support:
1.  M252 just has 32KiB SRAM and cannot afford mbedtls application.
2.  Implementing TRNG HAL with PRNG H/W has security concern.
2019-10-16 11:58:32 +01:00
Chun-Chieh Li 14e9683d4d Add BSD-3-Clause license for BSP files 2019-10-16 11:58:32 +01:00
Chun-Chieh Li 2136567b7a Free up peripheral pins in peripheral free-up HAL API
Without free-up of peripheral pins, peripheral pins of the same peripheral may
share by multiple ports after port iteration, and this peripheral may fail with
pin interference.
2019-10-16 11:58:32 +01:00
Chun-Chieh Li f761fe7eb1 Support GPIO input pull-high/pull-low
In Nuvoton, only new-design chips support GPIO input pull-high/pull-low modes.
Targets not supporting this feature are listed below:

- NUMAKER_PFM_NANO130
- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M453
2019-10-16 11:58:32 +01:00
Chun-Chieh Li 07eb503cf1 Fix redundant call to UART IRQ handler
Honor RxIrq/TxIrq to avoid redundant call to UART IRQ handler.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-uart.
2019-10-16 11:58:32 +01:00
Chun-Chieh Li a3197f3ec9 Fix redundant SPI clock generation
Fix SPI clocks are generated redundantly at the end of transfer.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-spi/
SPI - async mode.
2019-10-16 11:58:32 +01:00
Chun-Chieh Li 7f29545a57 Fix I2C NACK error
Fix logic error on replying NACK at the end of transfer.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-i2c/
i2c - test single byte read i2c API.
2019-10-16 11:58:32 +01:00
Chun-Chieh Li a5b7048668 Fix IP initialization sequence
Better IP initialization sequence:
1. Configure IP pins
2. Select IP clock source and then enable it
3. Reset the IP (SYS_ResetModule)

NOTE1: IP reset takes effect regardless of IP clock. So it doesn't matter if
       IP clock enable is before IP reset.
NOTE2: Non-configured pins may disturb IP's state, so IP pinout first and then
       IP reset.
NOTE3: IP reset at the end of IP initialization sequence can cover unexpected
       situation.
2019-10-16 11:58:32 +01:00
Chun-Chieh Li 3cdf84d943 Exclude USB UART from testing
USB UART is dedicated to USB COM and so must exclude from FPGA CI testing.
2019-10-16 11:58:32 +01:00
Chun-Chieh Li a56db3697d Force enum PinName to 32-bit
NU_PINNAME_BIND(...) requires enum PinName to be 32-bit to encode module
binding information in it.
2019-10-16 11:58:32 +01:00
Chun-Chieh Li 7245474e40 Add 'sectors' target configuration parameter 2019-10-16 11:58:32 +01:00
Chun-Chieh Li b6a29934e8 Enlarge LPTICKER_DELAY_TICKS for safe
On Nuvoton targets, lp_ticker_set_interrupt(...) needs around 3 lp-ticker
ticks to take effect. It may miss when current tick and match tick are very
close (see hal/LowPowerTickerWrapper.cpp). Enlarge LPTICKER_DELAY_TICKS to
4 from 3 to address this boundary case.
2019-10-16 11:58:32 +01:00
Chun-Chieh Li 7c48b44488 Enlarge required deep sleep latency
This configuration is to pass wake-up from deep-sleep test such as mbedmicro-rtos-mbed-systimer.
2019-10-16 11:58:32 +01:00
Chun-Chieh Li 9b6edba26c Override mpu-rom-end to 0x1fffffff
Without this override, mpu hal will require 5 mpu regions which exceed 4 mpu
regions supported by M252 (see hal/mpu/mbed_mpu_v8m.c). In this scenario,
we will hit assert error but we actually meet stack overrun first due to just
0x400 bytes for emitting error message. The issue doesn’t occur on other
targets such as M487 because it has 8 mpu regions.
2019-10-16 11:58:32 +01:00
Chun-Chieh Li d111aff98b Support Nuvoton's NUMAKER_M252KG target 2019-10-16 11:58:32 +01:00
Ben Cooke 9145b72433 Add MTS_DRAGONFLY_F413RH platform to mbed-os 2019-10-16 11:58:32 +01:00
Kyle Kearney 7dd86e8f48 Clean up BSP hardware configuration
- Improve block naming
- Remove unneeded items
2019-10-16 11:58:32 +01:00
Kyle Kearney 45b674623f Update CY8CPROTO-064-SB linker scripts
Update linker scripts for the latest PDL to be consistent with other Cypress targets
2019-10-16 11:58:32 +01:00
Kyle Kearney 222443ea63 Refactor serial flash support 2019-10-16 11:58:32 +01:00
Kyle Kearney 85ba6ea4f3 Simplify BSP contents
Remove some (Cypress-proprietary) BSP interfaces and hardware initialization
from the BSPs which is better implemented by a library or application firmware.
Move some remaining functionality from common to the individual targets.
2019-10-16 11:53:52 +01:00
Kyle Kearney 91131a03f7 Consolidate/clean up wifi initialization 2019-10-16 11:53:52 +01:00
Kyle Kearney 8e6c6d1d8e Avoid doubly allocating whd thread stack
Don't malloc during wifi initialization, as that could cause double allocation in some cases.
The thread stack will be allocated by cy_rtos_thread_start if necessary.
2019-10-16 11:53:52 +01:00
Qinghao Shi ce73f8ecdd FASTMODEL: add a comment for TRNG simulation 2019-10-16 11:53:52 +01:00
Qinghao Shi 4e3d31540a FASTMODEL: update trng based on comments 2019-10-16 11:53:52 +01:00
Qinghao Shi 828b2f132e FASTMODEL: enable PSA tests for fastmodel 2019-10-16 11:53:52 +01:00
Qinghao Shi c81995cf56 FASTMODEL: add simulated TRNG implementation to fastmodel 2019-10-16 11:53:52 +01:00
Chris Trowbridge 89ce27b3fc EP_AGORA: Add config logic to enable BLE, cell, and LoRa by default 2019-10-16 11:53:52 +01:00
Marc Emmers b82becb323 Add newline at end of file 2019-10-16 11:53:52 +01:00
Marc Emmers 0876991561 Fixed missing #if in port_api.c 2019-10-16 11:53:52 +01:00
jeromecoutant b2e0a13730 STM32H7 ST CUBE V1.5.0 update 2019-10-16 11:53:52 +01:00
Ryan Morse c62c7135f9 Moved TriggerMux initialization out of the HAL and into the BSP since that is what dictates what trigger muxes actually need to be used 2019-10-16 11:53:52 +01:00
Vincent Veron 85757ce198 STM32H7 : use RAM instead of DTCMRAM (GCC_ARM toolchain) 2019-10-16 11:53:52 +01:00
Vincent Veron 7561e770a3 STM32H7 : use RAM instead of DTCMRAM (ARM toolchain) 2019-10-16 11:53:52 +01:00
Vincent Veron dd9f9e1cb5 STM32H7 : use RAM instead of DTCMRAM (IAR toolchain)
Keep vector table and crash data ram in 0x20000000 for
tests-mbed_platform-crash_reporting test.
Move the rest in RAM (0x24000000). This is needed for ethernet and allows
user to use more RAM (512k).

Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-10-16 11:53:52 +01:00
Volodymyr Medvid 0cb250ca04 PSOC6: update to PDL 1.3.1.1499 2019-10-16 11:53:52 +01:00
Volodymyr Medvid 8bed19a9d2 PSOC6: update to PDL 1.3.1.1474 2019-10-16 11:53:52 +01:00
Leszek Rusinowicz f5f6caa3b0 FUTURE_SEQUANA: InterruptIn implementation bug fix
Fixed HAL API implementation for InterruptIn:
 - Interrupt was not enabled by default after configuration as it should be.
 - Interrupt-to-object linking was not handled properly.
2019-10-16 11:53:52 +01:00
jeromecoutant b3a14b5ead STM32WB : LSI clock selection when LSE is not available 2019-10-16 11:53:52 +01:00
jeromecoutant 7272fe0613 STM32H7: LSI clock selection when LSE is not available 2019-10-16 11:53:52 +01:00
Kyle Kearney 2b277e8827 Improve psoc6csp doxygen comments 2019-10-16 11:53:52 +01:00
Kyle Kearney 3acb1e49f8 Reorganize resource and rtos abstraction files
- Move resource and rtos abstractions into their own folders
- Remove files for abstractions that are not implemented
2019-10-16 11:53:52 +01:00
Kyle Kearney 0a54b6900e Update to latest HAL
- Add const and static qualifiers in places where they are
  applicable but missing
- Remove headers for drivers that aren't implemented yet
- Misc minor bugfixes
2019-10-16 11:53:52 +01:00