Commit Graph

2067 Commits (f2d42bfa31eb12f993dcd979f11d0e66fb4fc9cb)

Author SHA1 Message Date
Martin Kojtal 8ff444ff80
Merge pull request #11621 from jeromecoutant/PR_L1_VREFINT_CAL_ADDR
STM32L151: update calibration memory address
2019-10-14 09:23:16 +02:00
Martin Kojtal 379787a127
Merge pull request #11626 from jeromecoutant/PR_DISCO_L4R_STMOD
DISCO_L4R9I: update default STMOD+ pin
2019-10-14 09:22:35 +02:00
Anna Bridge 489c30f569
Merge pull request #11297 from kyle-cypress/pr/qspi-dummy-cycles
Differentiate alt and dummy cycles in QSPIF
2019-10-11 14:34:17 +01:00
Anna Bridge f1295b9aa7
Merge pull request #11573 from felser/add_413_dragonfly
Add 413 dragonfly
2019-10-07 16:48:07 +01:00
jeromecoutant fc5b91a36f DISCO_L4R9I: update default STMOD+ pin 2019-10-07 16:01:16 +02:00
jeromecoutant 1673e8aa1b STM32L151: update calibration memory address 2019-10-03 14:17:04 +02:00
Kyle Kearney 9b32c0f316 Fix possible negative QSPI alt count on STM
Remove an extraneous decrement operation in cases where the alt
bits size is a multiple of 8.
2019-09-30 16:00:24 -07:00
Matthew Macovsky baf375f8cb Allow for arbitrary QSPI alt sizes
The QSPI spec allows alt to be any size that is a multiple of the
number of data lines. For example, Micron's N25Q128A uses only a
single alt cycle for all read modes (1, 2, or 4 bits depending on
how many data lines are in use).
2019-09-30 14:45:08 -07:00
Ben Cooke dd778c4126 Add MTS_DRAGONFLY_F413RH platform to mbed-os 2019-09-30 13:50:40 -05:00
jeromecoutant fff88617b7 STM32H7 ST CUBE V1.5.0 update 2019-09-27 11:39:06 +02:00
Martin Kojtal fff888b118
Merge pull request #11562 from VVESTM/vve_h7_memmap
STM32H7: memory relocation
2019-09-26 14:01:23 +02:00
jeromecoutant 8c1f94f7cb STM32WB : LSI clock selection when LSE is not available 2019-09-19 13:07:54 +02:00
jeromecoutant 5cfee65881 STM32H7: LSI clock selection when LSE is not available 2019-09-19 13:07:54 +02:00
Martin Kojtal 83fca603f0
Merge pull request #11454 from Tharazi97/LSI_VALUE_STM
ST: Change the LSI_VALUE according to documentation
2019-09-18 13:49:38 +02:00
Vincent Veron 82e89add61 STM32H7 : use RAM instead of DTCMRAM (GCC_ARM toolchain) 2019-09-18 10:57:21 +02:00
Vincent Veron ac30a70092 STM32H7 : use RAM instead of DTCMRAM (ARM toolchain) 2019-09-18 10:57:20 +02:00
Vincent Veron d241eef5d4 STM32H7 : use RAM instead of DTCMRAM (IAR toolchain)
Keep vector table and crash data ram in 0x20000000 for
tests-mbed_platform-crash_reporting test.
Move the rest in RAM (0x24000000). This is needed for ethernet and allows
user to use more RAM (512k).

Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-09-18 10:57:19 +02:00
int_szyk 48040cf687 Change the LSI_VALUE according to documentation 2019-09-17 12:01:32 +02:00
mahanthgouda 1780a08d54 Add OKDO platform (#11407)
Add OKDO platform
2019-09-16 16:58:54 +02:00
Martin Kojtal f51bbe01c8
Merge pull request #11471 from jeromecoutant/PR_WB_ADC
STM32WB ADC : consecutive VBAT reading
2019-09-16 13:19:09 +02:00
jeromecoutant ee8489f4e9 STM32WB ADC : Consecutive VBAT values reading was not possible
Add Stop after read
2019-09-12 12:55:41 +02:00
Martin Kojtal c897e041c8
Merge pull request #11384 from jeromecoutant/PR_H747_CM7
ST DISCO-H747I introduction
2019-09-10 19:43:57 +02:00
jeromecoutant db7efabfd5 STM license file update
Some code have been copied from ST Cube deliveries.
ST copyright is then needed.
2019-09-10 14:24:48 +02:00
jeromecoutant 535dbe87af STM32H747 license update 2019-09-10 11:46:52 +02:00
jeromecoutant c28d5f17e5 DISCO_H747I single core M7 introduction 2019-09-10 11:46:50 +02:00
jeromecoutant 73a00e953d STM32H747xI introduction 2019-09-10 11:46:47 +02:00
jeromecoutant 117ddbadee STM32H743 files move 2019-09-10 11:46:35 +02:00
Martin Kojtal b8ebee5719
Merge pull request #11385 from Tharazi97/lp_ticker_wrapper_change
Fix problem with low level lp_ticker STM wrapper
2019-09-05 11:09:50 +02:00
Martin Kojtal 7b06ce552f
Merge pull request #11368 from ua1arn/master
Add pin speed controlling interface
2019-09-04 13:55:26 +02:00
Martin Kojtal 5a6bf446d2
Merge pull request #11383 from Tharazi97/f303_watchdog_reset
Change LSI_VALUE in STM implementation.
2019-09-04 11:55:27 +02:00
jeromecoutant 55d60f3c25 Add USB support for DISCO_L4R9I 2019-09-03 16:43:05 +02:00
jeromecoutant 425d63856c STM32L4 USB: remove EndpointAbort support 2019-09-03 14:23:05 +02:00
dolphin\gena afc79cf9b7 formatting 2019-09-03 12:03:04 +03:00
dolphin\gena 2a13490e6d bad formatting correction 2019-09-03 11:47:52 +03:00
dolphin\gena a684f43b7f indents correction 2019-09-03 11:45:35 +03:00
dolphin\gena 1379009f5e rename macro 2019-09-02 14:02:29 +03:00
Martin Kojtal 940d3fdf60
Merge pull request #11291 from LMESTM/STM32_OSPI_QSPI_fallback_support
Stm32 ospi qspi fallback support
2019-09-02 12:26:55 +02:00
Martin Kojtal 8add87aeba
ST pinmap: remove endif mistype 2019-09-02 10:33:20 +01:00
Martin Kojtal b44fbfe714
ST pinmap: Fix the style 2019-09-02 10:32:32 +01:00
dolphin\gena 58ca13006d formatting 2019-09-02 12:08:07 +03:00
int_szyk a95450bdc0 AStyle 2019-09-02 10:48:41 +02:00
int_szyk 16c5121705 Fix problem with low level lp_ticker STM wrapper 2019-09-02 10:48:40 +02:00
dolphin\gena 9043330af4 fix mistypes 2019-09-02 10:21:38 +03:00
dolphin\gena 05fc0f5263 formatting issue 2019-09-02 10:17:54 +03:00
dolphin\gena 75c17cea90 mistype fix 2019-09-02 10:08:36 +03:00
int_szyk 3fa878f8a8 Change LSI_VALUE in STM implementation.
Wrong LSI value might be causing problems witch watchdogs.
2019-08-30 13:54:39 +02:00
Martin Kojtal a65ed8c3d8
Merge pull request #11303 from jeromecoutant/PR_H743ZI2_480
NUCLEO_H743ZI2 : increase system clock from 400 MHz to 480 MHz
2019-08-29 17:10:06 +02:00
jeromecoutant bb1388be8e NUCLEO_L4R5ZI: add QSPI_x definition 2019-08-29 14:17:33 +02:00
Martin Kojtal 8ef742a49c
Merge pull request #11370 from u-blox/ublox_odin_driver_os_5_v3.7.1_rc1
Driver Updates + ARMC6 driver support + WIFI fixes
2019-08-29 13:35:06 +02:00
jeromecoutant f13072490c NUCLEO_L4R5ZI : add OSPI pins for QSPI 2019-08-29 12:11:28 +02:00