Martin Kojtal
4ce6ed0f47
Merge pull request #9606 from deepikabhavnani/core_arch_v8m
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Correct typo no_dsp - nodsp
2019-02-05 16:59:13 +01:00
Deepika
b49a6b2ad8
Correct typo no_dsp - nodsp
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armclang - nodsp
armlink - no_dsp
diff --git a/tools/t
2019-02-04 15:40:53 -06:00
Martin Kojtal
1c483e87b0
Merge pull request #9589 from bridadan/fix_export_exception_msg
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Improve error message for exports for OS2-only targets
2019-02-04 17:26:10 +01:00
Martin Kojtal
dcba5ffa3c
Merge pull request #9529 from kfnta/its_crypto
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RollUp PR Crypto with ITS
2019-02-04 17:14:05 +01:00
Martin Kojtal
0ae6a048e4
Merge pull request #9431 from deepikabhavnani/iar_armv8m_changes
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Update IAR Armv8M changes
2019-02-04 14:34:28 +01:00
Brian Daniels
8d900c77cf
Improve error message for exports for OS2-only targets
2019-02-01 17:02:46 -06:00
Brian Daniels
811152da65
Add missing space - coding style nit
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Co-Authored-By: deepikabhavnani <deepika.bhavnani@arm.com>
2019-02-01 10:38:37 -06:00
Martin Kojtal
7ba83a517d
Merge pull request #9342 from Cypress-OpenOCD/master
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Add support for debug and program launch configurations
2019-02-01 08:10:20 +01:00
deepikabhavnani
6097095de4
Set the DSP option as `E` for Cortex-M33
2019-01-31 16:19:24 -06:00
deepikabhavnani
fdbcae3830
Correct the floating+dsp options for Cortex-M processors
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As per the IAR Development guide, below options for CPU are valid
1. Cortex-M33
2. Cortex-M33.no_dsp (core without integer DSP extension)
3. Cortex-M33.fp (floating-point unit with support for single precision)
4. Cortex-M33.no_se (core without support for TrustZone)
5. Cortex-M4
6. Cortex-M4F
7. Cortex-M7
8. Cortex-M7.fp.dp (floating-point unit with support for double precision)
9. Cortex-M7.fp.sp (floating-point unit with support for single precision)
2019-01-31 16:19:24 -06:00
deepikabhavnani
0082474ef2
Update `cmse` flag based on core_arch instead of different cores
2019-01-31 16:19:24 -06:00
Deepika
80f6b0e002
M2351: Update code to support IAR 8.x builds
2019-01-31 16:19:24 -06:00
deepikabhavnani
f760f72757
Update IAR flags for Armv8M devices.
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Cortex-M23 / Cortex-M33 CPU settings for baseline and mainline
profile (with optional floating and dsp options) updated.
2019-01-31 16:19:24 -06:00
Andriy.Lishchynskyi
be5a625771
Resolved code review comments
2019-01-31 19:31:28 +02:00
Jimmy Brisson
020c840cf8
Apply suggestions from code review
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Co-Authored-By: Cypress-OpenOCD <39907069+Cypress-OpenOCD@users.noreply.github.com>
2019-01-31 19:29:13 +02:00
Cruz Monrreal
c9e00cf781
Merge pull request #9480 from deepikabhavnani/core_arch_v8m
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Refactor core optional parameters (FPU + DSP + Security extensions)
2019-01-31 10:22:09 -06:00
Oren Cohen
ea9f104463
Fix Licenses
2019-01-31 17:17:58 +02:00
Oren Cohen
ff18a64e00
Check mbed-crypto-example with fork
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Revert this commit once these changes are merged to example master
2019-01-31 17:17:57 +02:00
Oren Cohen
34895a05ad
CR fixes
2019-01-31 17:17:54 +02:00
Oren Cohen
8841ba69f8
Align to new spec changes and prep for TFM SPM
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# Conflicts:
# components/TARGET_PSA/services/crypto/COMPONENT_PSA_SRV_IPC/psa_crypto_spm.c
# components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_partition.c
2019-01-31 17:17:53 +02:00
Andriy.Lishchynskyi
6f584cd35e
Added copyright notes
2019-01-31 16:31:02 +02:00
Martin Kojtal
dbc3c6250b
Merge pull request #9487 from theamirocohen/add_sd_driver_example
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Add sd-driver example
2019-01-31 11:22:59 +01:00
Martin Kojtal
9265c19e2e
Merge pull request #9394 from jeromecoutant/PR_PERIPH
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STM32: PeripheralPins files update from lastest CubeMX tool version
2019-01-31 11:21:09 +01:00
Andriy.Lishchynskyi
48dfcd98a9
Changes:
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- added new erase launch configuration
- added new kits support
- code cleanup
2019-01-30 19:48:20 +02:00
Martin Kojtal
93f0a09344
Merge pull request #9521 from cmonr/py3-tests-and-fixes
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Py3 fixes and Travis CI enablement
2019-01-30 10:02:50 +01:00
Martin Kojtal
2a16bbdf98
Merge pull request #9496 from NXPmicro/Add_MXRT_IAR_Support
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MIMXRT1050_EVK: Add IAR support in the exporter
2019-01-30 09:56:29 +01:00
Martin Kojtal
7d036b52cd
Merge pull request #9283 from michalpasztamobica/tlssocket_greentea
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Add TLSSocket greentea tests.
2019-01-30 09:55:21 +01:00
Jimmy Brisson
b836b340a2
Updated spm test runner wish short import variant
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Co-Authored-By: cmonr <Cruz.Monrreal@arm.com>
2019-01-29 14:54:42 -06:00
Cruz Monrreal II
de4b7607a0
Simplified max/min condition
2019-01-28 14:01:48 -06:00
Cruz Monrreal II
533dcf36ff
Added universal_newlines flag to Popen in pylint.py
2019-01-28 12:59:43 -06:00
Cruz Monrreal II
2a9a45d087
Increased path for spm include.
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Py3 tests were not running as a result
2019-01-28 12:59:43 -06:00
Cruz Monrreal II
149d280e7a
Added encoding to version check for Py3 compat
2019-01-28 12:59:43 -06:00
Cruz Monrreal II
cc3114113d
In Py3.7, a reinit of a mock variable was needed.
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It seems that initializing mock variables in an object isn't enough
2019-01-28 12:59:43 -06:00
Cruz Monrreal II
d9add3447d
Added None check for min in config tools
2019-01-28 12:59:43 -06:00
Cruz Monrreal II
72dbc52715
Added flag to run_cmd Popen invocation to do default decoding
2019-01-28 12:59:43 -06:00
Cruz Monrreal
e965aa6640
Merge pull request #9509 from vmedcy/psoc6-daplink-hex
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PSOC6.py: generate hex files with 16 bytes per row
2019-01-28 10:38:15 -06:00
Cruz Monrreal
7f8ebc75cd
Merge pull request #9466 from vmedcy/psoc6-target-hook
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Improve PSoC 6 post-build hooks, whitelist makefile export
2019-01-28 10:33:12 -06:00
Volodymyr Medvid
5c384f10e7
PSOC6.py: generate hex files with 16 bytes per row
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DAPLink implementation on Cypress kits cannot handle hex files
with 64 bytes per row: refer to https://github.com/ARMmbed/DAPLink ,
source/daplink/drag-n-drop/intelhex.c, hex_line_t struct, data field.
2019-01-25 10:07:00 -08:00
deepikabhavnani
febbeffff6
Change if statements to lookup tables
2019-01-25 09:43:03 -06:00
deepikabhavnani
f7d49fdc82
Change DSP variant symbol to `E` from `D`(d-double floating point)
2019-01-25 09:31:44 -06:00
deepikabhavnani
c472005cfa
GCC_ARM: Strip the -NS from core option before setting floating point options
2019-01-25 09:28:36 -06:00
deepikabhavnani
c0750de318
Armc6 - Set floating point and CPU options for all core variants explicitly
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Below are the options read from the toolchains/arm
armclang --target=arm-arm-none-eabi -mcpu=list
The following arguments to option 'mcpu' can be selected:
-mcpu=cortex-m0
-mcpu=cortex-m0plus
-mcpu=cortex-m1
-mcpu=cortex-m3
-mcpu=cortex-m4
-mcpu=cortex-m7
-mcpu=cortex-m23
-mcpu=cortex-m33
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armlink --cpu=list
The following arguments to option 'cpu' can be selected:
--cpu=Cortex-M0
--cpu=Cortex-M0plus
--cpu=Cortex-M1
--cpu=Cortex-M1.os_extension
--cpu=Cortex-M1.no_os_extension
--cpu=Cortex-M4
--cpu=Cortex-M4.no_fp
--cpu=Cortex-M7
--cpu=Cortex-M7.fp.sp
--cpu=Cortex-M7.no_fp
--cpu=Cortex-M23
--cpu=Cortex-M33
--cpu=Cortex-M33.no_fp
--cpu=Cortex-M33.no_dsp
--cpu=Cortex-M33.no_dsp.no_fp
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armclang --target=arm-arm-none-eabi -mfpu=list
The following arguments to option 'mfpu' can be selected:
-mfpu=fpv4-sp-d16
-mfpu=fpv5-sp-d16
-mfpu=fpv5-d16
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2019-01-25 09:28:36 -06:00
deepikabhavnani
907c517473
Use core arch for setting secure/non-secure flags
2019-01-25 09:28:36 -06:00
Cruz Monrreal
615ed31f7a
Merge pull request #9488 from 0xc0170/fix_licenses
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Fix licenses in travis test and realtek lib
2019-01-24 16:16:38 -06:00
Mahesh Mahadevan
aa449b3c5f
MIMXRT1050_EVK: Add IAR support in the exporter
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Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2019-01-24 13:55:20 -06:00
Cruz Monrreal
f69b550d5d
Merge pull request #9462 from deepikabhavnani/add_example
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Corrected the targets value in json file as CI uses real board names
2019-01-24 13:27:46 -06:00
Kevin Gilbert
ecdd1d7cb3
Add empty en_phonet.
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Required to run with aspell and comply with license changes
2019-01-24 11:34:14 -06:00
Martin Kojtal
32e247d06f
travis: remove phonedat database
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Not permissive license
2019-01-24 12:28:22 +00:00
Amir Cohen
f7ea4c9e67
Add sd-driver example
2019-01-24 13:34:35 +02:00
jeromecoutant
16028e3796
STM32_gen_PeripheralPins.py v1.5
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Use dedicated PinMap for each QSPI data line #9438
2019-01-24 11:00:00 +01:00