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mbed-os
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13770 Commits (e56ef99593c5fc1b4acd51f51ba0e17ee03d9fc4)

Author SHA1 Message Date
Jimmy Brisson 50ceca76ce Handle multiple args per line in IAR cmd parser 2018-01-12 15:01:47 +00:00
jeromecoutant fd800caced STM32 : issue to exit deepsleep when RTC has not been initialized 2018-01-12 15:01:47 +00:00
Seppo Takalo f42db05e55 Add minimal debug info to release and develop profiles. 
This allows minimal debugging and allows tools like
mbed-os-linker-report to work properly.

Because debugging info is kept in .elf file and not flashed to device
there is no side effects to flash sizes.
 2018-01-12 15:01:47 +00:00
gorazd 4a2ace99d5 ff_lpc546xx: change led1 and led3 and p26 pins 2018-01-12 15:01:47 +00:00
gorazd f07c985707 ff_lpc546xx: add enet 
fsl_phy.c/.h move to ../drivers to reuse it
lwip: add hardware_init.c
 2018-01-12 15:01:47 +00:00
Adam Heinrich 1ca129ae54 NUCLEO_F413ZH: Add support for the NUCLEO-F413ZH board 
Merged from the existing TARGET_DISCO_F413ZH code (which has the same MCU)
and TARGET_NUCLEO_F412ZG code (which has the same Nucleo-144 board and
pinout).
 2018-01-12 15:01:47 +00:00
ccli8 51087a9f50 Fix DMA input/output buffers are overlapped in AES alter. 2018-01-12 15:01:47 +00:00
ccli8 5938e6b73a Remove unnecessary H/W context clone functions in SHA alter. 2018-01-12 15:01:47 +00:00
ccli8 2caeb92b5f Fix context clone corner case in SHA alter. 
As destination/source contexts are the same, we return immediately.
 2018-01-12 15:01:47 +00:00
ccli8 fd650adcee Fix indefinite loop in SHA alter. 2018-01-12 15:01:47 +00:00
ccli8 0243435047 Remove duplicate configuration of CRPT->SHA_CTL/CRPT->HMAC_CTL in SHA alter. 2018-01-12 15:01:47 +00:00
ccli8 1fea286725 Guard from reordering DMA wait and post-wait for crypto modules 2018-01-12 15:01:47 +00:00
ccli8 e352fc48bd Use interrupt signal rather than polling to check operation completion in DES alter. 
This is to be consistent with PRNG/AES.
 2018-01-12 15:01:47 +00:00
ccli8 274a54eb8b Refine flow control code between crypto start and crypto ISR 2018-01-12 15:01:47 +00:00
ccli8 9374e43545 Add comment for crypto_zeroize 2018-01-12 15:01:47 +00:00
ccli8 c0fe23b1ef Refine code in SHA alter. 2018-01-12 15:01:46 +00:00
ccli8 da84f715bf Add memory barrier for DMA transfer in AES/DES alter. 2018-01-12 15:01:46 +00:00
ccli8 c8c980473a Call BSP driver rather than direct register access in DES alter. 2018-01-12 15:01:46 +00:00
ccli8 101892527f Update BSP crypto driver 2018-01-12 15:01:46 +00:00
ccli8 523ca0a7e4 Fix parameter check for TMODE/OPMODE in DES alter. 2018-01-12 15:01:46 +00:00
ccli8 acbc4e49ba Add parameter check for configuring DES registers in DES alter. 2018-01-12 15:01:46 +00:00
ccli8 ada9a9e248 Refine comment with BSP driver use in DES alter. 2018-01-12 15:01:46 +00:00
ccli8 7bd32f2bd4 Fix multiple calls to SHA free in SHA alter. 2018-01-12 15:01:46 +00:00
ccli8 1c8128831b Remove superfluous code in AES alter. 2018-01-12 15:01:46 +00:00
ccli8 5498bdad87 Refine code with SHA context selection in SHA alter. 2018-01-12 15:01:46 +00:00
ccli8 2ba799462a Guard against SHA internal state size is not word-aligned in SHA alter. 2018-01-12 15:01:46 +00:00
ccli8 e1714d1d58 Fix SHA H/W resource leakage in context cloning 2018-01-12 15:01:46 +00:00
ccli8 e7f75b069f Fix SHA H/W is not stopped in corner case 
Take SHA1 for example, without the fix, SHA H/W is not stopped in either case:
(1) ctx->total == 0 in mbedtls_sha1_hw_finish()
(2) mbedtls_sha1_hw_finish() is not called by upper layer
 2018-01-12 15:01:46 +00:00
ccli8 402d2d26ec Strengthen crypto DMA buffer check 
1. Catch incompatible buffer range, where buffer base = 0xffffff00 and buffer size = 0x100.
2. Add buffer size alignment check.
 2018-01-12 15:01:46 +00:00
ccli8 0b51602734 Refine AES/DES alter. DMA buffer requirement comment 2018-01-12 15:01:46 +00:00
ccli8 ad7024687e Fix compile error with disabled crypto 
For example, even though MBEDTLS_SHA512_C is disabled (via #undef MBEDTLS_SHA512_C),
mbedtls_sha512_context is still necessary due to referenced in sha512.h.
 2018-01-12 15:01:46 +00:00
ccli8 56087fe0a4 Fix compile error as mbedtls is not included 
Currently, trng_api.c is located in targets/ and AES/DES/SHA alter. are located in mbedtls/.
They have shared crypto code.
If they could locate at same location e.g. mbedtls/, the shared crypto code placement would be more reasonable.
 2018-01-12 15:01:46 +00:00
ccli8 0a56b34d0e Refine AES alter. key endianness code 2018-01-12 15:01:46 +00:00
ccli8 77c53f8d06 Coordinate crypto interrupt handler among AES/PRNG 2018-01-12 15:01:46 +00:00
ccli8 d6987bb6be Refine AES/DES alter. code 2018-01-12 15:01:46 +00:00
ccli8 a89cb2e5b9 Fix AES alter. CFB128 error 2018-01-12 15:01:45 +00:00
ccli8 9c52660e52 Optimize AES alter. code 2018-01-12 15:01:45 +00:00
ccli8 1f3565ec35 Guard from re-entry into crypto H/W 2018-01-12 15:01:45 +00:00
ccli8 41f4e1a12c Coordinate crypto init among AES/DES/SHA/PRNG 
Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt

As counter gets zero, crypto clock is disabled to save power.
 2018-01-12 15:01:45 +00:00
ccli8 5785ecfb76 Fix DES alter. DMA buffer could locate at unsupported region 2018-01-12 15:01:45 +00:00
ccli8 416c4fa7f6 Fix AES alter. DMA buffer could locate at unsupported region 2018-01-12 15:01:45 +00:00
ccli8 e60198e946 Refine AES alter. input/output data endianness 2018-01-12 15:01:45 +00:00
ccli8 bc366a1c31 Fix AES alter. DMA buffer check 2018-01-12 15:01:45 +00:00
ccli8 2ddc1410f0 Refine config check code 2018-01-12 15:01:45 +00:00
ccli8 60cbdac383 Remove redundant S/W DES code 
This S/W DES code was to test DES H/W port before.
 2018-01-12 15:01:45 +00:00
ccli8 90eb34b4de Refine DES alter. code 2018-01-12 15:01:45 +00:00
ccli8 f4e0228ffe Add comment for DES alter. context 2018-01-12 15:01:45 +00:00
ccli8 ce2e1ea169 Add comment for AES alter. context 2018-01-12 15:01:45 +00:00
ccli8 743930978c Refine AES alter. code with IV endianness 2018-01-12 15:01:45 +00:00
ccli8 3aae8ad4a3 Rework AES alter. CFB128 
1. Fix bug on non-block aligned data size
2. More concise
 2018-01-12 15:01:45 +00:00