5 Commits (e1c3de649dd9c16d9548f73b4bbb71858af904f7)

Author	SHA1	Message	Date
Alexandre Bourdiol	adcf0e2fa5	DISCO_H747I Dualcore support ... Add 2 targets for DISCO_H747I dualcore: * DISCO_H747I -> for CM7 core * DISCO_H747I_CM4 -> for CM4 core Current restrictions: * TICKLESS deactivated * DeepSleep not supported (DeepSleep wrapped to sleep) Warning: use of the same IP (example I2C1) by both core at the same time is not prevented, but is strongly not recommended. Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC. Warning: Drag and drop of binary to DISCO_H747I will flash CM7. In order to flash CM4, one can use STM32 CubeProgrammer tool.	2019-10-14 18:02:57 +02:00
jeromecoutant	db7efabfd5	STM license file update ... Some code have been copied from ST Cube deliveries. ST copyright is then needed.	2019-09-10 14:24:48 +02:00
jeromecoutant	58994d88cd	STM32H7: flash issue while erasing sector in Bank 1	2019-05-29 09:31:30 +02:00
jeromecoutant	b1a284a876	STM32: astyle check	2019-01-10 10:22:21 +01:00
jeromecoutant	4b67820f8a	NUCLEO_H743ZI: add initial SDK	2019-01-04 10:03:36 +01:00