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21 Commits (df88a9dcc2700535ca00bdf8dbeb86ab048c396f)

Author SHA1 Message Date
Chris Snow 82ae53a282 Simplify CRP placement. 2017-10-02 19:23:35 +01:00
Chris Snow d6404726dd Ensure CRP is set correctly for IAR, GCC and ARM 
CRP value can be set through a macro in mbed_app such as
"macros": [
    "CRP=CRP_NONE"
]
 2017-09-30 19:26:05 +01:00
Chris Snow f8f54837cd Linker update for bootloader support 2017-09-30 19:00:25 +01:00
Chris Snow a08fc2bb7a Move CRP out of startup and into CRP.c so it can be conditionally compiled 2017-09-30 19:00:25 +01:00
Martin Kojtal 9a191de5f9 LPC1768: flash_hal removal duplication 
IAP typedef duplication removal
 2017-09-25 19:18:18 +02:00
Martin Kojtal 6a6561028e LPC1768: flash erase/write require a critical section 
From RM:

32.3.2.6 Interrupts during IAP
The on-chip flash memory is not accessible during erase/write operations. When the user
application code starts executing the interrupt vectors from the user flash area are active.
The user should either disable interrupts, or ensure that user interrupt vectors are active in
RAM and that the interrupt handlers reside in RAM, before making a flash erase/write IAP
call. The IAP code does not use or disable interrupts.
 2017-09-25 19:18:06 +02:00
Martin Kojtal c623e889c0 LPC1768: RAM end adjust fix 
The topmost 32 bytes used by IAP functions, this was not included in the RAM
end previously.
 2017-09-25 13:50:54 +01:00
Chris Snow e2c42bb0a0 LPC1768 IAP Fix (#4993) 
use IAP routines for the flash HAL implementation
 2017-09-22 11:30:43 +01:00
Jimmy Brisson 15a9a0382b Enable Compiling with ARMC6 across all targets 
remove duplicate sys.cpp
 2017-09-11 13:20:32 -05:00
Martin Kojtal bb26bd6d2d Revert "Adjusting Stack size Allocation (IAR, LPC176x)" 
This reverts commit fce2ca2122.
 2017-09-06 13:56:27 +01:00
Hasnain Virk fce2ca2122 Adjusting Stack size Allocation (IAR, LPC176x) 
Since mbed-os 5.4.3, something increased foot print of mbed-os and the applications that were barely fitting in started to spill.

IAR toolchain for LPC176x target family is set to use 2 RAM regions (32K each). RAM region
2 is being used for ETH/USB and 1 is being used for vector table, stack/heap/static data.

In this commit we have decreased heap size allocation from 8K to 7K so that the is more room for stack and static data.
 2017-09-04 14:54:42 +03:00
Bartek Szatkowski b97ffe8fdc CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation 2017-05-30 18:55:51 +01:00
Brian Daniels a8bd3b2cb7 Removes FLASH capabilities for the ARCH_PRO. 
This platform is failing a flash test at this time. This commit disables
the capability (and therefore the test) until it is fixed.
 2017-05-10 15:16:22 -05:00
0x6d61726b 7d9e1d4b75 reserved topmost 32 bytes of RAM used by IAP functions 
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack 
usage in the user allocated stack space is 128 bytes and it grows downwards.
 2017-04-30 14:16:52 +02:00
0x6d61726b 6c3f9bd485 reserved topmost 32 bytes of RAM used by IAP functions 
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack 
usage in the user allocated stack space is 128 bytes and it grows downwards.
 2017-04-30 14:16:05 +02:00
0x6d61726b c2fa163322 reserved topmost 32 bytes of RAM used by IAP functions 
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack 
usage in the user allocated stack space is 128 bytes and it grows downwards.
 2017-04-30 14:15:23 +02:00
0x6d61726b 6e46c7ad98 reserved topmost 32 bytes of RAM used by IAP functions 
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack 
usage in the user allocated stack space is 128 bytes and it grows downwards.
 2017-04-30 14:14:58 +02:00
0x6d61726b 0125f9f1a1 reserved topmost 32 bytes of RAM used by IAP functions 
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack 
usage in the user allocated stack space is 128 bytes and it grows downwards.
 2017-04-30 14:14:04 +02:00
0x6d61726b 131379aa0c reserved topmost 32 bytes of RAM used by IAP functions 
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack 
usage in the user allocated stack space is 128 bytes and it grows downwards.
 2017-04-30 14:13:05 +02:00
0x6d61726b 29c7b34dfa LPC176X flash_api.h implementation 
For LPC176X (LPC1768/LPC1769) the flash driver has been implemented according to the CMSIS-PACK Keil.LPC1700_DFP.2.3.0 driver with the following changes in FlashPrg.c:
1. EraseChip() function removed (not used by flash_api)
2. Clock reconfiguration removed and clock value taken from function parameter to avoid unexpected behavior.

Full patch of FlashPrg.c:
--- Keil.LPC1700_DFP.2.3.0\Flash\LPC_IAP\FlashPrg_orig.c	2016-12-08 13:10:10.000000000 +0200
+++ Keil.LPC1700_DFP.2.3.0\Flash\LPC_IAP\FlashPrg.c	2017-04-11 20:02:37.000000000 +0200
@@ -191,90 +191,15 @@
  *                    fnc:  Function Code (1 - Erase, 2 - Program, 3 - Verify)
  *    Return Value:   0 - OK,  1 - Failed
  */
 
 int Init (unsigned long adr, unsigned long clk, unsigned long fnc) {
 
-#if defined LPC1XXX  || defined LPC11U6X
-  CCLK       = 12000;                          // 12MHz Internal RC Oscillator
+	CCLK = clk / 1000;                           // CCLK value is in kHz, clk in Hz
 
-  MAINCLKSEL = 0;                              // Select Internal RC Oscillator
-  MAINCLKUEN = 1;                              // Update Main Clock Source
-  MAINCLKUEN = 0;                              // Toggle Update Register
-  MAINCLKUEN = 1;
-//  while (!(MAINCLKUEN & 1));                   // Wait until updated
-  MAINCLKDIV = 1;                              // Set Main Clock divider to 1
-
-  MEMMAP     = 0x02;                           // User Flash Mode
-#endif
-
-#ifdef LPC17XX
-  IAP.stat =  0;                               // Note: Some Bootloader versions don't set the status if this command is executed
-  IAP.cmd  = 54;                               // Read Part ID
-  IAP_Call (&IAP.cmd, &IAP.stat);              // Call IAP Command
-  if (IAP.stat) return (1);                    // Command Failed
-
-  switch ((IAP.res[0] >> 24) & 0xFF) {
-    case 0x25:
-                                               // Part ID LPC1759 = 0x25113737
-                                               // Part ID LPC1758 = 0x25013F37
-                                               // Part ID LPC1756 = 0x25011723
-                                               // Part ID LPC1754 = 0x25011722
-                                               // Part ID LPC1752 = 0x25001121
-                                               // Part ID LPC1751 = 0x25001118 / 0x25001110
-    case 0x26:
-                                               // Part ID LPC1769 = 0x26113F37
-                                               // Part ID LPC1768 = 0x26013F37
-                                               // Part ID LPC1767 = 0x26012837
-                                               // Part ID LPC1766 = 0x26013F33
-                                               // Part ID LPC1765 = 0x26013733
-                                               // Part ID LPC1764 = 0x26011922
-      CCLK  =  4000;                           //  4MHz Internal RC Oscillator
-      break;
-    case 0x27:
-                                               // Part ID LPC1778 = 0x27193F47
-                                               // Part ID LPC1777 = 0x27193747
-                                               // Part ID LPC1776 = 0x27191F43
-                                               // Part ID LPC1774 = 0x27011132
-                                               // Part ID LPC1772 = 0x27011121
-    case 0x20:  // found out during test
-    case 0x28:
-                                               // Part ID LPC1788 = 0x281D3F47
-                                               // Part ID LPC1787 = 0x281D3747
-                                               // Part ID LPC1786 = 0x281D1F43
-                                               // Part ID LPC1785 = 0x281D1743
-    case 0x48:                                 // Part ID LPC4088 = 0x481D3F47
-    case 0x47:                                 // Part ID LPC4078 = 0x47193F47
-                                               // Part ID LPC4076 = 0x47191F43
-                                               // Part ID LPC4074 = 0x47011132
-      CCLK  = 12000;                           // 12MHz Internal RC Oscillator
-      break;
-    default:
-      CCLK  =  4000;                           //  4MHz Internal RC Oscillator
-  }
-
-  CLKSRCSEL = 0x00;                            // sysclk = IRC
-
-  PLL0CON  = 0x00;                             // Disable PLL (use Oscillator)
-  PLL0FEED = 0xAA;                             // Feed Sequence Part #1
-  PLL0FEED = 0x55;                             // Feed Sequence Part #2
-
-  switch ((IAP.res[0] >> 24) & 0xFF) {
-    case 0x27:                                 // LPC177x
-    case 0x20:                                 // LPC178x
-    case 0x28:                                 // LPC178x
-    case 0x48:                                 // LPC407x
-    case 0x47:                                 // LPC408x
-      CCLKSEL  = 0x01;                         // use Sysclk devided by 1 for CPU
-      break;
-    default:
-      CCLKSEL  = 0x00;                         // CPU clk divider is 1
-  }
-
   MEMMAP   = 0x01;                             // User Flash Mode
-#endif
 
   return (0);
 }
 
 
 /*
@@ -283,37 +208,12 @@
  *    Return Value:   0 - OK,  1 - Failed
  */
 
 int UnInit (unsigned long fnc) {
   return (0);
 }
-
-
-/*
- *  Erase complete Flash Memory
- *    Return Value:   0 - OK,  1 - Failed
- */
-
-int EraseChip (void) {
-
-  IAP.cmd    = 50;                             // Prepare Sector for Erase
-  IAP.par[0] = 0;                              // Start Sector
-  IAP.par[1] = END_SECTOR;                     // End Sector
-  IAP_Call (&IAP.cmd, &IAP.stat);              // Call IAP Command
-  if (IAP.stat) return (1);                    // Command Failed
-
-  IAP.cmd    = 52;                             // Erase Sector
-  IAP.par[0] = 0;                              // Start Sector
-  IAP.par[1] = END_SECTOR;                     // End Sector
-  IAP.par[2] = CCLK;                           // CCLK in kHz
-  IAP_Call (&IAP.cmd, &IAP.stat);              // Call IAP Command
-  if (IAP.stat) return (1);                    // Command Failed
-
-  return (0);                                  // Finished without Errors
-}
-
 
 /*
  *  Erase Sector in Flash Memory
  *    Parameter:      adr:  Sector Address
  *    Return Value:   0 - OK,  1 - Failed
  */
 2017-04-11 21:03:45 +02:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory 
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
 2016-10-04 17:51:44 -05:00