Jimmy Brisson
ad1345771f
Merge pull request #5232 from tung7970/fix-target
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RTL8195AM - Fix and cleanup mbed_rtx.h
2017-10-09 11:16:08 -05:00
Jimmy Brisson
80ff7071b4
Merge pull request #5210 from bcostm/L4_add_adc_calib
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STM32: add ADC calibration for L4, F1, F3 devices
2017-10-09 11:15:31 -05:00
Jimmy Brisson
5c3ce0a84c
Merge pull request #5200 from nvlsianpu/nrf51_adcIn_range_extend
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Extend nRF51 AnalogIn voltage range to 3.6 V
2017-10-09 11:14:41 -05:00
Jimmy Brisson
df484e7885
Merge pull request #5192 from andreaslarssonublox/ublox_move_stdio_uart_defines
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Moved STDIO_UART defines for UBLOX_EVK_ODIN_W2
2017-10-09 11:14:06 -05:00
Jimmy Brisson
d6136b9790
Merge pull request #5157 from OpenNuvoton/nuvoton
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NUC472/M453/M487/NANO130: Add updates for Nuvoton targets
2017-10-09 11:12:43 -05:00
Jimmy Brisson
d60f1452d5
Merge pull request #5113 from LMESTM/i2c_OpenDrainNoPull
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STM: I2C: Configure pins in OpenDrainNoPull by default (no pullup)
2017-10-09 11:12:04 -05:00
Jimmy Brisson
a0b624b62e
Merge pull request #5038 from chrissnow/LPC1768-Bootloader
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Lpc1768 bootloader support
2017-10-05 11:11:08 -05:00
Jimmy Brisson
2291644a01
Merge pull request #5162 from NXPmicro/Support_LPC54618
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Change LPC54608 to LPC546XX to include support for LPC54608/18/28
2017-10-03 13:23:07 -05:00
Chris Snow
82ae53a282
Simplify CRP placement.
2017-10-02 19:23:35 +01:00
Mahadevan Mahesh
880f106740
Change LPC54608 to LPC546XX to include support for LPC54608/18/28
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Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-10-02 11:20:27 -05:00
Tony Wu
d0de5f792e
rtl8195am - fix ARMC6 guards
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Fix ARMC6 guard typo introduced in commit 4f3f0cc9cc
(Make Realtek link)
While at it, remove redundant ISR_STACK_SIZE assignment for ARMCC.
Signed-off-by: Tony Wu <tonywu@realtek.com>
2017-10-02 23:45:47 +08:00
andreas.larsson
120c9ad56c
Moved STDIO_UART defines to targets.json for UBLOX_EVK_ODIN_W2 instead of hardcoded.
2017-10-02 17:45:41 +02:00
Jimmy Brisson
c60194fdfd
Merge pull request #5208 from jeromecoutant/PR_F7_RTC
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STM32F7 : RTC Wake Up Timer issue
2017-10-02 10:41:31 -05:00
Jimmy Brisson
8a3abbc857
Merge pull request #5207 from nvlsianpu/fix_DigitalIn_use_gpiote_nrf5x
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Fix: DigitalIn of nRF5x was allocating GPIOTE channel
2017-10-02 10:39:46 -05:00
Jimmy Brisson
cc0b3d05aa
Merge pull request #5130 from bcostm/freeze_timer_in_debug
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STM32: Freeze master timer on stop/breakpoint
2017-10-02 10:38:57 -05:00
Jimmy Brisson
42dc4cf612
Merge pull request #5089 from jeromecoutant/HSE_XTAL
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STM32 : Disable HSE XTAL choice from the default clock source
2017-10-02 10:36:08 -05:00
Tony Wu
5e36d32d86
rtl8195am - remove obsolete configs
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The following configs were no longer necessary for RTX5.
OS_TASKCNT
OS_MAINSTKSIZE
OS_CLOCK
Signed-off-by: Tony Wu <tonywu@realtek.com>
2017-10-02 14:37:05 +08:00
Chris Snow
d6404726dd
Ensure CRP is set correctly for IAR, GCC and ARM
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CRP value can be set through a macro in mbed_app such as
"macros": [
"CRP=CRP_NONE"
]
2017-09-30 19:26:05 +01:00
Chris Snow
f8f54837cd
Linker update for bootloader support
2017-09-30 19:00:25 +01:00
Chris Snow
a08fc2bb7a
Move CRP out of startup and into CRP.c so it can be conditionally compiled
2017-09-30 19:00:25 +01:00
Chris Snow
fc503b8daf
Enable LPC1768 bootloader support
2017-09-30 19:00:25 +01:00
Jimmy Brisson
b6b9daa6f5
Merge pull request #5176 from 0xc0170/fix_fire_efm32
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EFM32: fix fire interrupt (set flags)
2017-09-29 10:14:07 -05:00
Jimmy Brisson
f5bb15f773
Merge pull request #5152 from NXPmicro/Update_RTC_HAL_driver
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Kinetis RTC HAL: Allow writing 0 to the seconds register
2017-09-29 10:12:22 -05:00
Jimmy Brisson
3b224252ef
Merge pull request #5141 from NXPmicro/Fix_LPC54608_LEDMap
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LPC54608: Swap LED pin connections to match naming on the board
2017-09-29 10:12:04 -05:00
Jimmy Brisson
60ca4e9615
Merge pull request #5029 from kegilbert/odin-pinNames-whitespace-adjust
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Adjust whitespace in Odin PinNames file to fit verbose LED pin mappings
2017-09-29 10:07:46 -05:00
Jimmy Brisson
323dc93d89
Merge pull request #5050 from mbedNoobNinja/master
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[RZ_A1H] Correct CAN Message ID and recetption rate in extended mode
2017-09-28 14:03:45 -05:00
bcostm
fca97146cd
Add ADC calibration for STM32F1 and F3 devices
2017-09-28 12:49:11 +02:00
Jimmy Brisson
c06368a21e
Merge pull request #5171 from jeromecoutant/PR_L432_RAM
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STM32L432KC: increase RAM size from 48k to 64k
2017-09-27 15:35:44 -05:00
Jimmy Brisson
6cb0258344
Merge pull request #5026 from LMESTM/flash_init_issue_4967
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STM32: Lock / Unlock flash for each operation
2017-09-27 15:17:26 -05:00
Jimmy Brisson
c24fed135b
Merge pull request #5032 from 0xc0170/fix_mts_debug
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mts targets: fix debug() usage
2017-09-27 09:07:53 -05:00
Jimmy Brisson
760fc335c0
Merge pull request #4982 from NXPmicro/Update_K66_SDK22
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Update K66F to SDK 2.2
2017-09-27 09:05:44 -05:00
Jimmy Brisson
b562e4e131
Merge pull request #4979 from bcostm/usbdevice_clean-up
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STM32: USBDevice files clean-up
2017-09-27 09:04:37 -05:00
Jimmy Brisson
4f1cafd0b7
Merge pull request #5197 from c1728p9/fix_lpc54114
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Fix LPC54114 vector table size
2017-09-27 09:01:44 -05:00
bcostm
4824e18a95
STM32L4: add ADC calibration
2017-09-27 14:38:34 +02:00
Andrzej Puzdrowski
93fb667b6d
Fix: DigitalIn of nRF5x was allocating GPIOTE channel
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The allocation of GPIOTE channels for DigitalIn is unwanted behavior.
This caused early run-out of channels for InterruptPin.
This patch replacing input configuration that is using gpiote driver by configuration that is
using gpio hal.
2017-09-27 09:49:48 +02:00
jeromecoutant
1e36eb6fc9
STM32F7 : RTC Wake Up Timer issue
2017-09-26 17:04:29 +02:00
Andrzej Puzdrowski
f861b37196
Extend nRF51 AnalogIn voltage range to 3.6 V
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Previous the voltage range was set to 1.2 from SoC internal reference source.
This caused problem with testing. It is unexpected that range is much
shorter than vdd as well.
The voltage range was extended using SoC build in analog prescaler (set to 1/3).
2017-09-26 11:31:50 +02:00
Russ Butler
c32890294e
Fix LPC54114 vector table size
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Correct the vector table size on the LPC54114. This fixes crashes
seen on boot when building with GCC.
2017-09-25 18:49:38 -05:00
Martin Kojtal
9a191de5f9
LPC1768: flash_hal removal duplication
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IAP typedef duplication removal
2017-09-25 19:18:18 +02:00
Martin Kojtal
6a6561028e
LPC1768: flash erase/write require a critical section
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From RM:
32.3.2.6 Interrupts during IAP
The on-chip flash memory is not accessible during erase/write operations. When the user
application code starts executing the interrupt vectors from the user flash area are active.
The user should either disable interrupts, or ensure that user interrupt vectors are active in
RAM and that the interrupt handlers reside in RAM, before making a flash erase/write IAP
call. The IAP code does not use or disable interrupts.
2017-09-25 19:18:06 +02:00
Martin Kojtal
c623e889c0
LPC1768: RAM end adjust fix
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The topmost 32 bytes used by IAP functions, this was not included in the RAM
end previously.
2017-09-25 13:50:54 +01:00
Mahadevan Mahesh
d9a8c63b53
K66F: Use DSPI SDK driver API's in spi block read
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Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-09-24 08:14:59 -05:00
Mahadevan Mahesh
593fb3a6fb
K66F: Update to SDK 2.2
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Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-09-24 08:14:52 -05:00
Martin Kojtal
29988933aa
EFM32: fix fire interrupt (set flags)
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There's overflow counter that needs to be 0, and
CC0 flag set.
Fixes #5051
2017-09-22 14:45:30 +01:00
Martin Kojtal
81fde11dae
Merge pull request #4968 from dlfryar/master
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Add bootloader support for NXP FRDM-KW24D
2017-09-22 11:33:40 +01:00
Martin Kojtal
a74e95fb26
Merge pull request #4973 from gorazdko/new-target-L-TEK-FF1705
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Add new target: L-TEK FF1705
2017-09-22 11:32:50 +01:00
Chris Snow
e2c42bb0a0
LPC1768 IAP Fix ( #4993 )
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use IAP routines for the flash HAL implementation
2017-09-22 11:30:43 +01:00
ccli8
bf426b0771
[NUC472/M453/M487/NANO130] Remove dead power-down code with mbed OS 3
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These power-down code are stale and would be superseded by sleep manager.
2017-09-22 09:42:51 +08:00
ccli8
4040211f9e
[NANO130] Refine sleep code
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1. Remove stale code with mbed OS 3.
2. Remove check for busy peripherals unorganizedly. This would be supported by e.g. official sleep manager.
2017-09-22 09:33:53 +08:00
Mahadevan Mahesh
1dadb055f7
RTC HAL: Allow writing 0 to the seconds register
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Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-09-21 13:33:07 -05:00