Commit Graph

15 Commits (de7768ce2925a8b94e23d51a2b6a00ca603d92d4)

Author SHA1 Message Date
Caleb Szalacinski e4e0225a0e Add KSZ8041 as a supported PHY for the LPC17xx series 2020-01-14 19:46:39 -06:00
Mahesh Mahadevan c538919254 MIMXRT1050: Update the ENET driver to use wait_us
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2019-12-13 12:08:19 -06:00
Mahesh Mahadevan 85ef683bfc MCUXpresso: Update ENET drivers to not enter deep sleep when active
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2019-08-12 10:57:08 -05:00
Kevin Bracey 2fbbd9d2ca Introduce Semaphore::acquire methods
Deprecate wait() in favour of acquire(), try_acquire(),
try_acquire_for() and try_acquire_until().

Brings Semaphore more into line with CMSIS-RTOS 2 (which uses "acquire"),
itself (as it has "release"), and other classes having "try", "try for"
and "try until".

Also steps away from vague "wait" term - the primary operation here is
to acquire the semaphore, and this will of course sleep.
2019-05-28 17:02:06 +03:00
Kevin Bracey 6fe50763f3 i.MX RT1050: Reactivate data cache
Since commit 12c6b1bd8, the i.MX RT1050 has effectively had its data
cache disabled, as the SDRAM was marked Shareable; for the Cortex-M7,
shareable memory is not cached.

This was done to make the Ethernet driver work without any cache
maintenance code. This commit adds cache maintenance and memory barriers
to the Ethernet driver, and removes the Shareable attribute from the
SDRAM, so the data cache is used again.

Cache code in the base fsl_enet.c driver has not been activated - the
bulk of it is in higher-level Read and Write calls that we're not using,
and there is one flawed invalidate in its initialisation. Instead
imx_emac.cpp takes full cache responsibility.

This commit also marks the SDRAM as read/write-allocate. As the
Cortex-M7 has its "Dynamic read allocate mode" to automatically switch
back to read-allocate in cases where write allocate is working poorly
(eg large memset), this should result in a performance boost with no
downside.

Activating write-allocate is also an attempt to provoke any flaws in
cache maintenance - the Ethernet transmit buffers for example will be
more likely to have a little data in the cache that needs cleaning.
2019-04-04 12:06:24 +03:00
Mahesh Mahadevan 65942ba906 MIMXRT1050: Fix ENET issues
This is a fix for Issue 10239. The change aligns
the receive buffer lengths

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2019-04-03 08:18:58 -05:00
Seppo Takalo 7a33700bb4 Replace Copyright ARM with a proper Apache 2 license header 2019-02-25 14:17:42 +02:00
Jimmy Brisson f41b78c6b8 Move EMAC implementation to shared target 2018-11-19 09:37:17 -06:00
Mahesh Mahadevan 12c6b1bd88 MIMXRT1050EVK: Add ENET support
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2018-11-14 07:13:07 -06:00
Martin Kojtal 4d8baa7451 emac targets: fix thread cb type 2018-06-29 08:35:20 +01:00
Mika Leppänen 97de145adf Added missing license to header of the file 2018-06-06 14:29:49 +03:00
Mika Leppänen a8402256a3 Corrected TX buffer reclaim error
When all TX descriptors were reserved in a row so that TX buffer
reclaim interrupt did not happen during reservation sequence, after
the interrupt occurred, TX buffer reclaim did no longer free buffers.

This happened because when all descriptors were in use, last free
index pointed to consumed index.
2018-06-06 14:29:49 +03:00
Mika Leppänen a5a8b350ce Ported NXP LPCxx ethernet driver to unified EMAC 2018-06-06 14:29:49 +03:00
Kevin Bracey 7e4eb5c24b LPC546XX: Correct Ethernet length calculations
Subtract 4 from the received packet length - the buffer contains the
CRC, which we shouldn't pass up.

Ensure we allocate receive buffers of a size corresponding to the
rounded-up size we tell the hardware - the hardware was overrunning the
allocation by a couple of bytes.
2018-05-23 12:25:21 +03:00
Mahesh Mahadevan 91ac8356ba LPC546XX: Add ENET support
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2018-05-23 12:25:20 +03:00