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1465 Commits (c356f1f9d45a366fa1a89025e39b3aed54860db8)

Author SHA1 Message Date
Cruz Monrreal 5391a7b6fe
Merge pull request #7700 from cesarvandevelde/bluepill-target-fix 
STM32: Correct device_has_add flags for bluepill_f103c8 target, fixes #7654
 2018-09-18 11:30:35 -05:00
Martin Kojtal b97ac0c353
Merge pull request #7787 from jeromecoutant/PR_MSI_LSE 
STM32L4 : code cleanup in MSI SetSysClock
 2018-09-17 14:22:29 +02:00
Cruz Monrreal 8d9e2e5d0a
Merge pull request #7909 from KariHaapalehto/f411re_iar 
Adjust STMF411xE IAR linker file to mbed-os memory needs.
 2018-09-12 09:20:15 -05:00
Cruz Monrreal d311a96061
Merge pull request #7950 from c1728p9/l4_malloc_fix 
Fix memory allocation on STM32L4 devices
 2018-09-07 22:50:05 -05:00
Martin Kojtal e30435bd08
Merge pull request #7990 from maciejbocianski/qspi_small_fixes 
DISCO_L475VG_IOT01A remove old QSPI pins
 2018-09-07 10:47:19 +02:00
Russ Butler e084865e8e Fix comparison warning on STM32L4 devices 
Cast the pointer used in l4_retarget to uint32_t before comparing it
to fix the warning:
"comparison between pointer and integer"
 2018-09-06 16:07:03 +01:00
Cesar 80c9814fd0 Revert file permissions 2018-09-06 13:57:06 +02:00
Cesar b2d8b54f7d Revert file permissions 2018-09-06 12:56:13 +02:00
Kari Haapalehto 86f966fa00 Adjust STMF411xE IAR linker file to mbed-os memory needs. 
Stack size decreased and heap size increased.
 2018-09-06 13:34:12 +03:00
Yossi Levy acfda5895e Changes in PR #7774 of PinNames.h should be reverted. This commit reverts those files excpet for K82F and K64F which are left as an example 2018-09-05 14:13:05 +03:00
Maciej Bocianski 050604f1b8 DISCO_L475VG_IOT01A remove old QSPI pins 2018-09-05 09:58:20 +02:00
Martin Kojtal 44925d8527
Merge pull request #7579 from u-blox/ublox_odin_driver_os_5_v3.0.0_rc1 
Updated ODIN drivers to v3.0.0 RC1
 2018-09-03 09:25:32 +02:00
Cruz Monrreal 993c897b55
Merge pull request #7774 from yossi2le/sd-spif-to-mbed-os 
Add default block device support (SD, SPIF and FLASHIAP)
 2018-09-01 11:15:13 -05:00
Russ Butler e2d003a420 Fix memory allocation on STM32L4 devices 
Depending on initial size allocated on STM32L4 devices with
TWO_RAM_REGIONS  set a crash may occur. This is because there is a
mismatch between the size newlib is expecting and the size actually
returned by _sbrk. This is because the STM32L4 implementation of _sbrk
is performing alignment internally.

This patch fixes this problem by removing the code in __wrap__sbrk
which performs the alignment.
 2018-08-31 18:31:52 -05:00
Cesar f91bba9803 Updated pinmap to fix CAN and enable UART hardware flow control 2018-08-31 17:17:29 +02:00
Ammad Rehmat b934632653 Access Point API 2018-08-31 11:33:30 +05:00
Yossi Levy ed8e170d15 Moving SD, SPIF and FLASHIAP into mbedos and refactoring features storage directory structure. 2018-08-29 12:01:11 +03:00
Juho Eskeli d5b374b327 Correct comment about stack size in IAR linker file 2018-08-28 08:44:08 +03:00
Juho Eskeli 5cc06238ea Enable bootloader for NUCLEO_F207ZG 2018-08-28 08:44:08 +03:00
Juho Eskeli 22137b45dd Update NUCLEO_F207ZG linker files 2018-08-28 08:44:08 +03:00
Cruz Monrreal 2f8e679183
Merge pull request #7592 from orenc17/remove_uvisor 
Remove uVisor from mbed-os
 2018-08-25 19:52:24 -05:00
Maciej Bocianski 5195c820e6 standardise QSPI pin names 2018-08-24 12:09:51 +02:00
Oren Cohen 787317b7eb Remove uVisor from mbed-os 2018-08-22 16:36:59 +03:00
Maciej Bocianski 3bf9df7b56 target DISCO_F413ZH: add QSPI flash pin names 2018-08-22 15:02:13 +02:00
adustm 6095ccf1b4 Add reset internal state before call to HAL_QspiInit function 2018-08-22 15:02:11 +02:00
adustm 7dda4e4fc6 Implement qspi_free function 2018-08-22 15:02:10 +02:00
adustm 5c26e15cd3 Fix support of max flash size 2018-08-22 15:02:09 +02:00
jeromecoutant 43258a8ff4 STM32 : add all QSPI pins in available targets 2018-08-22 15:02:08 +02:00
Maciej Bocianski 67798d6eb2 STM: add qspi pin names for DISCO_L475VG_IOT01A 2018-08-22 15:02:04 +02:00
Maciej Bocianski 42935bbdc0 STM qspi: temporary fix for qspi_free return value 2018-08-22 15:02:03 +02:00
adustm 2f06423a89 Add support for QSPI on DISCO_L476VG 2018-08-22 15:02:01 +02:00
adustm c00e49fcf2 Enable QSPI for DISCO_F746NG 2018-08-22 15:01:54 +02:00
adustm 293d1bda42 Add MBED_WEAK for pins 2018-08-22 15:00:22 +02:00
adustm 9b4b28fc3f Support maximum flash size : 4Gbytes 2018-08-22 15:00:22 +02:00
adustm 50b8225948 Enable QSPI feature for DISCO_F413ZH platform 2018-08-22 15:00:21 +02:00
adustm c57a47e4b5 Change default FlashSize to 64Mbit = 8Mbytes = 0x800000 2018-08-22 15:00:20 +02:00
adustm 8e08740237 Fix Instruction with no data command 
Adding QSPI_DATA_NONE activates the transfer
of the command inside HAL_QSPI_COMMAND function
 2018-08-22 15:00:19 +02:00
adustm 05899e9c70 Fix Address.Size and AlternateByes.Size by shifting them 
The ST HAL code is waiting for the correctly shifted vlue
(for a direct write into the HW register)
 2018-08-22 15:00:18 +02:00
Martin Kojtal d282c81e86 QSPI: add STM32L4 support 
Disco IoT board support for QSPI. As it does not have dual flash support in QSPI,
we need to fix qspi hal implementation.
 2018-08-22 15:00:17 +02:00
Martin Kojtal 0f7fd757a4 QSPI: add flash pins for F469 disco board 2018-08-22 15:00:16 +02:00
Martin Kojtal c778c90184 QSPI STM32: fix default fifo and cycle 
As example for DISCO F469NI defines them
 2018-08-22 15:00:15 +02:00
Martin Kojtal 8783956a77 QSPI STM32: fix prepare comman - alt/address 2018-08-22 15:00:14 +02:00
Martin Kojtal fff20729be QSPI STM32: fix command transfer 
use write/read from STM32 driver
 2018-08-22 15:00:14 +02:00
Martin Kojtal 5038b38622 QSPI STM32: fix pin merging 
hw name as input
 2018-08-22 15:00:13 +02:00
Martin Kojtal 16ca742d87 QSPI STM32: fix disabled format phase 2018-08-22 15:00:12 +02:00
Martin Kojtal 2766672f64 QSPI STM32: add QSPI_x support to pinnames 2018-08-22 15:00:12 +02:00
Martin Kojtal 660d250e0d QSPI STM32: init returns error if failed to init 2018-08-22 15:00:11 +02:00
Martin Kojtal 551f044e77 QSPI STM32: add qspi_command_transfer implementation 2018-08-22 15:00:11 +02:00
Martin Kojtal 6e5b889e52 QSPI STM32: remove polling from write/read 
This will be part of custom instruction transfer, the flow will be:

1. write data
2. wait for transfer to complete (poll status register from the memory device)
 2018-08-22 15:00:10 +02:00
Martin Kojtal 8da072d8af QSPI STM32: set default command values to none 2018-08-22 15:00:10 +02:00