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8536 Commits (c25a513612ac604454328cc3075d9de7047ace5f)

Author SHA1 Message Date
Laurent MEUNIER 37f84ca840 Clean-up style issues 
Fix indentation issues, remove useless comments, correct if/else format
 2016-10-14 16:15:31 -05:00
Laurent MEUNIER 6b3d9b2427 SPI Peripheral pin - allow SPI3 to be used 
Let's swap default PA_4 pin mapping to SPI_3 otherwise SPI3 cannot be used
 2016-10-14 16:15:30 -05:00
Laurent MEUNIER 5376654581 Enable SPI_ASYNCH on STM32 boards 
Now that SPI_ASYNCH is supported on all STM32 based boards,
let's activate the feature.

Using a default SPI QUEUE of size 2 - this can be later modified if this
prives to be to low. (or too high)
 2016-10-14 16:15:29 -05:00
Laurent MEUNIER 0dcd5083f3 spi_master_write - rely on HAL 
ASYNCH SPI transfer support has been added based on STM HAL services.
To have both ASYNCH and SYNCH work together, we're also moving the
write API to STM HAL instead of direct registers access.
 2016-10-14 16:15:28 -05:00
Laurent MEUNIER 0e5d0bda91 Deploy SPI_ASYNCH to all family 
the SPI_ASYNCH feature has been already activated for STM32F4.
This patchset makes it supported on all STM32 families by:
- moving spi_s structure at family level instead of board level
- using the F4 spi_api.c reference implementation and making it a common
stm_spi_api.c file which makes maintenance a lot easier.
- the only part that needs to be implemented for each family is the computation
of the clock frequency input to the spi peripheral which is not the same
accross families. So this is what remains in the spi_api.c of each family.

Because of the introduction of the common file, all the above modifications
needs to be done at once.
 2016-10-14 16:15:27 -05:00
Mahadevan Mahesh 504b2ac6b6 Update tests to add support for FRDM KL43Z and FRDM KL82Z 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-10-14 16:15:26 -05:00
Mahadevan Mahesh eac9244eab Add support for KL82Z FRDM board 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-10-14 16:15:25 -05:00
Russ Butler 150caecf30 Revert "Allow max-depth specification in memap" 
This reverts commit 8f9f4eefed since
it broke memory map info for IAR, ARMCC and on windows, GCC_ARM.
 2016-10-14 16:15:23 -05:00
jeromecoutant ac93f9e41f Add Arduino form factor for DISCO_F746NG and NUCLEO_F767ZI 2016-10-14 16:15:22 -05:00
Bartek Szatkowski b2671a367c Accept profile name as well as file path for tools/make.py --profile 
--profile can be used with just a profile name eg. default, debug as
long as <name>.json file is in default profile directory.
 2016-10-14 16:15:21 -05:00
Wolfgang Betz 857786e303 I2C bugfix 'i2c_stop()' timeout 
- Remove waiting for 'BTF' flag in 'i2c_stop()':
  When 'i2c_stop()' is called from 'i2c_read()' or 'i2c_write()' flag 'BTF'
  has already been cleared (indirectly) by the calling functions and therefore
  'i2c_stop()' would mistakenly always run into a timeout.
- Delay clock enabling until pins are configured:
  Enabling the I2C bus clock before configuring its pins might in rare
  cases lead to HW faults on the bus.
- Move initialization of 'handle->Instance' to function 'i2c_reset()':
  As 'i2c_reset()' uses '__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)' field
  'handle->Instance' must have been initialized before doing so. Therefore,
  this operation has been anticipated by moving it from function
  'i2c_frequency()' to function 'i2c_reset()'.
 2016-10-14 16:15:20 -05:00
andreas.larsson e965c34e66 Fixed wrong stack pointer 2016-10-14 16:15:19 -05:00
andreas.larsson eb2b7f05f2 Enabled TRNG functionality for UBLOX_EVK_ODIN_W2 target. 2016-10-14 16:15:18 -05:00
Alessandro Angelino d190ec0b7d EFM32: Add support for uVisor 2016-10-14 16:15:16 -05:00
Alessandro Angelino ab1ed711ae EFM32: Use SECURE_ACCESS to access the ROM table 
To allow enabling of uVisor on EFM32, the ROM table must be accessed
through the CMSIS-provided SECURE_ACCESS macro.
 2016-10-14 16:15:15 -05:00
Alessandro Angelino 7711f0a362 EFM32: Make NVIC functions virtualizable 
With CMSIS 5, the NVIC functions are virtualizable. Rename the EFM32
NVIC functions to support being virtualized.
 2016-10-14 16:15:14 -05:00
pradeep-gr acd91ec098 Low power timer fine tuned for smaller duration 2016-10-14 16:15:13 -05:00
Laurent MEUNIER 0b2725e7cf cmsis to device changes 2016-10-14 16:15:12 -05:00
ccli8 84dbcc540d Move files to match ARM mbed's restructure 
1. Move M451Series.h to device.
2. Move StdDriver to device.
3. Move TOOLCHAIN_* to device.
4. Move cmsis*, startup_M451Series.c, and system_M451Series.c/h to device.
 2016-10-14 16:15:10 -05:00
ccli8 5bb0d4030f Add device_name into targets.json 2016-10-14 16:15:09 -05:00
ccli8 928bdc4ae2 Fix SD pinmaps are not extern'ed 2016-10-14 16:15:08 -05:00
ccli8 e06a7b2753 Move files to match ARM mbed's restructure 
1. Move USBHALHost_M451.cpp and USBHALHost_NUC472.cpp.
2. Move TARGET_M451/mbed_lib.json.
3. Move TARGET_NUC472/crypto.
4. Move TARGET_NUC472/mbed_lib.json.
 2016-10-14 16:15:06 -05:00
ccli8 03d00df0ca Fix pin definition error regarding SD, I2C, and SPI 
1. Fix pin definition error regarding SD.
2. Fix pin definition error regarding I2C.
3. Fix pin definition error regarding SPI.
4. Add pinmap for SD.
 2016-10-14 16:15:05 -05:00
cyliangtw 0b60434327 EMAC buffer address word alignment 2016-10-14 16:15:04 -05:00
ccli8 20ad95dea7 Fix buffer overflow in BSP SD driver 2016-10-14 16:15:03 -05:00
cyliangtw c066b6ce75 Fix warnings in aes_alt 2016-10-14 16:15:02 -05:00
cyliangtw 5ed75ce940 support mesh in IAR tool chain 2016-10-14 16:15:01 -05:00
cyliangtw 6685b4a8ce support mesh in GCC tool chain 2016-10-14 16:15:00 -05:00
cyliangtw faae13e650 remove warnings 2016-10-14 16:14:59 -05:00
ccli8 2c675f94ab Fix warnings generated by armcc 2016-10-14 16:14:58 -05:00
ccli8 c9f031b638 Fix warnings generated by armcc 2016-10-14 16:14:57 -05:00
ccli8 c273b44d17 Refine comment for two-region model 2016-10-14 16:14:56 -05:00
ccli8 e54aad9183 Disable GPIO IRQ debounce by default 
Some application requires GPIO IRQ to be low latency. To complement it, open up GPIO IRQ debounce configuration through mbed_lib.json.
 2016-10-14 16:14:55 -05:00
ccli8 54db3f4dec Refine us_ticker.c code 2016-10-14 16:14:54 -05:00
cyliangtw e478d243f2 move aes ZI data into external SRAM for mbed client example 2016-10-14 16:14:53 -05:00
ccli8 b35adc6569 Remove fix of lp_ticker wrap-around 
The original fix cannot handle both wrap-around and scheduled alarm behind now well.
Leave wrap-around as known issue.
 2016-10-14 16:14:52 -05:00
ccli8 5ff2d6705f Fix us_ticker/lp_ticker alarm error 
Error occurs as newly scheduled alarm is behind now due to signed/unsigned comparison pitfall:
-1 < 1u ==> 0 or 1
 2016-10-14 16:14:51 -05:00
ccli8 adac6c639a Fix greentea lp_ticker failed tests 2016-10-14 16:14:50 -05:00
cyliangtw 31ed413756 aes_alt support GCC 2016-10-14 16:14:49 -05:00
ccli8 d77082f402 Fix no wait for finish of SHA block process 2016-10-14 16:14:48 -05:00
ccli8 77f231fb59 Fix SHA accelerator errors 
1. Fix clone SHA context error. Convert SHA H/W context to SHA S/W context due to just one instance of SHA H/W.
2. Fix partial update error.
 2016-10-14 16:14:46 -05:00
cyliangtw d4609a5166 Improve HW AES CFB mode performance for byte cnt non-word alignment 2016-10-14 16:14:45 -05:00
cyliangtw c59ef5c0b4 Support block chain & partial block in HW AES CFB mode 2016-10-14 16:14:44 -05:00
cyliangtw 8bab8e2f52 Support HW AES CBC block chain & AES CFB 2016-10-14 16:14:43 -05:00
ccli8 1a67f84016 Integrate AES S/W algorithm for verifying NUC472 AES accelerator 2016-10-14 16:14:42 -05:00
ccli8 0268ab2439 Organize NUC472 crypto files 2016-10-14 16:14:41 -05:00
ccli8 9915ad38af Fix aes compile error with gcc 2016-10-14 16:14:40 -05:00
ccli8 cedb9ee154 Integrate NUC472 SHA accelerator 2016-10-14 16:14:39 -05:00
cyliangtw 01510da2b1 Integrate NUC472 AES 2016-10-14 16:14:38 -05:00
ccli8 1cdb46e9b4 Integrate NUC472 DES/TDES accelerator 2016-10-14 16:14:37 -05:00