Remove redundant memory regions, and merge multiple RAM regions into one
to solve ielftool zero padding issue.
The side effect is less control over object files placement. It's all up
to linker's best effort.
Signed-off-by: Tony Wu <tonywu@realtek.com>
lp_ticker driver is the known registered user of RTC handler API.
In case, a lp_ticker is set in the past, the lp_ticker_fire_interrupt
will be called which itself sets the RTC interrupt as pending by calling
NVIC_SetPendingIRQ(RTC_WKUP_IRQn). This all happens without actual
programing of the RTC wake-up.
As a result the RTC HW and corresponding HAL layer doesn't expect an
interrupt to happen and will not call HAL_RTCEx_WakeUpTimerEventCallback.
To sove this situation, we will not use HAL_RTCEx_WakeUpTimerEventCallback
weak definition but rather call handler whenever an RTC interrupt fires.
Change implementation of timeout to one that is using us_ticker hal.
Timeout is now configurable by I2C_TIMEOUT_VALUE_US macro and this
value will be imported if will be defined externaly.
- Added curly brackets to single line conditions in gpio_qpi.c and gpio_irq_api.c;
- Changed rx and tx buffers in serial module as local variables;
- Minor i2c & spi updates for github pull request;
- Added function definition for spi_master_block_write.
- Added a configuration call in trng_init to make sure the TRNG buffering mode is disabled, so only 8-bit bytes are returned;
- Moved the TRNG device handle into the trng_t structure;
- Fixed some formatting errors in the adc driver.
Fix ARMC6 guard typo introduced in commit 4f3f0cc9cc (Make Realtek link)
While at it, remove redundant ISR_STACK_SIZE assignment for ARMCC.
Signed-off-by: Tony Wu <tonywu@realtek.com>
Target of LPC1769 links to mbed LPC1768.
The PinNames.h has conditional compile for the pin names.
LWIP lpc17xx emac driver modified to allow LPC1769 target
Fixes#5115.
`analogin_read_u16` returns a value in the range `0x0000 - 0xFFF0`
since the resolution of the ADC is 12 bits. However, in
`analogin_read` this value gets divided by `0xFFFF` assuming the range
is `0x0000-0xFFFF`. This causes a small error in the value returned by
`AnalogIn::read` for the EFM32 target.
The allocation of GPIOTE channels for DigitalIn is unwanted behavior.
This caused early run-out of channels for InterruptPin.
This patch replacing input configuration that is using gpiote driver by configuration that is
using gpio hal.
Previous the voltage range was set to 1.2 from SoC internal reference source.
This caused problem with testing. It is unexpected that range is much
shorter than vdd as well.
The voltage range was extended using SoC build in analog prescaler (set to 1/3).
From RM:
32.3.2.6 Interrupts during IAP
The on-chip flash memory is not accessible during erase/write operations. When the user
application code starts executing the interrupt vectors from the user flash area are active.
The user should either disable interrupts, or ensure that user interrupt vectors are active in
RAM and that the interrupt handlers reside in RAM, before making a flash erase/write IAP
call. The IAP code does not use or disable interrupts.
The use of mktime was causing a fault when called in interrupt handler because on GCC it lock the mutex protecting the environment, To overcome this issue, this patch add dedicated routine to convert a time_t into a tm and vice versa.
In the process mktime has been optimized and is now an order of magnitude faster than the routines present in the C library.
commit f7bc126 (Re-work Rtl8195AM ticker) tried to address ticker drifting
issue, but in fact broke ticker functionality. This patch adjusts us_ticker
porting to unbreak it, and to fix the following tests:
mbed-os-tests-mbed_drivers-ticker
mbed-os-tests-mbed_drivers-timeout
mbed-os-tests-mbedmicro-rtos-mbed-isr
mbed-os-features-frameworks-utest-tests-unit_tests-minimal_async_scheduler
mbed-os-features-frameworks-utest-tests-unit_tests-case_control_async
mbed-os-features-frameworks-utest-tests-unit_tests-case_async_validate
Changes are:
1. Dont disable timer after every us_ticker interrupt. That basically
breaks ticker functionality.
2. Fine-tune us to tick conversion macro. Previous conversion method
yields 1 tick drift every 2 ms.
3. Remove special placement of ticker objects. No longer necessary.
Signed-off-by: Tony Wu <tonywu@realtek.com>
As reported by MBED user Fran6Jack:
I2C bus are usually 5V tolerant on all STM32 processor.
If an external device on the I2C bus requires 5V operation,
we usually acheive it by using 5V external pull-ups on the bus.
Since signaling uses open-drain output on I2C for both signal SCL and SDA
any 5V tolerant MCU will work on a 5V I2C bus. Having pull-up activated on a 5V externally pull bus, cause the pin to clamp on the STM32 die diode and could damage the IC (There is a note in STM32 datasheet specifying this issue).
It is understood by all the community that I2C bus should always be
externally pulled by physical resistor. I2C initialization should then
be ALWAYS OpenDrainNoPull by default.
Up to now, this I2C driver was setting pull up by default as it helps
basic testing, like 1 master and 1 slave, conencted with 2 wires without
any external pull ups. This will not work anymore after this commit and
applications tests or examples needs to be modified to explicitely
configure pull ups ... But it is safer to follow reference manual
guidelines.
When the RTOS is present and the tickless mode is not implemented, it is
expected that the next tick issued by the Systick timer will wake up the MCU.
However nothing prevents an implementation of the ARM architecture to gate the
systick clock signal upon sleep entry.
Therefore on those targets sleep shall be prohibited if the RTOS is present and the
tickless mode is not implemented.
To ease life of porters , a new option has been added in the device add list:
STCLK_OF_DURING_SLEEP. This option expose that the target turn of the systick
clock during sleep.
Targets which exhibit such behavior shall add this define in their device_has list.
There was some interesting stuff here.
* ARMC6 treats assembly the same as GNU, but has a different startup
function, so we branch the asm there
* Incorrect discriminant, probably copied from other ports
Add NOPs after deep sleep to prevent unexpected behavior. It appears
that the first one or two instructions after deep sleep do not get
executed properly.
Note - This is a temporary workaround. For a more robust solution
the NCS36510 needs to investigate the root cause of this issue.
The NCS36510 is not suitable for tickless, since its LP ticker cannot
be scheduled fast enough. This is because it takes four 32KHz clock
cycles before these writes take effect - ~120us.
Decrease the interrupt stack from 2k down to 1k so there is enough
ram to build all the tests with tickless enabled. In general, targets
should not need an interrupt stack greater than 1k with mbed-os.
Some Cortex-M0 devices, such as the nrf51, don't have the SysTick.
Instead, these targets use a software interrupt to simulate SysTick.
Add the hooks in the tickless code to support these devices. Targets
which do not have SysTick should now define NO_SYSTICK in targets.json
and implement mbed_get_m0_tick_irqn to add os suport.
This patch also removes os tick handling from the existing devices
(nrf51) since this is now handled in common code.
IAR 8.x compiler throws error for emac_interface_t constructor
rtw_emac.cpp@220,0: [Pe1790]: the default constructor of "emac_interface"
cannot be referenced -- it is a deleted function
Error is because new object is created of structure with constant member.
Resolved it by using malloc instead new.
Rather than Unlocking flash during flash object creation, and leaving
the flash possibly continuously unlocked a(s object might bever be freed),
we decide to Unlock then Lock again at each erase or program call.
Fixing regression introduced in commit
"Ticker: add fire interrupt now function".
In above mentioned commit, the management of timestamp being in the past
has been moved to higher layer (hal/mbed_ticker_api.c), but the reset of
oc_int was missing when implementing the new us_ticker_fire_interrupt
function - which is fixed now.
After reset the MCR register content needs to be restored so we're
introducing the can_registers_init function to be called at the first
init stage, but also after reset. We also store the can frequency to
go through the initialisation phase again.
In order to apply the same mode in case of reset, we store the current
requested mode in the HAL structure.
To make storage in a single place, we also change can_monitor to call
can_mode function as they actually acting on same registers.
Instead of a static object, this will make driver
instantiation more robust and allow to re-use init
configuration on a need basis.
The CANName struct member is actually the CAN registers base address,
which is now available in the CanHandle.Instance field, so we don't need
CANName anymore.
Since mbed-os 5.4.3, something increased foot print of mbed-os and the applications that were barely fitting in started to spill.
IAR toolchain for LPC176x target family is set to use 2 RAM regions (32K each). RAM region
2 is being used for ETH/USB and 1 is being used for vector table, stack/heap/static data.
In this commit we have decreased heap size allocation from 8K to 7K so that the is more room for stack and static data.
If NVIC_NUM_VECTORS is larger than the space allocated by the vector
table in ram (__ram_vector_table_size__) then the call to mbed_cpy_nvic
during boot will corrupt valid data, which can lead to a crash. This
patch fixes the declared number of vectors on the KL27Z, KL43Z and
KL82Z to fix this crash.
Adding flash API support to STM32F7 family. The code is derived from
F4 family one. The memory topology is described in flash_data.h files
and the flash_api.c implementation manages the 2 possible memory types (1
or 2 banks).
Users of FlashIAP usually get the minimum programable size
by calling flash.get_page_size(), so let's return the minimum
to allows a most efficient usage of flash.
For F4 devices, this is 1 byte.
For L0 and L1 devices, this is a word (4 bytes).
For L4 devices, this is a double word (8 bytes).
First add the flash_data.h that describe the flash memory topology,
and also activate FLASH support for the corresponding targets.
This is a 1,5MB flash memory device which contains 15 sectors, where
sectors 12 to 15 are 128KB sectors. So flash_api.c needed has been
updated to differentiate between this flash memory and the 2MB ones
by checking existence of sector 16 instead of sector 12.
UBLOX_ODIN_EVK_W2 is missing the abstract button definitions originally
introduced with PR https://github.com/ARMmbed/mbed-os/pull/4249.
Fix two tab to spaces issues on the go as well.
It is required to enable AFIO clock before using __HAL_AFIO_REMAP_xy
macros, which was missing here. Without clocks enable, the remap
actually doesn't occur. This would possibly cause some PIOs (part of
PB_3, PB_4, PA_13, PA_14, PA_15) to not behave as expected.
In most cases AFIO clock was enabled in stm_pin_SetAFPin function, so
that this bug was not visible. But there were few cases left were
stm_pin_DisconnectDebug would be called first. A typical case was
with GCC_ARM in case a DigitalInOut variable is declared as global.
On F410RB, the size reserved to vectors with ARM toolchains was not properly
defined,which was not the case for other toolchains.
This would cause few tests to fail like EXAMPLE_1 with below error:
HOST: Unknown property: mbed assertation failed: _ptr == (T *)&_data, file: C:/github/mbed/BUILD/mbed/platform/SingletonPtr.h, line 91
Enabling SPI causes the clock to be output by default.
Most devices will not care about extra clock cycles, especially as long
as chip select is not active, nevertheless this may cause side issues
with other devices especially during init phase.
This was actually the case with a 3 wire device (LPS22HB sensor).
In case MISO is not passed at SPI init, then we consider a 3 wires SPI
configuration is requested, which corresponds to SPI_DIRECTION_1LINE
configuration parameter in STM32 HAL layer.
We're then handling this specific case of SPI_DIRECTION_1LINE,
in spi_master_write or spi_master_block_write, we call to HAL API
Functions 'serial_break_set' & 'serial_break_clear' wrongly removed during 'SERIAL_FC disabled, critical section API Updation' commit.
Due to this 'mbed compile' command for GCC_ARM tool fails to compile.
- Removed the patterned LED sequence, all boards now use the 4 fast pulse, 4 slow pulses LED sequence.
- Changed the LED used from LED_RED to LED1. Only 58/174 targets seem to define LED_RED but they all define LED1.
- Removed all ERROR_RED and ERROR_PATTERN definitions from targets/targets.json