In this commit, the analogin_s structure is moved to commonn_objects.h file
to limit the duplicaion.
The ADC handle is moved from a global variable to a struct member of the
analogin object. This allows multiple ADC instances to work correctly.
Note that State needs to be explicitely set to HAL_ADC_STATE_RESET
because the object is not zero initialized.
TXE indicates that a byte can be written to UART register for sending,
while TC indicates that last byte was completely sent. So the TXE flag
can be used in case of interrupt based Serial communication, to allow
faster and efficient application buffer emptying.
Also TXE flag will be erased from the interrupt when writing to register.
In case there is nothing to write in the register, the application is
expected to disable the interrupt.
The RXNE flag is getting cleared when reading Data Register so it should
not be cleared here. Especially in case of high data rate, another byte of
data could have received during irq_handler call and clearing the flag
would read and discard this data which would be lost for application.
MAX32630FTHR gets BLE, uses timer peripheral 5 for HCI timing
libexactLE update for 610,620
Fixup hal_sleep and hal_deepsleep for 620
LEDn outputs now forced to open-drain
fire_interrupt function should be used for events in the past. As we have now
64bit timestamp, we can figure out what is in the past, and ask a target to invoke
an interrupt immediately. The previous attemps in the target HAL tickers were not ideal, as it can wrap around easily (16 or 32 bit counters). This new
functionality should solve this problem.
set_interrupt for tickers in HAL code should not handle anything but the next match interrupt. If it was in the past is handled by the upper layer.
It is possible that we are setting next event to the close future, so once it is set it is already in the past. Therefore we add a check after set interrupt to verify it is in future.
If it is not, we fire interrupt immediately. This results in
two events - first one immediate, correct one. The second one might be scheduled in far future (almost entire ticker range),
that should be discarded.
The specification for the fire_interrupts are:
- should set pending bit for the ticker interrupt (as soon as possible),
the event we are scheduling is already in the past, and we do not want to skip
any events
- no arguments are provided, neither return value, not needed
- ticker should be initialized prior calling this function (no need to check if it is already initialized)
All our targets provide this new functionality, removing old misleading if (timestamp is in the past) checks.
Depending on families, different HAL macros are defined to check the
state of serial interrupts. In several cases, we can find only 1 macro:
__HAL_UART_GET_IT_SOURCE
Checks whether the specified UART interrupt has occurred or not
But in F0, F3, F7, L0, L4 there are 2 different macros
__HAL_UART_GET_IT
Checks whether the specified UART interrupt has occurred or not
__HAL_UART_GET_IT_SOURCE
Checks whether the specified UART interrupt source is enabled.
In the later case, __HAL_UART_GET_IT_SOURCE was being used so far,
but actually needs to be replaced by __HAL_UART_GET_IT. Using the right
macro, we also check the proper flags accordingly.
1. With mbed OS 5, mbed_sdk_init() is ensured to call before C++ global object constructor.
2. Refine startup file with GCC_ARM toolchain related to this modification.
Some I2C devices require specific zero length read/write sequences which
the HAL_I2C_IsDeviceReady() redirect interferes with. After Removing
these redirects, it was confirmed that zero length reads and writes
would both still work correctly for detecting presence/absence of an
I2C device on a bus.
The symbol Systick_Handler was defined as a weak symbol in us_ticker.c and
startup_nRF51822.s. While it work as expected when an application is compiled
from mbed OS source code it creates a duplicate symbol issue when mbed OS is
bundled as a library.
Do not ticker read in ISR, use reminder to schedule the next interrupt, this should make ticker much faster.
read - disable Timer0 while reading it, if ISR is pending just reread the time again via read() function
These 2 improvements should decrease time spent when reading/scheduling ticker
events.
In case we've run through the entire GPIOs loop, withouth finding a
matching interrupt, we're in the case of a spurious interrupt, let's
raise an error to track it down.
When disabling GPIO irq, also the falling / rising edge settings need
to be reset (EXTI_RTSR and EXTI_FTSR registers).
If not reset, the same EXTI line can be later enabled again with a wrong
Rising / Falling configuration. This was especially seen and reported in
ci-test tests-api-interruptin on NUCLEO_F446RE target where DIO2=PA_10 and
DIO6=PB_10 were successively tested: as they are sharing the same EXTI_LINE
(EXTI_10), this resulted in calling the irq_handler with wrong
IRQ_FALL/IRQ_RAISE parameter and donothing being called in loop.
This commit completely rewrote flash_api.c in a few places so kicked out changes from Master and accepted the branch changes.
F429 + F439 : changes after code review
GetSector has been rewritten
- default value is the same as before patch
- system_stm32f4xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c
- nvic_addr.h file is now in TARGET_STM level, and can be used everywhere
Use serial-box of Nordic nRF5 SDK to share resource between
SPI and I2C.
SPI is allocated from highest hw instance number resource in order
to allocate as many I2C instances as possible.
With default sampling time, the MBED2 and CI test shield tests would fail
because the stabilization slope of ADC is relatively slow.
ERROR (out:0.8000) - (in:0.7407) = (0.0593)
ERROR (out:0.9000) - (in:0.8354) = (0.0646)
ERROR (out:1.0000) - (in:0.9289) = (0.0711)
This is related to the 10kOhms resistors used to connect Ain to
Aout mounted on the CI shileds, and internal capacitance of L0 targets.
If connecting Ain and Aout with wires, bypassing the resistors, the test
is passed. So we're increasing the sampling time to let the automated
ci shiled tests PASS.
OK (out:0.8000) - (in:0.7863) = (0.0137)
OK (out:0.9000) - (in:0.8869) = (0.0131)
OK (out:1.0000) - (in:0.9844) = (0.0156)
Moving some code in common to be able to manage several ADC instances,
or several channels of an instance.
The change involves:
- moving dac_s structure definition to common_object.h
- create TARGET_STM/analogout_api.c and move fully common analog_out
functions in there
- rename analogout_api.c of each target family into analogout_device.c
to keep platform specific code
- update analogout_device.c to rely on obj->handle and obj->channel
- align analogout_init function as much as possible between families in
analogout_device.c files
ADC1 channel2 and ADC2 of few targets only have an output switch and no
buffer. This switch needs to be enabled, and also the buffer can be enabled
in order to reduce the output impedance on output, and to drive external
loads directly without having to add an external operational amplifier.
This allows a proper handling of multiple instances. Also this commit
stores the channel in the HAL format so that it can be re-used more easily
and call to HAL are straightforward.
"FAMILY_STM32" has been creeated with all common features.
All STM32 devices can now inherit from it.
This will simplify readability and maintainability.
+ VBLUno51 board:
Nordic nRF51822
Bluetooth Low Energy
DAPLink interface
Arduino UNO pinout compatible
4 Power
+ Wiki: https://vngiotlab.github.io/vbluno/
+ Pass all test case in mbed test suite
Signed-off-by: iotvietmember <robotden@gmail.com>
1. Support CMSIS_VECTAB_VIRTUAL feature
2. Reduce the register sync waiting time in LP ticker
3. Adjust the stack and heap size in GCC and IAR toolchains
This commit implements a SPI mode which will offer better performance
thanks to usage of Lower Layer API which use fewer registers access,
at the cost of lower robustness (no error management).
This patch updates CMSDK_CM3DS.h to remove the
DMA peripheral memory map and defines, as
that peripheral is not present in the system.
In addition, some define names where updated
concerning rtc. RTC_api was updated accordingly.
This patch also updates SMM_MPS2 to align defines and
comments.
Signed-off-by: Marc Moreno <marc.morenoberengue@arm.com>
This patch implements pin_function and gpio_set
with some fixes in the PinNames.
The patch also updates the serial and spi
drivers to use the pin_function.
Signed-off-by: Marc Moreno <marc.morenoberengue@arm.com>
Following
Merge pull request #4063 from LMESTM/17q2_L4_bootloader
the NUCLEO_L476RG binairies could not boot anymore.
The change done in #4063 was derived from work on NUCLEO_L429ZI target
which supports uvisor. The VECTORS defintiion is introduced as part of
uvisor support and requires further changes in ld file which were missing.
As uvisor is not considered yet, we remove VECTORS for now and will
introduce only when needed.
Remove HAL_Init and related code from SystemInit and move it to
mbed_sdk_init. The function SystemInit is called early in the boot
sequence before RAM is initialized or the VTOR is setup, so it should
not be used to perform the HAL initialization.
This fixes crashes due the vector table being used before it has been
relocated.
This reduces the number of loads inside of the .data copy loop by 3 by using one more register. It should work on any STM32 with at least 5 general-purpose registers. If only 4 are available, then 1 load could still be removed from the original implementation.
1. Add startup code and linker script for IAR and
GCC_ARM compilers.
2. Enable IAR and GCC_ARM compilers in targets.json.
Change-Id: I742a89ae73a4e5ede980a8af0821c3f0e5a461ef
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>
Based on lwip_ethernetif.c skeleton file,
use init, receive and transfer
functionality of SMSC9220 Ethernet driver
for the lightweight IP stack.
Receive mechanism is interrupt driven.
HW buffer sizes:
Tx = 4608 bytes (MTU)
Rx = 10560 bytes
lwIP fine tuning:
mbed-os/features/FEATURE_LWIP/lwip-interface/lwip/src/include/lwip/opt.h
Change-Id: I0ea95650c65fb32cafb5c2d3dde11420c61dba66
Signed-off-by: Gabor Kertesz <gabor.kertesz@arm.com>
- Creates new target in targets.json
- Creates device specific files under ARM_SSG/CM3DS_MPS2 directory
- Driver layer files under CM3DS_MPS2 are based on Beid target
- Device specific files under CM3DS_MPS2/device are based on CMSIS_5 and Beetle
Change-Id: I29ea7a7f42b11cf25b516cce4b9255ab828ca019
Signed-off-by: Tamas Kaman <Tamas.Kaman@arm.com>
Signed-off-by: Marc Moreno <marc.morenoberengue@arm.com>
Define CMSIS_VECTAB_VIRTUAL for the M0 targets which have a
corresponding driver. The only M0 target missing this is the LPC4330_M0
which is not part of the 2 or 5 release.
Restore cmsis_nvic (cmsis_nvic.c and cmsis_nvic.h) files for the
implementations which use a mechanism other than the VTOR to set
interrupts. These are vendor specific and were done for M0 devices
which do not have a VTOR.
Note - There were two cmsis_nvic files which did not use the VTOR that
which not restored in this patch. This is because these targets were
not M0 devices and could use the new unified implementation instead.
These files are:
targets\TARGET_ARM_SSG\TARGET_MPS2\TARGET_MPS2_M0P\device\cmsis_nvic.c
targets\TARGET_ONSEMI\TARGET_NCS36510\device\cmsis_nvic.c
Note - cmsis_nvic.c and cmsis_nvic.h were initial removed in
(and restored from) the commit:
b97ffe8fdc -
"CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation"
Note that this could have side effects on the application as it would
not be aware that data has been missed. This may be later solved by
adding an error management parameter to the Serial API in mbed.
The advantage is that the serial link can work again.
The use of mktime was causing a fault when called in interrupt handler because on GCC it lock the mutex protecting the environment, To overcome this issue, this patch add dedicated routine to convert a time_t into a tm and vice versa.
In the process mktime has been optimized and is now an order of magnitude faster than the routines present in the C library.
The Ameba RTC driver converts time_t to
second/minute/hour/day/month/year in rtc_write and back to time_t in
rtc_read. Replace this with an implementation which uses time_t
directly.
* Make memory sections configurable in linker files
* Dynamically determine vector location in flash for NVIC relocation
* Advertise bootloader support in targets.json
When using ARM Compiler 5, the RTX config hard-coded the heap and stack
sizes to specific values. This prevented the RTX HAL from dynamically
allocating unused memory as heap space.
Specifically, the HEAP_START define prevents this logic in RTX_CM_lib.h
from activating. The rest of the defines are also set in that header,
and should be removed from here.
* Using PinName as bitfield doesn't work without warnings, since NC
needs all 32 bits to be represented.
* lp_ticker should not be freed when interrupt is disabled, since this
will kill the timebase.
Add MBED_APP_START and MBED_APP_SIZE to the linker scripts
so the start and size of an image can be specified. This allows the
ROM to be split into a bootloader region and an application region.
Fix vector table
The address of the vector table is hardcoded to the start of flash.
This patch updates make it properly handle updating the VTOR with
a bootloader.
When initializing the RTC on Kinetis devices, handle the case where
the time overflow interrupt is pending and the case where the time
alarm flag is pending. These flags persist across reset and if not
handled will cause a crash when powering up the low power ticker.
This problem manifested as a lp_ticker test failure on the K22F and
K64F on CI only when running a nightly. This problem has been present
but was made obvious by PR #4094 which configures all tickers to
interrupt at least every MBED_TICKER_INTERRUPT_TIMESTAMP_MAX_DELTA
(~31 minutes). This caused the RTC alarm to fire 31 minutes after the lp_ticker
or lp_timeout test and caused the next run of the lp_ticker test to
crash on boot.
TimMasterHandle.Instance initialization can be removed from here,
because it will either have been already done previously,
or it will be done in the us_ticker_init() call immediately below.
Following previous fixes on 16 tickers handling, the overflow flag
condition will not happen anymore, so the work-around in place is
not needed anymore
This commit simplifies ticker interrupt set function and handler.
There were issues around the 16 bits timer wrap-around timing as we were
aligning interrupts with wrap-around limits (0xFFFF) and then reading
TIM_MST->CNT again in timer_update_irq_handler which could lead
to crossing case with the wrap-around (TIM_FLAG_UPDATE) case.
Now we're using the 16 lower bits of the timestamp as the reference from
using in set_compare and never changing it. There is also no need to set
comparator again in timer_update_irq_handler. This is more robust and
also more efficient.
Move to a single more reliable implementation of us_ticker_read()
There were historically 2 versions of us_ticker_read() implementation.
The one removed here was not reliable because us_ticker_read() can be
called in interrupt context which means that TIM_MST->CNT would have
wrapped around while SlaveCounter is not yet updated. So there is a need
to check the TIM_FLAG_UPDATE inside this function, which was not done in
the implementation that is removed here.
There is an easy default implementation of spi_master_block_write that
just calls spi_master_write in a loop, so the default implementation
of spi_master_block_write has been added to all targets.
As reported in issue #4214, there are seen issues seen first on
NUCLEO_F103RB in case of successive Reads of 1 byte at a time.
This issue is due to a wrong state management in the end of read sequence.
Also F1 i2c driver was not fully aligned to others, which is updated here.
There were still side effects, in particular on I2C master slave test,
when setting by default the Pin Speed for F1 family. So for F1 family,
let's do it only in case of Output which is the only case where this
actually applies on this family.
For STM32 targets using a 32-bit timer for the microsecond ticker, the
driver did not properly handle timestamps that are in the past. It
would just blindly set the compare register to the requested timestamp,
resulting in the interrupt being serviced up to 4295 seconds late
(i.e. after the 32-bit timer counts all the way around to hit the
timestamp again).
This problem can easily be reproduced by creating a Timeout object
then calling the timeout's attach_us() member function to attach a
callback with a timeout of 0 us. The callback will not get called for
over 2147 seconds, and possibly up to 4295 seconds late if no other
microsecond ticker events are getting scheduled in the meantime.
Now, after the compare register has been set, the timestamp is checked
against the current time to see if the timestamp is in the past, and
if so, the compare event is manually set.
NOTE: By checking if the timestamp is in the past after configuring the
capture register, we ensure proper handling in the case where the timer
updates past the timestamp while setting the capture register.
* Initialization clear interrupt status
* Remove state in management of interrupt
* Handle timestamp in the past
* Handle current seconds, even if out of the relative timestamp.
* Simplify interrupt handling logic.
For keep supporting external APIs with the same name (supposedly there are a larger
number of users of those APIs), BufferedSerial and ATParser are being renamed.
BufferedSerial becomes UARTSerial, will complement a future USBSerial etc.
ATParser becomes ATCmdParser.
* UARTSerial moves to /drivers
* APN_db.h is moved from platform to cellular/util/.
* Original CellularInterface is restored for backward compatability (again, supposedly there
are users of that).
* A new file, CellularBase is added which will now servce as the base class for all
upcoming drivers.
* Special restructuring for the driver has been undertaken. This makes a clear cut distinction
between an on-board or an off-board implementation.
- PPPCellularInterface is a generic network interface that works with a generic FileHandle
and PPP. A derived class is needed to pass that FileHandle.
- PPPCellularInterface provides some base functionality like network registration, AT setup,
PPP connection etc. Lower level job is delegated to the derived classes and various modem
specific APIs are provided which are supposed to be overridden.
- UARTCellularInterface is derived from PPPCellularInterface. It constructs a FileHandle and
passes it back to PPPCellularInterface as well as provides modem hangupf functionality.
In future we could proive a USBInterface that would derive from PPPCellularInterface and could
pass the FileHandle back.
- OnboardCellularInterface is derived from UARTCellularInterfae and provides hooks to
the target provided implementation of onbard_modem_api.h. An off-board modem, i.e, a modem on
a shield has to override the modem_init(), modem_power_up() etc as it cannot use
onboard_modem_api.h.
* Implements CellularInterface
* Reference design for CellularInterface implementations
* Uses an external mbed-os IP stack and talks to modem over PPP.
This provides a HAL layer for Modem bearing devices.
Provides a standard interface to upper layer drivers.
Platform providers will be implementing this API under their
specific targets.
As a reference, two implementations are provided under TARGET_C027 (UBLOX)
and TARGET_MTS_DRAGONFLY_F411RE (MultiTech).
targets.json now contains a tag "MODEM" which tells that this target
has a modem and the modem_api is protected by a flag DEVICE_MODEM
(following the DEVICE_SERIAL fashion ).
* Lays down ground for mbed modem_api
* Standardizes pin names relating to modem device for UBLOX C027 and MTS_DRAGONFLY_F411RE
devices
* Ublox modem api is changed to use a standard, platform independent name so that same
api could be used with multiple ubloc modems.
* DCD Polarity macro is added to assist the driver in knowing correct polarity
There is an easy default implementation of spi_master_block_write that
just calls spi_master_write in a loop, so the default implementation
of spi_master_block_write has been added to all targets.
Reworked the serial_format() function for STM32F0x
devices to take the format in the form:
data_bits - parity - stop_bits
E.g. 8 - N - 1
where data_bits exclude the parity bit.
Added a case for 7 bits data as at least the chips
STM32F0x1/STM32F0x2/STM32F0x8 support 7 bits data.
Consolidated serial_format() and uart_init()
functions into a general TARGET_STM serial_api.c
file since the functions are common to all STM targets.
Fixes#4189
F2 family also require that TIM_AUTORELOAD_PRELOAD_DISABLE is set,
otherwise the field could have undefined value from the stacj and may
lead to undefined behavior.
The error was found using USE_FULL_ASSERT HAL option.
Rather than adding F2 to the list of family, let's set this parameter for
any family where TIM_AUTORELOAD_PRELOAD_DISABLE applies.
When we want to activate USE_FULL_ASSERT macro in STM32 CUBE, there is a
need to have the assert map to MBED.
The easiest way to have this definition in a single place for all STM32
HAL and LL files using it, is to add a specific header file where the
porting to MBED is done.
There is an easy default implementation of spi_master_block_write that
just calls spi_master_write in a loop, so the default implementation
of spi_master_block_write has been added to all targets.
The STM32F3 cmsis_nvic code is currently checking for a specific flash
address when determining if the vector table is in flash or RAM. By
changing the test to instead see if the vector table base is NOT set to
the RAM address, it simplifies the code, and removes the dependency on
the flash vectors being located at a specific address. This becomes
important when adding a custom boot loader, which requires that the
flash vector table location in the mbed project be at a different
address.
Affected boards: NRF51_DK, NRF52_DK, Beetle. This change is temporary and
will be overwritten by RTX update. It's necessary for the boards to pass
updated tests.
According to @betzw, #3424 was put in for I2S with DMA. However, the latest I2S library now works without this patch.
The changes in DMA HAL for this potentially introduced corner case
scenarios. So it's best to revert the DMA changes.
Default timeout of 10ms was reported as an issue in #4300
There seems to be conditions or use cases where the system is loaded with
higher priority tasks so that SPI transfer would be delayed more than 10ms.
Recommendation from MBED team is to not implement any timeout at all as
there is no defined API in MBED to inform application of error cases.
Change the irq_handler parameter of NVIC_SetVector from a function
pointer to a uin32_t so it matches the cmsis specification. This
prevents the following problem from occurring in RTX5 when building
for IAR:
The error: Error[Pe167]: argument of type "void (*)(void)" is incompatible
with parameter of type "uint32_t".
If you are using Ethernet, and not SPI Arduino pins:
=> keep your board with the default configuration
If you are using SPI Arduino pins, and not Ethernet:
=> you should remove the JP6 bridge on the front side of the board
If you need SPI Arduino and Ethernet:
=> you have to patch the NUCLEO board on the back side: set solder bridge SB121 to off, and SB122 to on
=> D11 is no more connected to PA_7 but to PB_5
=> overwrite d11_configuration config value in json file
s140 headers renamed form ble_* to nrf_ble_*,
Removed s130 and s132 headers named form ble_*
(Them had been added by #2ff572682798562e812015dc775b5896e0fda5a4)
Headers inclusinons were changed in order to meet above changes.
Revrted bad change in us_ticker.c:
use __disable_irq lock instead of core_util_critical_section_enter lock
for setting rtc1 tick for systick emulation as was good before.
targets/targets.json already added MCU_LPC11U35_501 as an extra label
but it didn't have LPC11U35_501 (without the MCU_ prefix). Both of
these target names are used as folder names to organize files
specific to this device. For example the LPC11U35.ld linker script used
by GCC_ARM for this target is located in a TARGET_LPC11U35_501 folder.
I switched to using inheritance to properly setup the target labels
based on @theotherjimmy comments on PR #4252. Everything in the
XADOW_M0 targe appears to have been copy/pasted from LPC11U35_501
anyway so inheritance seems to be the best way to set the values of
the XADOW_M0 properties.
Serial implementation uses different vector handlers for sync/async calls respectively. The issue can be reproduced with the following flow:
1. Register sync mode callback with Serial.attach().
2. Sync call with Serial.putc()/getc().
3. Change to async call with Serial.write()/read().
4. Change back to sync call with Serial.putc()/getc().
Now, vector handller is still for async mode, not for sync mode.
To fix it:
1. Introduce internal function serial_enable_interrupt() for both sync/async vector handler enable/disable.
Original HAL function serial_irq_set() is reduced to call it for sync mode vector handler enable/disable.
2. Introduce internal function serial_rollback_interrupt() to roll back sync mode vector handler at end of async transfer.
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
When attempting to perform a test build of various mbed-os targets with
GCC configured to build -std=gnu++11, all of the targets built
successfully except for this one. It gave errors like this:
../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp: In function 'emac_interface_t* wifi_emac_get_interface()':
../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp:331:38: error: use of deleted function 'emac_interface::emac_interface()'
_intf = new emac_interface_t();
^
In file included from ../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp:9:0:
../mbed-os/hal/emac_api.h:150:16: note: 'emac_interface::emac_interface()' is implicitly deleted because the default definition would be ill-formed:
typedef struct emac_interface {
^
../mbed-os/hal/emac_api.h:150:16: error: uninitialized const member in 'struct emac_interface'
../mbed-os/hal/emac_api.h:151:32: note: 'const emac_interface_ops_t emac_interface::ops' should be initialized
const emac_interface_ops_t ops;
This commit contains a proposed change which fixes this issue by not
using the new operator to allocate the emac_interface_t structure but
instead using the malloc() function since the construction is being
handled explicitly in the subsequent lines of the
wifi_emac_get_interface() function anyway.
I also added code which only completes the initialization of the _intf
object if its allocation succeeds and just returns NULL otherwise.
I see no deallocation of the _intf object occurring so no change from
delete to free() needed to be made.
Revert HRM1017 file source deletion
Added in small comment next to additions
Added mapping to BTN-labelled switches
Added mapping to USER_BUTTON-labelled switches
Undo incorrect mapping to SWIO pin in NORDIC target
Before this patch, many warnings like below were generated
during compilation with ArmCC
[Warning] lwip_ethernet.h@57,0: #3135-D: attribute does not apply to any entity
This happens here as ``--gnu`` option of ArmCC is being used, which
enables the GNU compiler extensions that the ARM compiler supports.
This is solve by adding a extra check on __CCARM .
The USB ISTR register consists of a mix of bits that are
write-zero-to-clear and read only bits. As such, to clear a bit in
the ISTR, you should simply write the bitwise-NOT of the bit to clear.
Previously, the __HAL_PCD_CLEAR_FLAG() macro would do a bitwise-AND
with the ISTR register contents to clear a bit, but this could result
in another bit being inadvertently cleared if it is set by hardware
between the read and the write of the ISTR register.
Similarly, the USB endpoint registers have two bits that are
write-zero-to-clear, USB_EP_CTR_RX and USB_EP_CTR_TX, but the
PCD_CLEAR_RX_EP_CTR() and PCD_CLEAR_TX_EP_CTR() macros wrote back the
last read value for one of these bits when clearing the other bit.
This could result in inadvertent clearing of one of these bits if it
were set by the hardware between the read and the write. These macros
have now both been adjusted to always write one to the bit not being
cleared to prevent inadvertent clears.
HAL driver: Add changes from needad for nrf52840 support
us_ticker, spi, sleep, serial, pwmout, pinmap, object, i2c, gpio, analogin
Add compatibility patches for:
- SoftDevice headers renamed (redirec by a few h files)
- sdk configuration (redirect by sdk_config.h files)
- renaming of func in softdevice handler module
Modifying the code for mbed ci shield test -> analogin_api.c, W7500x_adc.c, gpio_irq_api.c, W7500x_gpio.c
Modifying the code for fix bug -> W7500x_uart.c(register control driver problem), W7500x_uart.h, pinmap.c(pullup, pulldown problem)
This patch enable the LWIP feature for the LPC4088 and LPC4088_DM boards.
The lwIP stack support already this hardware.
See: ./features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/lpc17_emac.c
If one of the CC channel pins is enabled, `pwmout_all_inactive` it
means a channel is active so it should return `true`.
This commit also contains some cleanup in `pwm_init`.
* Update i2c driver to tackle multiple I2C object instances on different pins
* Update pinmap to enable the extra peripherals of EFx32xG12 over EFx32xG1
Due to limitation in the mbed website backend (board names need to be <= 19 characters), we are shortening the CLI target names from THUNDERBOARD to TB.
@screamerbg
This removes the duplicate header files from the build. We were getting
lucky on most invocations of `mbed compile` in that these headers were
searched for after some others, but not when exporting to uvision.
If I2C slave support is included, then the I2C error handler would
always reset the I2C address, resulting in incorrectly changing the
I2C state to listen for a controller configured as I2C master. This
change conditionalizes the address setting to only occur if the
controller was in slave mode when the error occurred.
- move ovf handler at the begining of rtc handler for mitigate the case (mitigate issue for exexution from rtc handler)
- add repeating of operation of set a timestamp in cas that rtc overflow occured during the operation.
- bad number of pin from nRF52840 ,
- bad type of mask of gpio for nRF52940
- typo (object.h)
- revert abort func. to spi_master driver
- update twi_master driver to the newest (e8527f65e90eee6a4dd48ca55d3fc051a556320a master SDK nRF5)
- Remove ble_advertising.h/c - it was unused, redundant code
- includes for SD header ble.h were changed to headers\ble.h in order to distingusch form feature-ble BLE.h
- btle_init() introduced PM for disable <B>privacy</B> for API 3 and further.
- temporary removed or mocked real implemantation of whitelist-ing support functionalities:
btle_security.createWhitelistFromBondTable , gap::startAdvertising, gat::startRadioScan, gap::stopAdvertising
Gap::generateStackWhitelist, Gap::getStackWhiteIdentityList-(mock)
- Characteristic Descriptor Discoverer - aligned to the apply SD API
- long uuid service's read spupport
- add BLE features support to sdk configurations file
- publicate sdk's id_manager.ah() function.
- cutted out f. app_error_handler for mbed-os
- removed PACKED definition form app_util_platform (redefined by mbed-os)
- Gap::setAddress - allign to new SD API using peer manager
- extend Gap::getPermittedTxPowerValues for nRF52840
- corected scater & startup file for IAR EW
- fix warnings caused by port_api.c, ble_radio_notification.c, nrf_drv_spi.c (for IAR it was error), serial_api.c
+ mbed RTx setings for nRF52840
fix build of test for NRF52840
+ few sdk's missing filess
- few sdk's unvanted files
corect mbed HAL implementation to changes made in sdk v13
using
.\targets\TARGET_NORDIC\TARGET_NRF5_SDK13\porting_tools\sdk_update.py
and
.\targets\TARGET_NORDIC\TARGET_NRF5_SDK13\porting_tools\replace_headers.py
files .\targets\TARGET_NORDIC\TARGET_NRF5_SDK13\TARGET_MCU_NRF52832\sdk\softdevice\s132\headers\nrf_ble*.h
renamed to .\targets\TARGET_NORDIC\TARGET_NRF5_SDK13\TARGET_MCU_NRF52832\sdk\softdevice\s132\headers\ble*.h
by hand.
jeromecoutant
Laurent MEUNIER
Jesse Marroquin
Yuguo Zou
MS30 CCChang12
Martin Kojtal
Bartek Szatkowski
Rob Meades
andreas.larsson
justinkim
Deepika
Vincent Coubard
Jimmy Brisson
Anna Bridge
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Bradley Scott
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Chris
adustm
Brad Perry
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Andrzej Puzdrowski
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Mike Fiore
Marc Moreno Berengue
Sam Grove
Andreas Larsson
Russ Butler
Mahadevan Mahesh
Fahrzin Hemmati
Tamas Ban
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Tamas Kaman
Aksel Skauge Mellbye
Kevin Gilbert
Steven Cooreman
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Hasnain Virk
Francisco J. Manno
Christopher Haster
Shaun Nelson
Leon Lindenfelser
Russ Butler
Matthias L. Jugel
Dave Desrochers
Yoshihiro TSUBOI
Bartosz Szatkowski
Martin Kojtal
Brian Daniels
Michel Jaouen
ccli8
justinkim
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Alexis ROCHE
0x6d61726b
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