Commit Graph

6 Commits (b9a2e06a1a38f67cae28b241daf03949d435df0f)

Author SHA1 Message Date
Kevin Bracey 87396e0bf6 Assembler atomics
Reimplement atomic code in inline assembly. This can improve
optimisation, and avoids potential architectural problems with using
LDREX/STREX intrinsics.

API further extended:
* Bitwise operations (fetch_and/fetch_or/fetch_xor)
* fetch_add and fetch_sub (like incr/decr, but returning old value -
  aligning with C++11)
* compare_exchange_weak
* Explicit memory order specification
* Basic freestanding template overloads for C++

This gives our existing C implementation essentially all the functionality
needed by C++11.

An actual Atomic<T> template based upon these C functions could follow.
2019-04-26 13:12:35 +03:00
ccli8 99dd189177 [Nuvoton] Remove unnecessary header files in crypto-misc.cpp 2019-02-11 18:10:51 +08:00
ccli8 8988b6e9db [M2351] Hook crypto interrupt handler without NVIC_SetVector 2019-02-11 14:21:41 +08:00
ccli8 267f62e928 [M2351] Fix crypto AC mgmt
Port of NUC472/M487 crypto AC mgmt work to M2351:
1. Choose mutex to synchronize access to crypto non-SHA AC
2. Choose atomic flag to synchronize access to crypto SHA AC
2019-02-11 13:36:15 +08:00
ccli8 8f1623f717 [M2351] Add consistency check for CRYPTO/CRPT's secure attribute and TRNG/Mbed TLS H/W 2018-07-12 17:51:55 +08:00
ccli8 1da430f1e9 [M2351] Support TRNG
To change TRNG security state, we need to:
1. Change CRPT/CRYPTO bit in NVIC/SCU in partition_M2351.h
2. Add/remove TRNG in device_has list in targets.json to match partition_M2351.h
2018-07-12 17:51:50 +08:00