Using malloc will require us to add stdlib.h somewhere in the path for
the application. Maybe the CI apps are adding stdlib.h and that's why
the code would have worked. In a custom app, it can happen that the
header is not included. Using new avoids the need to add stdlib.h
anywhere and it is more in line with C++.
For default construction of the driver, it would be necessary to define
the pins. However as we don't know the correct pins, until/unless user
sets them up for us. So it makes sense to mark the pins as NC. It would
be easier to debug if the pins are set to NC if user forgot to set them
up.
To make this driver more useful, we needed to do some changes. The
wirings for the modem can differ on the board so we also need to be
flexible in our approach.
It is now mandatory to provide the power pin and pin polarity in the
constructor alongwith the file handle. Reset pin is optional.
Standard 3GPP TS27.007 states that the AT+CGSN command can optionally
have type parameter that determines the output. However Quiectel EC2X
series doesn't accept parameters. We need to reflect that in the
cellular properties setup.
Provides basic power up / power down sequences for Quectel EC2X series
modems. Can be used in PPP mode. For using the on-board IP stack, we
will need to add and implement classes that provide context.
Driver constructor takes power and reset control pins along with the
FileHandle. A default construction is provided which can be chosen by
the application in its mbed_app.json. Otherwise the user is free to
construct as per demand.
Since commit 12c6b1bd8, the i.MX RT1050 has effectively had its data
cache disabled, as the SDRAM was marked Shareable; for the Cortex-M7,
shareable memory is not cached.
This was done to make the Ethernet driver work without any cache
maintenance code. This commit adds cache maintenance and memory barriers
to the Ethernet driver, and removes the Shareable attribute from the
SDRAM, so the data cache is used again.
Cache code in the base fsl_enet.c driver has not been activated - the
bulk of it is in higher-level Read and Write calls that we're not using,
and there is one flawed invalidate in its initialisation. Instead
imx_emac.cpp takes full cache responsibility.
This commit also marks the SDRAM as read/write-allocate. As the
Cortex-M7 has its "Dynamic read allocate mode" to automatically switch
back to read-allocate in cases where write allocate is working poorly
(eg large memset), this should result in a performance boost with no
downside.
Activating write-allocate is also an attempt to provoke any flaws in
cache maintenance - the Ethernet transmit buffers for example will be
more likely to have a little data in the cache that needs cleaning.
Original AT traces had several issue:
- Can be overwritten by other traces (printf/mbed-trace)
- No way to know which direction message was going (TX or RX)
- <cr> and <ln> characters were not visible in trace
etc.
This commit addresses those issues using mbed-trace and showing separately
each filehandle write and read.
State machine has retry logic until device is attached to network.
After this CellularContext does the context activation e.g. connect.
There was no retry logic for context activation. Added logic to
CellularContext level so it's available for at and (upcoming)ril layers.
When doing so, do not disbale GPIO clocks as they may be used by other
drivers !
As a result, debug will be disabled by default, but can be enabled by
either modifying code or selecting MBED debug profile.
Issue was seen when running BLE_GAP example from
mbed-os-example-ble.
In STM32WB, the M0 core cannot be reset except if the whole target
is reset. So in case of re-initialization of the BLE stack, the
transport layer should not be initialized again. The HCI reset
command will do the job.
These files are not BLE specific, but also needed for some clock setting
for instance.
In order to compile an MBED2 application, we need to move the files.
- move hw_conf.h file to targets/TARGET_STM/TARGET_STM32WB directory as
this is used also out of BLE feature.
- create a dedicated hal_deepsleep function as the behavior in WB is a lot
different from other existing STM32 targets
- update clock tree configuration to directly clock the entire tree @ 32MHz
out of HSE. This is needed as we want to let the M0 core running without
any change on M0-side of clocks when M4 enters /exits deep sleep.
The STM32WB Coridio driver includes:
- the Cordio HCI driver handling the reset sequence. During reset sequence
the TX POWER level is set and the BD address is defined if found in OTP
or option bytes. The rest of the sequence is based on the standard CORDIO
HCI driver example.
- The Transport Layer part handles sending and receiving messages to the
WB controller running on cortex-M0 of the STM32WB target. The messages
are shared through shared memory and mailboxes system based on IPCC HW.
We provide now downlink channel frequency and time on air for the
received frame in the RX metadata.
Previously the channel information in both TX and RX metada contained
the index number of the channel. That information wasn't very useful
except the index numbers of default channels. To make more sense of the
meta data, we now store the channel frequency in the channel parameter
rather than the index number of the channel.
RX time on air is collected from the radio driver and it is assumed that
the downlink frame had 8 downlink preamble symbols (plus 4.25 of the
preambles added by the chip) for LoRa modulation.
This commit also include a bit of tidying of RX frequency storage in rx
configuration parameters storage. Previously we were missing filling in
the RX1 frequency correctly.
When using NetworkInterface::get_default_instance() application gets handle
to CellularInterface which is actually CellularContext derived from CellularInterface.
Application needs also handle to CellularDevice to open other interfaces.
A bug while setting up RX start timers would result in premature closusre
of RX2 window. The 'ack_Timeout_timer' would be invoked prematurely and
at that time RX2 window may be being demodulating. This resulted in
massive instability with any test that relied on Confirmed traffic or
lower data rates.
To fix the issue, we must know the length of the RX window in
milliseconds and for this purpose we have extended the
'get_rx_window_params(...)' API. The length of the time the window
may remain open must be accounted for while setting up
'ack_timeout_timer'.
While calculating ack timeout, we were ending up getting a random value
which may become less than 2 seconds. This is not allowed as per v1.0.2
specification.
To fix the issue we now take the random number from 0 to 2000 ms and
then add that to the fixed 2000 ms ack timeout value, guaranteeing a
value at least equal to 2000 ms.
Due to discovery of inconsistent sector sizes in devices storage the is_valid_erase function was adjusted,
For FlashIAPBD the 'code size' was included to the calculation, preventing faulty "virtual" addresses calculation.
For SlicingBD the same error was fixed and in all 3 validation functions that sent addresses for validation and program/read/erase
different addresses.
Ari Parkkila
Cruz Monrreal
Teppo Järvelin
Hasnain Virk
Martin Kojtal
Mirela Chirica
paul-szczepanek-arm
Kevin Bracey
Mahesh Mahadevan
Kimmo Vaisanen
mudassar-ublox
David Saada
Laurent Meunier
bcostm
Marc Emmers
Michal Paszta
Amir Cohen
Arto Kinnunen
Tymoteusz Bloch
Jaeden Amero
Vincent Coubard
itziar
Teemu Kultala
Sebastian Stockhammer
Desmond Chen
avolinski
Michael Schwarcz
Yossi Levy
Oren Cohen